S-100 Bus Research Articles

Real-time clocks for microcomputers in behavioral research

Real-time clock strategies are described for microcomputers in behavioral research. Software-oriented and hardware-oriented counters are described in both free-running and strobed modes. An example of a clock using the Intel 8253 is given, along with driving software in 8080 assembly code and hardware for the S-100 bus.

A reliable low-cost graphic system

The MERELIN display is a two-card system on the S100 bus. The display memory is provided from the normal memory on a separate S100 card. Therefore the memory is direct available to the CPU (display refresh is done by DMA). The MERELIN display allows several modes for different resolutions, the maximum resolution being 320 points × 200 points. This means an extern refresh memory of 8 K bytes. The MERELIN will be replaced by a Vektor Graphic Display with an internal refresh memory (the CPU makes DMA) and a resolution of 256 × 240, or 128 × 120 with a grey scale.

Standards in microcomputer system design

Abstract The subject of standards should concern all those who design or use microcomputer systems. Interface standards are of prime concern, particularly internal bus standards. The S100 bus dominates the personal computer market, but it has serious drawbacks and other buses are being considered. Instrumentation buses for microcomputers present problems of cost and manufacturer support. CAMAC is a well supported system, but in its parallel form is probably too expensive for most microcomputers. The IEE-488-75 bus is already available and is well supported. Communications interfaces on microcomputers owe everything to minicomputer and mainframe systems. The ubiquitous RS-232-C has been improved in the specifications RS-422/3. Better definition for internal and instrumentation buses are in preparation and offer the hope of easier system design.

Microsystems Proposed Standard for the S-100 Bus Preliminary Spefication, IEEE Task 696.1/D2

The computer bus commonly known as the S-100 was first introduced by MITS, Inc., with its Altair kit. This bus has since spread throughout the electronics industry and beyond. Today over a hundred manufacturers make products which claim to be compatible with the S-100 bus even though–until now– no complete specification has been available. The following table, figures, and notes constitute the preliminary draft of a proposed standard for the S-100 bus.

Input and output for microprocessors

Several alternative strategies for input and output for microprocessors are described, with examples for 8080 machines and the S-100 bus. The strategies are compared in terms of cost, complexity, flexibility, and speed in typical psychology laboratory tasks. Flag testing, interrupt processing, and direct memory access are considered in both parallel and serial modes.

Simple CAMAC Test System Based on the S-100 Bus

A simple CAMAC test system based upon the use of the S-100 (Hobbyist) bus has been implemented at SLAC. The IMSAI 8080 computer is used, containing 16K bytes of RAM and 1K bytes of EPROM. All programming and operator interaction takes place via a thermal printer-keyboard, and all test programs are written in IMSAI BASIC. The system has been used to test components, CAMAC modules, and complex CAMAC systems.

A CAMAC and Microprocessor Based Target Room Control System

A set of CAMAC modules has been designed to facilitate control applications in a Tandem Van de Graaff target room. One of the modules is a U-type crate controller designed to operate with microcomputers such as the Intel SBC 80/20 or those utilizing the S-100 bus. The other modules are based on a common design using a microprocessor as a control element and modular construction techniques.