Roundoff Noise Research Articles

Low Roundoff Noise of Two Sparse Second-Order Balanced Realization-Based Structures

Low Roundoff Noise of Two Sparse Second-Order Balanced Realization-Based Structures

Variable-bandwidth recursive-filter design employing cascaded stability-guaranteed 2nd-order sections using coefficient transformations

ABSTRACT This paper shows a 2-step procedure for obtaining a variable-bandwidth recursive digital filter whose structure contains cascaded second-order (2nd-order) sections. Such a cascade-form structure is insensitive to the round-off noises that come from filter-coefficient quantizations in hardware implementations. This paper also shows how to utilize a 2-step procedure to get a variable-bandwidth recursive filter that is absolutely stable. The first step (Step-1) of the 2-step procedure designs a series of constant-bandwidth filters for approximating a series of evenly discretized variable specifications, and the second step (Step-2) fits the coefficient values obtained from Step-1 by employing individual polynomials. To ensure the stability of the resultant constant-bandwidth filters in Step-1, coefficient transformations are first executed on the 2nd-order transfer function's denominator-coefficients, and then each coefficient of both numerator and transformed denominator is found as an individual polynomial. Once all the polynomials are obtained, the polynomials corresponding to the transformed denominator are further converted to composite functions for ensuring the stability. Hence, the 2-step procedure not only produces a cascade-form variable-bandwidth filter that has low quantization errors, but also ensures the stability. A lowpass example is included for verifying the achieved stability and showing the high approximation accuracy.

Analysis and Minimization of Roundoff Noise for Generalized Direct-Form II Realization of 2-D Separable-Denominator Filters

Analysis and Minimization of Roundoff Noise for Generalized Direct-Form II Realization of 2-D Separable-Denominator Filters

Weighted Minimization of Roundoff Noise and Pole Sensitivity Subject to <i>l</i><sub>2</sub>-Scaling Constraints for State-Space Digital Filters

Weighted Minimization of Roundoff Noise and Pole Sensitivity Subject to <i>l</i><sub>2</sub>-Scaling Constraints for State-Space Digital Filters

A Class of IIR Filters Synthesized Using Frequency-Response Masking Technique

This letter presents a class of infinite impulse response (IIR) filters synthesized using a system of IIR subfilters based on the frequency-response masking (FRM) technique. In the proposed class of filters, the bandedge shaping filters are a parallel connection of two allpass filters, and the masking filters are approximately linear phase IIR filters composed of a parallel connection of a delay line and an allpass filter. A design method which jointly optimizes the IIR subfilters is introduced. The proposed class of IIR filters has lower coefficient sensitivity and roundoff noise compared with conventional IIR filters.

Estimation of Primary Quantization Steps in Double-Compressed JPEG Images Using a Statistical Model of Discrete Cosine Transform

Double compression of images occurs when one compresses twice, possibly with different quality factors, a digital image. Estimation of the first compression parameter of such a double compression is of a crucial interest for image forensics since it may help revealing, for instance, the software or the source camera. This paper proposes an accurate method for estimating the primary quantization steps in double-compressed JPEG images. This original methodology is based on an accurate statistical model of discrete cosine transform (DCT) coefficients that has been proposed in our previous works. We also present a thorough analysis of the double compression properties, taking into account carefully the effect of round-off noise. This analysis is used to derive an accurate range of possible value for quantization of primary DCT coefficients with respect to the secondary quantization step. Using both the statistical model of quantized DCT coefficients and the range of possible values of first quantization step, a model of the twice quantized DCT coefficients is established. Eventually, it is proposed to estimate the primary quantization value by finding, among a set of possible candidates, the one that best match the proposed statistical model in terms of minimal symmetrized Kullback-Leibler (KL) divergence. The numerical experiments on large databases of real images and comparisons with state-of-the-art approaches emphasize the relevance of the proposed method.

Robust Digital Filter Structures: A Direct Approach

One of the many contributions of Prof. Fettweis was the invention of wave digital filters. These filters are obtained from classical RLC filters, in particular doubly terminated lossless two-ports, by using some transformations. Namely, the voltages and currents in the circuit elements are transformed into wave-variables and then a bilinear transformation is performed. If the wave transformation is performed appropriately it results in a realizable digital filter structure which furthermore enjoys a number of robustness properties such as low passband sensitivity, low roundoff noise, and freedom from limit cycle oscillations. Prof. Fettweis and his colleagues also showed that these properties are due to the inheritence of passivity properties from the continuous-time domain into the digital filter domain. Subsequent to this landmark work, a number of researchers worked on the problem of obtaining robust digital filter structures without starting from continuoustime circuits. One of these is the structurally bounded or structurally passive class of digital filters. These structures are based on inducing structural passivity directly into the implementation and are therefore simpler, both conceptually and from a practical viewpoint. They are also more general and lead to new structures which have no natural connection to electrical circuits. This paper gives an overview of some of these developments.

Designing Checksums for Detecting Errors in Fast Unitary Transforms

Parity computations, checksums, over the input and output data of fast unitary transforms are compared, down to roundoff noise levels, to detect the effects from a single error on any one line between stages of the fast algorithm. Error spaces and their dual spaces guide the design process.

Compressed fixed-point data formats with non-standard compression factors

Sign bit compression in fixed-point numbering systems can improve the dynamic range and round-off noise for signal processing algorithms. This paper analyses non-standard compression factors (CF) for compressed fixed-point data formats, where sign bit compression is performed on each individual fixed-point number. Although these compression techniques are applicable to other fixed-point formats, the compressed two's complement data format is selected for illustration. A brief background on compressed two's complement is provided. Obvious compression factors are powers of two due to binary formatting, but compression factors other than standard powers of two are presented. Compression factors of 3 and 5 are analysed in greater detail. Motivation for and advantages of non-power-of-two compression factors are identified.

An Improved Lattice Filter Structure with Minimum Roundoff Noise Gain

In this paper, a new filter structure is derived by combining the lattice structure and error feedback technique, which contains a free parameter used for structure optimization. The roundoff noise of the proposed structure is analyzed, and the corresponding mathematical expression is deduced. The problem of how to optimize the free parameter is investigated in terms of minimizing the roundoff noise gain. When the free parameter is expressed as an integer power-of-two, for an Nth-order digital filter, the proposed structure requires $$5N+1$$5N+1 multipliers, which yields the same implementation complexity as the normalized lattice structure. A numerical example is given to show the finite wordlength performance of the proposed structure.

Experimental validation of waveform relaxation technique for power system controller testing

A Waveform Relaxation (WR) based iterative real-time playback scheme for controller testing was recently proposed in the literature along with proof-of-concept simulations. This scheme can be a low-cost alternative to Hardware-in-Loop simulation, as it does not require a real-time simulator. To demonstrate practical feasibility of the WR scheme, this paper presents results of experiments with real-time implementation of controllers, iteratively interacting with simulated models of power apparatus via storage and real-time play-back. Two systems are considered: a HVDC controller tested with a detailed model of the converters, and a TCSC based damping controller tested with a low frequency model of a power system. The results are validated with those obtained using simulated models of the controllers. We also present results of an experiment in which the tested HVDC controller is used to control the scaled real-life HVDC apparatus, for which a simulated model was used during controller testing. Convergence and a good match between simulated and real-time implementation are obtained for the HVDC system. The experiments on the TCSC damping controller drawn our attention to a potential convergence problem which may arise due to iteration-dependent round-off noise.

An input-balanced realization-based structure for efficient implementation of digital IIR filters

Based on an input-balanced state-space realization, this paper derives a novel structure for efficient implementation of digital IIR filters. Such a structure is very similar to a normalized lattice and, for an N th order IIR filter, it possesses 5 N -1 non-trivial multipliers: two multipliers less than in a normalized lattice. Expressions for transfer function sensitivity measures and roundoff noise gain for the proposed structure are derived. Interestingly, it is shown that, when the filter is all-pass, the proposed structure requires 4 N multiplications in order to compute one output sample. Moreover, the corresponding roundoff noise gain is 4 N , much smaller than that of ( N +1) 2 given by the classical minimum roundoff state-space realizations. Results of simulations performed show that the proposed structure outperforms many classical ones in terms of implementation efficiency and robustness against finite-word-length effects.

Roundoff Noise Minimization in State-Space Discrete-Time Systems Using Joint Optimization of High-Order Error Feedback and Realization

This paper deals with the joint optimization problem of high-order error-feedback and realization for minimizing roundoff noise at the output of a closed-loop system with a full-order observer feedback system subject to l2-scaling constraints. It is shown that the problem can be converted into an unconstrained optimization problem by using linear-algebraic techniques. The unconstrained optimization problem at hand is then solved iteratively by employing an efficient quasi-Newton algorithm with closed-form formulas for key gradient evaluation. A case study is presented to demonstrate the validity and effectiveness of the proposed technique.

Round-Off Noise of Multiplicative FIR Filters Implemented on an FPGA Platform

The paper analyzes the effects of round-off noise on Multiplicative Finite Impulse Response (MFIR) filters used to approximate the behavior of pole filters. General expressions to calculate the signal to round-off noise ratio of a cascade structure of Finite Impulse Response (FIR) filters are obtained and applied on the special case of MFIR filters. The analysis is based on fixed-point implementations, which are most common in digital signal processing algorithms implemented in Field-Programmable Gate-Array (FPGA) technology. Three well known scaling methods, i.e., L2 bound; infinity bound and absolute bound scaling are considered and compared. The paper shows that the ordering of the MFIR stages, in combination with the scaling methods, have an important impact on the round-off noise. An optimal ordering of the stages for a chosen scaling method can improve the round-off noise performance by 20 dB.

High-performance variable band-pass/band-stop state-space digital filters using Gramian-preserving frequency transformation

This paper presents a simple state-space-based method for design and realization of variable band-pass/band-stop IIR digital filters. Our proposed variable filters not only allow us to tune the frequency characteristics, but also ensure high-performance with respect to finite wordlength effects such as L2-norm dynamic range scaling, limit cycles, roundoff noise, and coefficient sensitivity. We achieve this property using the Gramian-preserving frequency transformation, which is implemented by replacing each delay element in a given prototype filter with a second-order all-pass function that has the four-multiplier-lattice structure. It is shown that our proposed variable filters are described in a rather simple form without the need of the inverse matrix that appeared in the conventional Gramian-preserving frequency transformation. Moreover, we show the high-performance of our proposed method in comparison with other possible types of frequency transformations that are implemented by the typical one-multiplier/two-multiplier-lattice forms and the direct form.

Roundoff Noise Minimization for a Class of 2-D State-Space Digital Filters Using Joint Optimization of High-Order Error Feedback and Realization

Roundoff Noise Minimization for a Class of 2-D State-Space Digital Filters Using Joint Optimization of High-Order Error Feedback and Realization

Jointly Optimal High-Order Error Feedback and Realization for Roundoff Noise Minimization in 1-D and 2-D State-Space Digital Filters

Joint optimization of high-order error feedback and state-space realization for minimizing roundoff noise at filter output subject to l2-scaling constraints is investigated for one- and two-dimensional state-space digital filters. Linear algebraic techniques that convert the problems at hand into an unconstrained optimization problem are explored, and an efficient quasi-Newton algorithm is then applied to solve the unconstrained optimization problem iteratively. In this connection, closed-form formulas are derived for fast and accurate gradient evaluation. Finally, case studies are presented to demonstrate that the high-order error feedback does offer much improved performance and that the proposed joint optimization is superior relative to a sequentially optimized system where the state-space coordinate transformation and high-order error feedback matrices are optimized separately.

Low-Power Logarithmic Number System Addition/Subtraction and Their Impact on Digital Filters

This paper presents techniques for low-power addition/subtraction in the logarithmic number system (LNS) and quantifies their impact on digital filter VLSI implementation. The impact of partitioning the look-up tables required for LNS addition/subtraction on complexity, performance, and power dissipation of the corresponding circuits is quantified. Two design parameters are exploited to minimize complexity, namely the LNS base and the organization of the LNS word. A roundoff noise model is used to demonstrate the impact of base and word length on the signal-to-noise ratio of the output of finite impulse response (FIR) filters. In addition, techniques for the low-power implementation of an LNS multiply accumulate (MAC) units are investigated. Furthermore, it is shown that the proposed techniques can be extended to cotransformation-based circuits that employ interpolators. The results are demonstrated by evaluating the power dissipation, complexity and performance of several FIR filter configurations comprising one, two or four MAC units. Simulations of placed and routed VLSI LNS-based digital filters using a 90-nm 1.0 V CMOS standard-cell library reveal that significant power dissipation savings are possible by using optimized LNS circuits at no performance penalty, when compared to linear fixed-point two's-complement equivalents.

Quantization Analysis of the Infrared Interferometer of the TJ-II Stellarator for its Optimized FPGA-Based Implementation

Infrared interferometers are used in magnetic fusion devices for measuring the line-integrated electron density of the plasmas. An FPGA-based processing system is currently being used in the TJ-II infrared interferometer to compute the line-integrated electron density. In high performance Digital Signal Processing (DSP) applications, the computations carried out in the FPGAs are usually performed in fixed point. The floating-point values of the algorithm description must be quantized to their fixed-point counterparts, introducing some deviations with respect to the un-quantized case. These deviations are modeled as Round-Off Noise (RON) sources, whose effects are propagated through the different parts of the system. Thus, these quantization operations significantly affect the maximum attainable system performance. In the TJ-II system, the amount of RON is a limiting factor. Therefore, its analysis and reduction is essential to perform the control operations in real time.

PSO을 이용한 고속 2차원 상태공간 디지털필터 설계

본 논문은 Particle Swarm Optimization(PSO)을 이용하여 고속 2차원 디지털필터의 설계방법을 제안하였다. 먼저 2차원 상태공간 디지털필터의 설계문제를 PSO에 적용하기 위하여 최소화 문제로써 형식화 과정이 논의된다. 제안된 PSO 알고리즘을 이용한 설계방법은 필터설계에서 요구되는 안정성을 보증하는 과정이 검토되어 개선된다. 본 논문에서 제안된 방법의 타당성을 설계예시를 통해 고찰한 결과, 설계된 디지털필터는 동일한 설계사양으로 기존의 설계방법으로 설계된 디지털필터보다 근사 및 라운드오프 오차 면에서 우수한 결과를 얻을 수 있었다. 아울러 제안된 2의 멱수가 필터계수인 2차원 상태공간 디지털필터는 승산기가 필요하지 않아 기존의 필터보다 연산과정에서 계산용량을 약 1/4로 줄일 수 있다는 것을 보였다. This paper presents an efficient design method of multiplierless 2-D state space digital filter based on a particle swarm optimization(PSO) algorithm. The design task is reformulated as a constrained minimization problem and is solved by our newly developed PSO algorithm. To ensure the stability of the designed 2-D state space digital filters, a stability strategy is embedded in the basic PSO algorithm. The superiority of the proposed method is demonstrated by several experiments. The results show that the approximation error and roundoff noise of the resultant filters are better than those of the digital filters which designed by recently published filter design methods. In addition, the designed filters with power-of-two coefficients have only about 1/4 computational burden of the 2-D digital filters designed in the 2's complement binary representation.