Si Surface Roughness Research Articles

Ni/Cu/Ag plated contacts: A study of resistivity and contact adhesion for crystalline-Si solar cells

Ni/Cu/Ag plated contacts were examined as an alternate to Ag screen printed contacts for silicon (Si) solar cell metallization. To realize a reliable contact for industrial applications, the contact resistance and its adhesion to Si substrates were evaluated. Si surface roughness by picosecond (ps) laser ablation of silicon-nitride (SiNx) antireflection coating (ARC) was done in order to prepare the patterns. The sintering process after Ni/Cu/Ag full metallization in the form of the post-annealing process was applied to investigate the contact resistivity and adhesion. A very low contact resistivity of approximately 0.5 mΩcm2 has been achieved with measurements made by the transfer length method (TLM). Thin finger lines of about 26 μm wide and a line resistance of 0.51 Ω/cm have been realized by plating technology. Improved contact adhesion by combining the ps-laser-ablation and post-annealing process has been achieved. We have shown the peel-off strengths >1 N/mm with a higher average adhesion of 1.9 N/mm. Our pull-tab adhesion tests demonstrate excellent strength well above the wafer breakage force.

Effective medium approximation of ellipsometric response from random surface roughness simulated by finite-element method

We used numerical simulations based on the finite-element method (FEM) to calculate both the amplitude and phase information of the scattered electric field from random rough surfaces, which can be directly compared to ellipsometric measurements and effective medium approximation (EMA) calculations. FEM can serve as an exploration tool for the relationship between the thickness of the surface roughness evaluated by Bruggeman EMA and the morphological parameters of the surface, such as the root mean square height, the lateral auto-correlation length, and the typical average slope. These investigations are of high interest in case of poly-crystalline and amorphous materials. The paper focuses on the simulations of rough Si surfaces. The ellipsometric calculations from FEM and EMA simulations match for wavelengths of illumination much shorter than the typical feature size of the surface. Furthermore, for these cases, the correlation between the EMA thickness and the root mean square height of the roughness for a given auto-correlation length is quadratic, rather than linear, which is in good agreement with experimental measurements and analytical calculations presented in recent reports.

Effects of ultrasonic agitation and surfactant additive on surface roughness of Si (1 1 1) crystal plane in alkaline KOH solution

In the silicon wet etching process, the “pseudo-mask” formed by the hydrogen bubbles generated during the etching process is the reason causing high surface roughness and poor surface quality. Based upon the ultrasonic mechanical effect and wettability enhanced by isopropyl alcohol (IPA), ultrasonic agitation and IPA were used to improve surface quality of Si (111) crystal plane during silicon wet etching process. The surface roughness Rq is smaller than 15nm when using ultrasonic agitation and Rq is smaller than 7nm when using IPA. When the range of IPA concentration (mass fraction, wt%) is 5–20%, the ultrasonic frequency is 100kHz and the ultrasound intensity is 30–50W/L, the surface roughness Rq is smaller than 2nm when combining ultrasonic agitation and IPA. The surface roughness Rq is equal to 1nm when the mass fraction of IPA, ultrasound intensity and the ultrasonic frequency is 20%, 50W and 100kHz respectively. The experimental results indicated that the combination of ultrasonic agitation and IPA could obtain a lower surface roughness of Si (111) crystal plane in silicon wet etching process.

Silicon micromachining in 25 wt% TMAH without and with surfactant concentrations ranging from ppb to ppm

Tetramethylammonium hydroxide (TMAH) is one of the most commonly used anisotropic etchants in silicon wet bulk micromachining. It has outstanding etching characteristics such as compatibility with semiconductor processes and provides high etch selectivity between silicon and silicon dioxide. In this work, we have investigated the effect of surfactant concentration ranging from 20 ppb to 1000 ppm on the etching characteristics of 25 wt% TMAH for bulk micromachining of Si{100} and Si{110}. Triton X-100 with formula C14H22O(C2H4O)n, where n = 9---10, is used as surfactant. The major objective of this work is to determine the surfactant concentration at which the etch rate, etched surface morphology and convex corner undercutting are significantly affected. Undercutting length and etched depth are measured using 3D scanning optical microscope. Surface morphology of etched silicon samples are inspected using scanning electron microscope. The surfactant concentration below 100 ppb does not affect etching characteristics significantly, while the effect of surfactant concentration above 100 ppb is substantial on the undercutting at convex corners on Si{100} surface, etch rate and etched surface roughness of Si{110}. The etch rate and etched surface morphology of Si{100} are not influenced considerably when the surfactant is added into 25 wt% TMAH.

Wet Anisotropic Etching Characteristics of Si{100} in TMAH+Triton at near the Boiling Point

The anisotropic silicon etching characteristics of TMAH(tetramethyl ammonium hydroxide)+Triton at near the boiling point were investigated. The etch rate of Si {100}, the convex corners, and the roughness of the etched surface contact with the fabrication of bulk microstructures and thus micromechanical devices in silicon. This study presents that the etch rate of Si {100} in 25 wt.% TMAH with 0.1% Triton at near boiling point (112°C) is 1.37μm/min, it is three times higher than it at 80°C. The surface roughness and convex corners of Si {100} after etching at different temperature were investigated by optical microscope, scanning electron microscope (SEM) and atomic force microscope (AFM). The etching rate and smoothness of an etched surface can be improved simultaneously at near boiling point, meanwhile, the undercutting on convex corner should be accepted.

Ultra-Low Temperature Flattening Technique of Silicon Surface Using Xe/H2 Plasma

(1) Introduction The interface microroughness between the insulator film and the silicon substrate is one of the critical issues to the gate insulator film reliability and the performance of MOSFETs [1-2]. The atomically flat surface of Si(100) has been obtained by the ultra-pure Ar annealing at the temperature of 800 ºC or above [3-7]. The MOSFETs having atomically flat interface between the silicon substrate and the radical gate SiO2 film show higher performances than the MOSFETs having conventional interfaces [3,4,7]. The decreasing flattening temperature is effective to apply the flattening process to the patterned wafer just before the gate oxide formation. We have reported that the 800 oC annealing can be applied to the wafers having the shallow trench isolation (STI), and the breakdown field intensity (Ebd) improved and the random telegraph noise decreased [8]. In order to introduce the flattening process just before the gate oxide formation in the latest LSI manufacturing process such as Fin-FET, it is considered that lower flattening temperature is strongly required. Thus the flattening technique of silicon surface was developed by using Xe/H2 plasma at 400 oC. In this paper, MOS devices are fabricated by an introduction of Xe/H2plasma flattening technique and these electrical characteristics are evaluated. (2) Experimental details In this study, MOS capacitors were fabricated using Cz-n type Si(100) wafers (8-12 Ω·cm) as follows. For the device isolation, 300 nm-thick field oxide films were grown by a pyrogenic wet oxidation at 1000 oC followed by patterning the active region. These patterned wafers were cleaned by APM (29% NH4OH : 30% H2O2 : H2O = 0.05 : 1 : 5) solution with megasonic and the native oxides were removed by 0.5% dilute HF. Just before the gate oxides formation, Xe/H2 plasma flattening process was performed by a microwave-excited high-density Xe(90%)/H2(10%) plasma at a pressure of 266 Pa and temperature of 400 °C for 3 min. The 7 nm-thick gate oxides were fabricated by radical oxidation followed by forming n+ poly-Si gate electrode and Al buck side electrode. Finally the forming gas (10 %H2/90 %N2) annealing at 400 oC was carried out for 30 min. (3) Results and discussion Fig 1 shows the 3×3 μm2 AFM images (a) before and (b) after flattening Si(100) surface by using the Xe/H2 plasma. The average roughness (Ra) of Si(100) surface was decreased from 0.12 nm to 0.039 nm by the Xe/H2 plasma treatment. Fig. 2 shows the variations of the breakdown field intensity (Ebd). Here, Ebd was determined at breakdown field in the current density versus the electric field (J-E) characteristics of MOS capacitors whose area was 10-4 cm2. By an introduction of the Xe/H2 plasma flattening, Ebd was improved more than 1 MV/cm and obtained the much smaller fluctuation of Ebd than that of conventional. From these results, improving Si surface flatness before gate oxide formation can be effective to reduce the variations of Ebd. The reason is considered that the local spots, where the excess electric field is induced in the roughened SiO2/Si interface, are drastically decreased by the Xe/H2 plasma flattening at even 400 oC. Consequently the Xe/H2plasma flattening technique can be effective to the advanced integrated circuit with very shrunk transistors such as three dimensional MOFET (Fin-FET). Acknowledgments This work was partially supported by JSPS KAKENHI Grant Number 22000010. Reference T. Ohmi, et al., Electron. Device Lett., 12, p.652 (1991).T. Ohmi, et al., T-ED 39, p.537 (1992).R. Kuroda, et al., T-ED, 56, p.291 (2009).R. Kuroda, et al., Jpn. J. Appl. Phys., 48, p.04C048 (2009).X. Li, T et al., ECS Trans. 28 p.299 (2010).X. Li, et al., Microelec. Eng., 88, p.3133 (2011).X. Li, et al., Jpn. J. Appl. Phys., 50, p.10PB05 (2011).T. Goto, et al., Extended Abst. SSDM, F-1-3, p.670 (2014).T. Suwa, et al., ECS Trans., 61, p.401 (2013). Figure 1

Development of TSV Reveal Process Using Very Fine Si/Cu Grinding and Metal Contamination Removal

Three-dimensional integrated circuits (3D-ICs) using through silicon via (TSV) have been developed as an emerging technology that can lead to significant progress (1–4). Among various TSV processes, the via-middle process has potential for wide spread use because formation of small-sized TSVs is relatively easy in the via-middle process. However, TSV reveal process must be performed for electrical contact in the via-middle process. This TSV reveal process is important because it can influence the metal contamination and stacking yield of 3D-ICs. Conventionally, TSV reveal is performed by Si grinding and Si dry etching (5). A disadvantage of that method is the resultant TSV depth deviation, which can cause bonding failure during wafer/chip stacking. In (6), TSV leveling was performed by introducing a chemical mechanical polishing (CMP) step after deposition of the backside insulator. However, the revealed TSVs break during CMP step if they exceed a certain height. To overcome these problems, we developed a novel TSV reveal process comprising direct Si/Cu grinding and metal contamination removal (7,8). First, simultaneous grinding of Cu and Si was performed using a novel vitrified grinding wheel. In situ cleaning with a high-pressure micro jet and the inelastic porous structure of the grinding wheel suppressed the adhesion of Cu contaminants to the Si, and TSVs were leveled and exposed. Next, an electroless Ni-B film was deposited on the Cu surface of the TSVs. The Si was etched with an alkaline solution, whereas the Cu was protected by the Ni-B film. An insulator was deposited, and then the insulator on the top surface of the TSV was removed. We achieved the backside reveal of TSVs without TSV depth deviation and suppressed Cu contamination to less than 1e11 atoms/cm2. However, after direct Si/Cu grinding with an 8000 grit grinding wheel, the average surface roughness of Si was 5–10 nm, which is larger than that after chemical mechanical polishing (CMP). In this paper, we developed vitrified grinding wheels with very high grit numbers (#30,000 and #45,000) and present an improved version of our TSV reveal process. The average surface roughness of Si after Si/Cu grinding was approximately 3 nm for the 30,000 grit grinding wheel and 1 nm for the 45,000 grit grinding wheel. This value is equivalent to that after CMP. The improved process produced a uniform reveal of 4-um-diameter TSVs without TSV depth deviation and Cu contamination. The Cu contaminant concentration on Si region between TSVs was small (<3e10 atoms/cm2). This process will reduce the cost of the TSV reveal process and considerably improve the TSV yield.

Influence of Process Parameters on Surface Appearance and Roughness of a Low Si Containing Al-Alloy, in Semisolid Casting

The visual appearance and surface roughness were experimentally investigated in industrial scale for a low silicon containing aluminium alloy cast in semisolid state integrated with HPDC machine. A visual comparative technique and surface roughness in the form of the Rq value were used to evaluate the surface appearance and the surface roughness respectively. The results were investigated statistically to find significant models. It was shown that high quality appearance, following a comparative scale, was possible using high die temperature and high injection speed. It was also found that improving the surface roughness will deteriorate the visual appearance.

Flattening Technique of (551) Silicon Surface Using Xe/H2 Plasma

In order to flatten Si(551) surface the thermal annealing in Ar ambience at the atmospheric pressure was performed. The surface roughness of Si(551) is very flat after annealing at 600 °C. It is considered that Si atoms on Si(551) surface easily migrate at lower temperature than Si(100). However because the very roughened spot are locally appeared, the atomically flat silicon surface cannot be obtained on Si(551) yet. Xe/H2 plasma process is also performed at low temperature less than 600 °C At the H2 concentration of 10 % and at the process pressure of 266 Pa, Ra of Si(551) surface has a very flat value of 0.068 nm. It is considered that the surface migration of Si atoms on Si(551) surface increasingly progresses because Si(551) surface became activated by Xe/H2 plasma.

Enhancement of Raman Scattering for Silver Nanoparticles Located on Electrolessly Roughened Silicon

To study the effect of roughness of a supporting substrate to Raman enhancement, silver nanoparticles (AgNPs) were prepared on Si with different degrees of roughness. To roughen the surface of silicon, electroless displacement was used first to grow AgNPs on smooth Si. By chemically removing the resulting AgNPs, an electrolessly roughened Si surface can be exposed. A second electroless displacement then was performed to grow new AgNPs on the roughened Si crystal to form surface-enhanced Raman scattering substrates. Another approach, called the protecting method, also was proposed and demonstrated to structure AgNPs on surface-roughened Si. In this second method, electroless displacement also was used to grow AgNPs on the Si crystal. The resulting AgNPs then were protected by thio compounds to control removal of the outer layer of AgNPs, thereby exposing the underlying AgNPs located directly on the electroless roughened Si surface. Results indicate that the structure of AgNPs on roughened Si surfaces provides approximately two orders of magnitude higher enhancement than AgNPs on non-roughened Si, and the substrates prepared in this work are highly sensitive, with enhancement factors reaching 10(8).

Characterization of bonding interface prepared by room-temperature Si wafer direct bonding using the surface smoothing effect of a Ne fast atom beam

We performed room-temperature Si wafer direct bonding by surface activation using a Ne fast atom beam (FAB). The bonding energy between Si wafers prepared by Ne FAB etching is equivalent to that of the bulk materials. We also investigated the surface smoothing effect by Ne FAB etching. A rough Si surface with a surface roughness of 0.40nm rms was etched by Ne FAB, and its surface roughness was decreased down to 0.17nm rms. For a Si surface etched at a depth of 30nm by the Ne FAB, the 1D-PSD (1-dimensional power spectrum density) amplitude was decreased in the range of spatial frequencies >10μm−1. Although the Si wafers with surface roughness of 0.4nm rms could not be bonded, they were successfully bonded after Ne FAB smoothing of etching depths over 5nm, and a bonding energy equivalent to that of the bulk materials was attained. We succeeded in dramatically decreasing the local strain at the bonding interface by the Ne FAB smoothing effect.

Influence of Si Surface Roughness on Electrical Characteristics of MOSFET with HfON Gate Insulator Formed by ECR Plasma Sputtering

To improve metal oxide semiconductor field effect transistors (MOSFET) performance, flat interface between gate insulator and silicon (Si) should be realized. In this paper, the influence of Si surface roughness on electrical characteristics of MOSFET with hafnium oxynitride (HfON) gate insulator formed by electron cyclotron resonance (ECR) plasma sputtering was investigated for the first time. The surface roughness of Si substrate was reduced by Ar/4.9%H2 annealing utilizing conventional rapid thermal annealing (RTA) system. The obtained root-mean-square (RMS) roughness was 0.07nm (without annealed: 0.18nm). The HfON was formed by 2nm-thick HfN deposition followed by the Ar/O2 plasma oxidation. The electrical properties of HfON gate insulator were improved by reducing Si surface roughness. It was found that the current drivability of fabricated nMOSFETs was remarkably increased by reducing Si surface roughness. Furthermore, the reduction of Si surface roughness also leads to decrease of the 1/f noise.

Dependence of Atomic-Scale Si(110) Surface Roughness on Hydrogen Introduction Temperature after High-Temperature Ar Annealing

The atomic-scale surface roughness of Si(110) reconstructed via high-temperature Ar annealing is immediately increased by non uniform accidental oxidation during the unloading process (called reflow oxidation) during high-temperature Ar annealing. In particular, for a reconstructed Si(110) surface, characteristic line-shaped oxidation occurs at preferential oxidation sites appearing in pentagonal pairs in the directions of Si[-112] and/or [-11-2]. We previously reported that the roughness increase of reconstructed Si(110) due to reflow oxidation can be restrained by replacing Ar gas with H2 gas at 1000&#176C during the cooling to 100&#176C after high-temperature Ar annealing. It was speculated that preferential oxidation sites on reconstructed Si(110) were eliminated by H2 gas etching and hydrogen termination of dangling bonds. Thus, it is necessary to investigate the effect of H2 gas etching and hydrogen termination behavior on the reconstructed Si(110) surface structure. In this study, we evaluated in detail the relationship between the temperature at which the H2 gas replaces the Ar in high-temperature Ar annealing and the reconstructed Si(110) surface structure. The maximum height of the roughness on the reconstructed surface was the same as if Ar gas was used when the H2 gas introduction temperature was 200&#176C, although the amount of reflow oxidation was decreased to 70% by hydrogen termination. Furthermore, line-shaped oxidation still occurs when H2 gas replaces Ar at this low temperature. Therefore, we conclude that oxidation is caused by slight Si etching at low temperatures, and thus the preferential oxidation sites on the reconstructed structure must be eliminated by hydrogen etching in order to form an atomically smooth Si(110) surface.

Facile Deposition of Ultrafine Silver Particles on Silicon Surface Not Submerged in Precursor Solutions for Applications in Antireflective Layer

Using a facile deposition method, the ultrafine silver particles are successfully deposited on the Si surface that is not submerged in precursor solutions. The ultrafine silver particles have many advantages, such as quasiround shape, uniformity in size, monodisperse distribution, and reduction of agglomeration. The internal physical procedure in the deposition is also investigated. The results show that there are more particles on the rough Si surface due to the wetting effect of solid‐liquid interface. The higher concentration of ethanol solvent can induce the increase of quantity and size of particles on Si surface not in solutions. The ultrafine particles can be used to prepare porous Si antireflective layer in solar cell applications.

Effect of Hydrogen for Preservation of Reconstructed Surfaces

It is well known that a smooth surface of Si wafers can be obtained by Si surface reconstruction via high-temperature annealing. However, there remains a possibility of smooth Si surfaces deteriorating by accidental oxidation (called reflow oxidation) during the unloading process, i.e., taking out Si wafers from a vertical furnace after high-temperature annealing. Therefore, we considered it important to investigate the atomic-scale effects of oxidation on surface steps and terraces on Si wafers during the unloading process. We examined the effect of unloading temperature on oxide formation on Si (100) and Si (110) surfaces. The change in surface roughness was also measured. Our results indicated a significant improvement in the root mean square values of the surface roughness of terraces on the reconstructed surface. Moreover, this improvement was dependent on the decrease in the oxidation layer thickness in the case of low-temperature unloading. Furthermore, for suppressing reflow oxidation, we replaced the injected Ar gas with H2 in the cooling process during high-temperature Ar annealing and evaluated the thickness of the reflow oxidation layer and surface structure of Si (100) and Si (110). H2 annealing during the cooling process resulted in the formation of H-terminated Si surfaces, and this formation effectively suppressed reflow oxidation. However, the H2 atmosphere also caused etching of the reconstructed Si surfaces. Atomic force microscopy measurements revealed that in spite of the etching, Si (100) and Si (110) surface roughness drastically decreased because of subsequent roughness variation, regarded as being caused by oxidation. In the case of Si (110), characteristic line oxidation was effectively suppressed, resulting in a smooth terrace-and-step structure. In summary, the obtained results suggested that our method is effective for restraining the increase in atomic-scale surface roughness due to oxidation.

Impact of Si surface roughness on MOSFET characteristics with ultrathin HfON gate insulator formed by ECR plasma sputtering

Impact of Si surface roughness on MOSFET characteristics with ultrathin HfON gate insulator formed by ECR plasma sputtering

Silicon anisotropic etching in TMAH solutions containing alcohol and surfactant additives

Wet chemical etching of Si(100) and Si(110) wafers in TMAH solutions containing Triton X-100 and alcohol additives was studied in a wide range of alcohol concentrations. TMAH solutions containing butanol-2 and ternary solutions composed of TMAH+Triton+alcohol, used in the experiments, had not been investigated before. The phenomena associated with the presence of surfactant and alcohol additives in etching solutions were analyzed and the mechanism including co-solving of surfactant molecules in alcohol and interplay in the adsorbing mechanism was proposed. The influence of these phenomena on the etching rates and morphologies of Si(100) and Si(110) was discussed. The addition of alcohol, especially butanol-2, to a TMAH solution resulted in significant improvement of the etched surface finish. The roughness of Si(110) surfaces etched in TMAH+butanol solutions was superior to the roughness of the surfaces etched in TMAH+Triton. The best surface roughness parameters of Si(110) (Ra=0.0322μm and RMS=0.0549μm), measured with an optical profilometer on the area of 1.6mm×1.6mm, were achieved after etching in a ternary solution of TMAH+Triton+butanol. This solution appears to be a good candidate in applications where high quality finish of etched surfaces is required on a substantially high area.

Effect of boron and silicon doping on the surface and electrical properties of diamond like carbon films by magnetron sputtering technique

To improve the surface and electrical properties, silicon (Si) and boron (B) were co-doped in diamond-like carbon (DLC) films prepared on silica substrates by RF magnetron sputtering. In the deposition of a Si, B co-doped DLC film, Si content was controlled by the number of intrinsic Si wafer piece and B content by B target power. The surface roughness and resistivity of film increased by increment in the CC sp3 bond content due to added Si and the surface roughness and resistivity of film decreased by decrement in the CC sp2 bond content due to added B. A CC sp3 bond content in the Si, B co-doped DLC films decreased from 47.4% to 36.5% with increasing B target power compared with from 46.7% to 23.9% in case of the only B doped DLC films. From this result, it can be said that Si can suppress a graphitization of DLC with presence of B. However, the surface roughness and resistivity values of Si, B co-doped DLC films decreased similarly as in only B doped DLC films with an increase in the B target power. These results were caused the SiB sp3 bonds formed smaller than Si sp3 bonds with increase in the B target power as a result of the B-doping effect. In order to minimize the reduction in sp3 bond content over the decrease roughness and resistivity, DLC films were prepared by Si, B co-doping. So, these films can be applied in chemical sensing, electro-synthesis, and electrochemical-based toxic waste detection, remediation, and so on at industrial level.

Investigation of Si(h k l) surfaces etched in KOH solutions saturated with tertiary-butyl alcohol

Anisotropic etching of silicon in KOH solutions saturated with tertiary-butyl alcohol (tert-butanol) was studied in this paper. The influence of KOH concentration of the solution with tert-butanol on Si(1 0 0) surface roughness and convex corners undercut were examined. It was shown that the largest reduction of convex corner undercut is achievable at low (3 M) concentration of KOH, at which, though, the (1 0 0) surface is densely covered with hillocks. The study on etch rate anisotropy and surface morphology of silicon substrates with different crystallographic orientations etched in 3 M KOH solutions with tert-butanol was conducted. The advantage of tert-butanol over isopropanol in terms of shaping three-dimensional structures in the (2 2 1) substrate was presented. The impact of agitation of the etching solution on roughness of (1 1 0) and (h h 1) surfaces and the distribution of hillocks on (1 0 0) and (h 1 1) surfaces were shown. Based on surface tension measurements and theoretical considerations, an adsorption explanation of the visible difference in (1 0 0) surface morphologies in the case of solutions saturated with tert-butanol and isopropanol was proposed. The KOH solution with tert-butanol could be particularly useful for texturing Si(1 0 0) surfaces, due to the possibility of achieving a dense surface coverage with hillocks in the solution saturated with the alcohol.

Roughening and smoothing behavior of single crystal Si by low energy Ar + ion bombardment

We examined the dependence of smoothing or roughening behavior on the initial surface roughness of single crystal Si. An atomically flat cleaved Si surface of roughness 0.038 nm rms and a Si wafer substrate roughness of 0.12 nm rms were sputtered by 0.2–3 keV Ar + ion beam at normal ion incidence. Surface morphology was observed by atomic force microscope (AFM) under DFM mode. Result shows that the rough surface ( R = 0.12 nm rms) becomes smooth ( R = 0.068 nm rms) and the smooth surface ( R = 0.038 nm rms) becomes rough ( R = 0.068 nm rms) due to low energy Ar + ion beam sputtering process and both finally saturates at 0.068 nm rms. The saturated roughness R sat depends on ion beam energy and increases with increasing beam energy. To understand the roughening mechanism, we studied the dynamic scaling theory and measured the roughness exponent α and growth exponent β. The values of α = 1.03 and β = 0.28 are in agreement with the Cuerno’s one dimensional simulation of the Linear diffusion equation with noise, that corresponds to the initial stage of dynamic scaling of ion bombardment.