This paper proposes the use of specialized hardware accelerator based on the Field Programmable Gates Array (FPGA) microchip to compute tsunami wave propagation to assess and manage risks of marine natural disasters, namely, tsunami waves caused by underwater earthquakes. After a sufficiently strong seismic event, many countries and research centres launch extensive computations to estimate the tsunami wave parameters in certain parts of the coast to determine if a declaration of a tsunami alarm is warranted. This requires high computating powers which leads to higher energy costs. The paper demonstrates how an FPGA–based special Calculator (architecture of which has been earlier proposed by the authors), installed on a Personal Computer (PC) could be used to calculate the propagation of a tsunami wave over the entire Pacific Ocean, from the subduction zone offshore Kamchatka Peninsula and Kuril Islands to the coast of Chile. Such calculations offer reliable results within a few minutes and make it possible to obtain the distribution of expected tsunami wave heights along the coast. If the obtained results indicate a danger to the population or possible distruction of infrastructure, it becomes paramount to carry out more detailed calculations to accurately estimate the wave parameters at specific locations along the coast where negative consequences are expected. This requires cluster and/or supercomputer systems, which consume significant energy and hence are expensive. In case the modelling results indicate small values of maximum wave heights at populated coastal areas, population of the near–shore regions can be immediately informed about low amplitude tsunami wave; more detailed studies are not needed. This hence leads to noticeable savings in energy consumption. The paper presents a calculation of the propagation of a tsunami wave across the Pacific Ocean on a personal computer using a FPGA–based hardware acceleration of a computer code execution.
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