Reverse Bias Leakage Current Research Articles

Wide Band Gap a-Si:H Based Ihgh Gain Vidicon Devices Prepared by Chemical Anniealing

ABSTRACTPreviously it was shown that high quality wide gap hydrogenated amorphous silicon material could be prepared by a layer-by-layer technique involving hydrogen chemical annealing. Using this wide gap material, high electric field, n-i-p diode devices were fabricated. Reverse bias dark current was suppressed by optimization of the n-layer doping level (250ppm) and the thickness (2000Å). Working vidicon type device were prepared, tested, and optimized by further reduction in the high reverse bias leakage current. Vidicon devices showed very promising performance; however, at the present stage of development some point defects were observable at the highest reverse bias voltages probed (∼-6×105 V/cm).

Non-Equilibrium InSb/InAISb Diodes Grown by MBE

AbstractThe application of non-equilibrium transport techniques to Molecular Beam Epitaxy (MBE) grown InSb/InAlSb heterostructure diodes has produced practical devices such as midinfrared LED's and negative luminescent sources that operate at room temperature. By extending the epitaxial growth to vicinal InSb substrates it has been demonstrated that the temperature window for high quality epitaxy can be lowered by ∼12°C, giving greatly improved epilayer morphology. The degree of misorientation needed for given growth temperatures is shown from Atomic Force Microscope (AFM) measurements to be only ∼2°. In addition, the lower growth temperature gives improved dopant activation, lower trap densities and lower reverse bias leakage currents, with consequent benefits to device performance.

A hybrid 6H-SiC temperature sensor operational from 25°C to 500°C

6H-SiC buried-gate n-channel depletion-mode junction field-effect transistors (JFETs) were characterized from 25/spl deg/C to 350/spl deg/C in terms of transconductance (g/sub m/), pinchoff voltage (V/sub P/), output resistance (r/sub o/), input resistance (R/sub in/), drain-to-source current at zero gate-to-source voltage (I/sub DSS/), gate-to-source reverse biased leakage current (I/sub GSS/), off-state drain-to-source current (I/sub DSS(off)/), and noise power spectral density (S/sub V/). The 6H-SiC JFET's were used in a hybrid temperature monitoring circuit (tested from -196/spl deg/C to 500/spl deg/C) fabricated at Auburn University for use in numerous industrial applications. Simulation program with integrated circuit emphasis (SPICE) simulations of the temperature monitoring circuit's output voltage corresponded well with measured data as a function of temperature. Linear regression (LR) analysis of measured data revealed a notably sensitive (/spl sim/2.3 mV//spl deg/), and an eminently linear (correlation coefficient =-0.0996...over 25/spl deg/C to 500/spl deg/C range) relationship between the measured output voltage and temperature. Below -50/spl deg/C, the output became nonlinear, presumably from carrier freeze-out effects. To the best of our knowledge, this represents the first successful implementation of SiC active devices into a temperature sensor which demonstrated stable operation up to 500/spl deg/C.

Plasma-induced damage of GaAs pn-junction diodes using electron cyclotron resonance generated Cl2/Ar, BCl3/Ar, Cl2/BCl3/Ar, and SiCl4/Ar plasmas

Plasma-induced etch damage often degrades the electrical and optical performance of III–V high-density integrated circuits and photonic devices. We have investigated the etch-induced damage of electron cyclotron resonance (ECR) generated plasmas on the electrical performance of mesa-isolated GaAs pn-junction diodes. Cl2/Ar, BCl3/Ar, Cl2/BCl3/Ar, and SiCl4/Ar ECR plasmas at ion energies ranging from 10 to 200 eV were studied. Diodes fabricated under low dc-bias (≤100 V) etch conditions yielded low reverse-bias currents which were comparable to wet-chemical-etched devices. As the dc bias was increased, the diodes showed significantly higher reverse-bias currents indicating plasma-induced sidewall damage of the pn-junction. Variations in diode reverse-bias leakage currents are reported as a function of plasma parameters and chemistries.

A novel self-aligned TiN formation by N/sub 2//sup +/ implantation during two-step annealing Ti-salicidation for submicrometer CMOS technology application

A new technology of self-aligned TiN/TiSi/sub 2/ formation using N/sub 2//sup +/ implantation during two-step annealing Ti-salicidation process has been developed. The formation of TiN was confirmed by RBS analysis. The leakage currents of n/sup +//p junction diodes fabricated using this technology were measured to investigate the phenomena of Al spiking into Si-substrate. The measured reverse-bias leakage current of diode per unit junction area with Al/TiN/TiSi/sub 2/ contact is 1.2 nA/cm/sup 2/ at -5 V, which is less than all of reported data. Also it can sustain the annealing process for 30 min at 500/spl deg/C. Thus, TiN formed with this technology process is suggested as a very effective barrier layer between TiSi/sub 2/ and Al for submicron CMOS technology applications.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Investigation of plasma etch induced damage in compound semiconductor devices

We have investigated the electrical performance of mesa-isolated GaAs pn-junction diodes to determine the plasma-induced damage effects from reactive ion and reactive ion beam etching (RIBE). A variety of plasma chemistries (SiCl4, BCl3, BCl3/Cl2, and Cl2) and ion energies ranging from 100 to 400 eV were studied. We have observed that many of the reactive ion etching BCl3/Cl2 plasmas and RIBE Cl2 plasmas yield diodes with low reverse-bias currents that are comparable to the electrical characteristics of wet-chemical-etched devices. The reverse-bias leakage currents are independent of surface morphology and sidewall profiles.

Study of tantalum-based diffusion barriers between Al and Si

We have investigated sputter-deposited TaSi x , TaSi x N y , and TaSi x N y /TaSi x thin films as the diffusion barrier between aluminum and silicon. The sheet resistance of the films was measured. The structure of the films was determined by transmission electron micrographs and X-ray diffraction patterns. A thermal stability study was performed by measuring the reverse bias leakage current on n +− p Si junction diodes and the specific contact resistance on n + Si after various sintering conditions. We found that the TaSi x film in the TaSi x N y /TaSi x bilayer structure showed the advantage of low sheet resistance and low specific contact resistance. The existence of TaSi x N y in the bilayer structure gives a high resistance to the AlSi interdiffusion. The bilayer structure is thermally stable up to 530°C.

Using reverse bias currents to differentiate between bulk degradation and interfacial degradation in hydrogenated amorphous silicon p-i-n structures

The ‘‘analysis of microelectronic and photonic structures’’ (amps) transport-simulation computer program has been used to show that a distinction can be made between the effects of light-induced bulk and interfacial degradation in hydrogenated amorphous silicon (a-Si:H) p-i-n detector and solar cell structures. Using reverse bias leakage (dark) currents, amps simulations show that, for p and n layers that do not allow significant injection of electrons and holes into the intrinsic layer of the p-i-n structure, a light-induced increase in the density of interfacial states will result in significantly different changes in the voltage behavior of the reverse bias dark currents than will a corresponding increase in the density of bulk defect states. This communication demonstrates that a careful study of the reverse bias dark currents can provide an excellent means of determining if light soaking of a-Si:H p-i-n devices results in bulk degradation, interfacial degradation, or both.

Bonded silicon-on-sapphire wafers and devices

Silicon-on-sapphire (SOS) has been prepared by direct wafer bonding. The silicon layer was thinned to about 10 μm by mechanical grinding and chemical etching. P-N junction diodes were fabricated in the bonded SOS and compared with epitaxially grown SOS. The reverse bias leakage current was almost 15× less in the bonded SOS. A generation lifetime of 10 μs can be estimated from the junction leakage. The effects of processing temperatures on the bonded SOS were also studied.

Origins of reverse bias leakage currents in hydrogenated amorphous silicon p-i-n detector structures

The transport-simulation computer program amps has been used to explore the origin and behavior of dark leakage currents in hydrogenated amorphous silicon p-i-n detector structures. A comparison of simulated and experimental data reveals that the experimentally observed voltage dependence of the reverse bias current-voltage characteristics can be explained by a varying defect density through the i layer, due either to dopant permeation or to Fermi-level-driven defect densities, as well as by the previously suggested field-enhanced generation. amps simulations indicate that the dependence of these reverse leakage currents on i-layer thickness would be useful in determining the relative importance of each possible mechanism.

Physical and electrical characterization of in situ boron-doped single-crystal silicon films grown at 450°C using remote plasma-enhanced chemical vapor deposition

The ability to deposit boron-doped homoepitaxial silicon films at very low temperatures (450°C) using remote plasma-enhanced chemical vapor deposition (RPCVD) has been investigated. The boron incorporation efficiency is found to be between 0.2 and 0.4. 100% electrical activation is obtained for an epitaxial silicon film with boron doping of 1 x 10 19 cm −3 deposited at 450°C. The current-voltage characteristics for mesa diodes fabricated on these in situ boron-doped films where the maximum temperature during the entire fabrication process was kept below 450°C indicate an ideality factor of 1.2 and reverse bias leakage current of 320 nA cm −2. Addition of diborane is found to result in the genaration of defects which require increased deposition temperatures compared with undoped films to maintain excellent crystalline quality.

Quantum-confined Stark effect in InGaAs/InP multiple quantum wells grown by solid source molecular beam epitaxy

We report the first observation of the quantum-confined Stark effect (QCSE) in In 0.53Ga 0.47As/InP multiple quantum wells (MQWs) grown by solid source molecular beam epitaxy (SSMBE). MQW PIN diodes have been fabricated with reverse bias leakage currents of ≅ 10 nA at -35 V, for 400 μm diameter mesas. Room temperature photocurrent measurements on diodes with nominal 55 Å wells show well resolved excitonic absorption at around 1.55 μm and exhibit shifts of up to 39 meV at -35 V.

Effect of etch treatment prior to Schottky contact fabrication on In0.05Ga0.95As

The Schottky barrier characteristics of aluminum contacts to In0.05Ga0.95As/GaAs strain-relieved material were investigated. Acidic and alkaline wet chemical etching experiments were performed to determine the importance of semiconductor surface preparation prior to the deposition of the contact metal. Acidic etch treatments utilizing HCl and HF resulted in a range of ideality factors significantly greater than 1 (1.90–2.91 for HCl, 1.35–2.46 for HF), variable reverse bias leakage currents (0.038–0.440 μA/cm2 for HCl, 23.0–110 μA/cm2 for HF), and a range of barrier heights (0.88–0.93 eV for HCl, 0.63–0.77 eV for HF). In addition, the HCl treated devices exhibit time-dependent I-V behavior with continuous measurements, as well as changes in characteristics with both annealing and room-temperature storage. The 10 s NH4OH:H2O (1:1) alkaline etch surface preparation produced stable Schottky contacts with a 0.79 eV barrier height, a 1.15±0.02 ideality factor, and ≊10 μA/cm2 leakage current at −1 V bias.

Ultrashallow, high doping of boron using molecular layer doping

A new doping method named molecular layer doping (MLD) is proposed. MLD is based on surface chemical adsorption of dissolvements from induced dopant gas molecules. Ultrashallow boron-doped layers are successfully achieved by MLD using B2 H6 gas. The p+ n junction formed by MLD exhibits excellent characteristics, with a reverse bias leakage current of less than 2.5×10−16 A/μm2 at 5 V. MLD is attractive in that it offers high-density, shallow-junction, damage-free, selective doping in a short time.

Electronic defects in silicon induced by MeV carbon and oxygen implantations

Electrical properties of silicon above buried defect layers formed by MeV carbon and oxygen implantation were investigated. Energies ranging from 2 to 4 MeV and doses from 5 × 10 14 to 10 16 cm −2 were used. By studying the reverse bias leakage currents of P +/N junction diodes after MeV implantation and subsequent annealing at 950 ° C for 1 h, it was found that the electrical defects are mostly localized near the peaks of the implant profiles. In cases of 4 MeV carbon and oxygen implantations at a dose of 10 15 cm −2, average leakage currents less than 5 nA/cm 2 at 10 V reverse bias were obtained. The average minority carrier lifetimes in the top 2 μm were about 100 μs.

Selective epitaxial growth silicon bipolar transistors for material characterization

In development of the epitaxial lateral overgrowth (ELO) bipolar transistor, devices were fabricated in silicon selective epitaxial growth (SEG). These devices were used to electrically characterize the quality of the SEG material. Three silicon bipolar transistors, with almost identical doping profiles and geometries were simultaneously fabricated on the same wafer and their electrical characteristics compared. The three transistors were located in the substrate, a single SEG layer, and a double (interrupted growth) SEG layer. The SEG silicon was grown in a reduced-pressure RF-heated pancake-type epitaxial reactor at 950 degrees C and 150 torr. The transistors were tested for junction ideality factors, junction reverse-bias leakage currents, and forward DC current gain. Test results indicated the excellent device quality of the SEG material relative to the substrate. >

Rapid Thermal Annealing of Fib-Implanted Ga Shallow Impurity Profiles

ABSTRACTIn this paper, we present the results of a study to fabricate shallow p+ n junction using Ga FIB implantation in conjunction with rapid thermal annealing (RTA). A focused 75 KeV ion beam with BO mA/cm2 current density and 0.5 μm beam diameter was used to implant Ga into (100) Si substrates at the doses from 1E13 to 5E15/cm2. The annealing temperature is from 600 °C to 1000 °C for various times, 10–30 sec. Secondary ion mass spectrometry (SIMS) and spreading resistance profiling (SRP) were used to measure the implanted Ga atomic and carrier concentration depth profiles. As compared to the conventional broad beam (BB) implantation, the FIB implanted impurity concentration depth profile has a longer tail and thus a deeper p+n junction. The damage generated by the high dose rate implantation is possibly responsible for this phenomenon. The results of SRP measurements of the FIB as-implanted samples show no Scif-anneal ing occured during implantations. p+n diodes fabricated using FIB exhibit good junction properties: ideality factor of 1.1, reverse–bias leakage current of below 5 nA/cm2 at -IV, and breakdown voltage of about 35 V.

Defects and leakage currents in BF2-implanted preamorphized silicon

High-dose silicon implants have been used to preamorphize the surface of single-crystal silicon prior to the implantation of low-energy BF2. The preamorphization results in shallow junction formation with minimal channeling of the boron, but high concentrations of electrically active defects are formed, leading to excessive reverse bias leakage currents. Measurements of leakage current and deep-level defects indicated that two distinct types of electrically active defects were important: those associated with what are probably complexes or clusters of point defects located near the far end of the range of the implanted silicon, and those associated with extended defects (loops) at the edge of the regrown amorphous region. The former defects were deep-level donors present in high concentrations (&amp;gt;1017 cm−3) after regrowth of the amorphous layer at 600 or 700 °C and resulted in leakage currents &amp;gt;10−4 A/cm2. These centers could be annealed out at 800 °C reducing the leakage current to values between 5×10−8 and 2×10−5 A/cm2 depending upon the relative locations of the extended defects and the metallurgical junction. Measurements and modeling have shown that the location of the band of extended defects is critical in controlling the leakage current and that it will need to be a few hundred angstroms shallower than the junction itself for the associated generation current to be fully suppressed.

Electrical characteristics and contact resistance of B+-and BF2+-implanted silicon diodes with furnace and rapid thermal annealing

Shallow p+-n junctions in silicon are fabricated by the implantation of 10 keV B+or 50 keV BF 2+ ions at a fluence of 3 × 1015/ cm2through a capping layer of 25-nm SiO 2 . Sheet resistance, contact resistivity, and forward and reverse bias leakage current are measured for various furnace and rapid thermal annealing (RTA) conditions. SIMS profiles are included. RTA allows the simultaneous achievement of junctions with j R_{s}\simeq 50 \Omega/ , and \rho_{c}\simeq 2 \times 10^{-6}\Omega . cm2for junction depths of the order of 0.25 µm as mesured by the traditional bevel-and-strain method.

Ion implanted GaAs bipolar transistors

GaAs n-p-n bipolar transistors were fabricated by ion implanting Be and Se into bulk n-type substrate material. Devices with mesa collectors exhibit a d.c. current gain hFE ≃ 8 and a reverse bias leakage current of less than 10 nA.