Resistor-loaded Inverter Research Articles

Retention characteristics of a nonvolatile latch utilizing a ferroelectric transistor

This paper presents retention characteristics and design recommendations for a nonvolatile latch circuit based on a ferroelectric field-effect transistor. In the design, the use of a ferroelectric transistor in a resistive load inverter allows tuning of the circuit for each ferroelectric transistor size. An estimate of the retention time, due to the unique polarization properties of the ferroelectric layer at the gate, is provided for each transistor size. Data collected for three transistor sizes display the possibility of retaining a stored value beyond a 10-year period, with various size transistors indicating 13–38-year retention periods. Switching the ferroelectric layer polarization between two distinct states by applying either negative or positive poling voltages to the gate of the ferroelectric transistor is explored. Experimental results are presented for each transistor, and detailed retention predictions are shown by measured and extrapolated data. Design parameter recommendations are made for optimization of the retention time of the circuit depending on the transistor size.

Fully Printed Top-Gate Metal–Oxide Thin-Film Transistors Based on Scandium-Zirconium-Oxide Dielectric

The fully inkjet-printed top-gate metal-oxide thin-film transistors (TFTs) with excellent electrical performance are realized with the gate dielectric layer of scandium zirconium oxide (Sc <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> Zr <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> ). It is found that adding of nitrate-based scandium oxide (ScO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> ) precursor into the chloride ligand-based zirconium oxide (ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> ) precursor will reduce the corrosivity of the mixed solution, and the incorporation of Zr ions into ScOx will suppress the hydrogen-ion migration and eliminate the acceptor-like traps in pure ScO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> . The fully printed indium gallium oxide (InGaO) TFTs based on Sc <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> Zr <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> Ox dielectric exhibited an average mobility of 10.8 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> · s <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> , a highest mobility of 12.9 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> · V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> · s <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> , negligible hysteresis, and excellent stability under both the negative and positive bias stresses. In addition, a resistor-loaded inverter was fabricated using a fully printed InGaO TFT, which exhibited the full swing characteristics and a maximum gain of 5 at 2 V.

Proton-Conductor-Gated MoS2 Transistors with Room Temperature Electron Mobility of &gt;100 cm2 V–1 s–1

Room temperature electron mobility of >100 cm2 V–1 s–1 is achieved for a few-layer MoS2 transistor by use of a polyanionic proton conductor as the top-gate dielectric of the device. The use of a proton conductor that inherently exhibits a cationic transport number close to 1 yields unipolar electron transport in the MoS2 channel. The high mobility value is attributed to the effective formation of an electric double layer by the proton conductor, which facilitates electron injection into the MoS2 channel, and to the effective screening of the charged impurities in the vicinity of the device channel. Through careful temperature-dependent transistor and capacitor measurements, we also confirm quenching of the phonon modes in the proton-conductor-gated MoS2 channel, which should also contribute to the achieved high mobility. These devices are then used to assemble a simple resistive-load inverter logic circuit, which can be switched at high frequencies above 1 kHz.

Flexible IZO Homojunction TFTs With Graphene Oxide/Chitosan Composite Gate Dielectrics on Paper Substrates

Solution-processed graphene oxide/chitosan composite electrolyte film showed a large specific gate electric-double-layer capacitance of $\sim 3.16~\mu \text{F}$ /cm $^{{\mathsf {2}}}$ at 1 Hz. Indium–zinc-oxide (IZO) homojunction thin-film transistors (TFTs) on paper substrates using such composite electrolytes as gate dielectrics showed a good electrical performance and a high stability. Flexible IZO-based homojunction TFTs showed a high drain current ON/OFF ratio of $\sim \textsf {1.8}\times \textsf {10}^{{\textsf {7}}}$ , a large field-effect mobility of >30 cm $^{{\textsf {2}}}\text{V}^{{-\textsf {1}}}\text{s}^{{-\textsf {1}}}$ , and a low subthreshold swing of 90 mV/decade. At last, a resistor-loaded inverter with a maximal conversion factor of 6.7, and a dual in-plane gate NAND logic operation were also demonstrated on such flexible IZO-based TFTs. Such oxide-based homojunction TFTs on paper substrates have potential applications in next-generation low-cost and portable new-concept electronics.

Pulmonary repercussions in patients with Fabry disease

We report on InGaZnO (IGZO) thin film transistors (TFTs)-based bio-chemical sensors which can detect the chemical/biological species. As novel sensing platform, the IGZO TFT with Ag nanowire (NW) mesh showed pronounced output voltage changes responding to all analytes of H2O2, b-d-glucose, d-glucono-1,5-Lactione, and lactic acid, which are reproducible and reversible. Herein, porous Ag NW-functionalized top gate electrode plays a major role in sensing platform for enhanced sensing capability in aqueous medium. Moreover, these top gate geometry serve as a stable backplane for electrical modulation. As a result, analytes solutions become acidic or basic and such pH alterations induce significant turn-on voltage shifts on our devices. For implementation of a resistive load inverter, the output sensing voltage signals can be directly extracted, and such signals are reproducible and reversible. The proposed IGZO TFTs with Ag NW mesh top gate electrode based sensing platform pave the way for development of portable and reusable real-time non-destructive label-free chemical/biological sensors.

InGaZnO transistor based on porous Ag nanowire-functionalized gate electrode for detection of bio-relevant molecules

We report on InGaZnO (IGZO) thin film transistors (TFTs)-based bio-chemical sensors which can detect the chemical/biological species. As novel sensing platform, the IGZO TFT with Ag nanowire (NW) mesh showed pronounced output voltage changes responding to all analytes of H2O2, b-d-glucose, d-glucono-1,5-Lactione, and lactic acid, which are reproducible and reversible. Herein, porous Ag NW-functionalized top gate electrode plays a major role in sensing platform for enhanced sensing capability in aqueous medium. Moreover, these top gate geometry serve as a stable backplane for electrical modulation. As a result, analytes solutions become acidic or basic and such pH alterations induce significant turn-on voltage shifts on our devices. For implementation of a resistive load inverter, the output sensing voltage signals can be directly extracted, and such signals are reproducible and reversible. The proposed IGZO TFTs with Ag NW mesh top gate electrode based sensing platform pave the way for development of portable and reusable real-time non-destructive label-free chemical/biological sensors.

Chitosan-Based Electrolyte Gated Low Voltage Oxide Transistor With a Coplanar Modulatory Terminal

Indium-zinc-oxide thin-film transistors (TFTs) using chitosan-based bio-polysaccharide electrolytes as the gate dielectric are fabricated. The TFTs show a good electrical performance with a very low operation voltage of ~1.0 V. Specific gate capacitance of the electrolyte film and electrical performance of the TFTs can be effectively modulated by the coplanar modulatory terminal due to synergic proton gating effects. Furthermore, a resistor-loaded inverter is investigated, and balanced noise margin is obtained. Such oxide-based TFTs with additional modulatory terminal may find potential applications in portable electronics.

용액 공정 기반의 인듐 아연 산화물 트랜지스터의 PMMA 보호막 여부에 따른 신뢰성 평가

We investigated poly(methyl methacrylate) (PMMA) passivation of solution-processed indium zinc oxide (IZO) thin-film transistors (TFTs). PMMA provides solution-processability and good barrier characteristics against environmental elements such as water and oxygen. The PMMA passivation layers protect the IZO active layer of the TFTs without deteriorating their performance during gate bias stress measurements under ambient conditions, and improve their electrical properties by decreasing leakage current. Moreover, the potential to safely manipulate IZO-TFTs after PMMA passivation was proven by realizing a simple n-channel resistive-load inverter. †(Received May 27, 2015)

Metal-oxide thin-film transistor-based pH sensor with a silver nanowire top gate electrode

Amorphous InGaZnO (IGZO) metal-oxide-semiconductor thin-film transistors (TFTs) are one of the most promising technologies to replace amorphous and polycrystalline Si TFTs. Recently, TFT-based sensing platforms have been gaining significant interests. Here, we report on IGZO transistor-based pH sensors in aqueous medium. In order to achieve stable operation in aqueous environment and enhance sensitivity, we used Al2O3 grown by using atomic layer deposition (ALD) and a porous Ag nanowire (NW) mesh as the top gate dielectric and electrode layers, respectively. Such devices with a Ag NW mesh at the top gate electrode rapidly respond to the pH of solutions by shifting the turn-on voltage. Furthermore, the output voltage signals induced by the voltage shifts can be directly extracted by implantation of a resistive load inverter.

One-dimensional InGaZnO field-effect transistor on a polyimide wire substrate for an electronic textile

Amorphous InGaZnO (IGZO) is a promising semiconducting material to replace amorphous and polycrystalline Si. IGZO-based field-effect transistors (FET) can be versatile platforms for various electronic or optoelectronic applications. Here, we report on a one-dimensional (1-D) IGZO FET fabricated on a flexible polyimide wire substrate for electronic textiles (e-textiles). This flexible 1-D IGZO FET shows a high mobility of 18.18 cm2/Vs with a relatively good on/off current ratio of 104 at operating voltages below 5 V. Furthermore, a resistive-load inverter is implemented by connecting the 1-D IGZO FET to an external load resistor. Such an inverter exhibits obvious voltage switching characteristics, verifying the potential it is being a basic building block for an e-textile circuit system.

Protonic/electronic hybrid oxide transistor gated by chitosan and its full-swing low voltage inverter applications

Modulation of charge carrier density in condensed materials based on ionic/electronic interaction has attracted much attention. Here, protonic/electronic hybrid indium-zinc-oxide (IZO) transistors gated by chitosan based electrolyte were obtained. The chitosan-based electrolyte illustrates a high proton conductivity and an extremely strong proton gating behavior. The transistor illustrates good electrical performances at a low operating voltage of ∼1.0 V such as on/off ratio of ∼3 × 107, subthreshold swing of ∼65 mV/dec, threshold voltage of ∼0.3 V, and mobility of ∼7 cm2/V s. Good positive gate bias stress stabilities are obtained. Furthermore, a low voltage driven resistor-loaded inverter was built by using an IZO transistor in series with a load resistor, exhibiting a linear relationship between the voltage gain and the supplied voltage. The inverter is also used for decreasing noises of input signals. The protonic/electronic hybrid IZO transistors have potential applications in biochemical sensors and portable electronics.

Nonvolatile Ferroelectric Memory Circuit Using Black Phosphorus Nanosheet-Based Field-Effect Transistors with P(VDF-TrFE) Polymer.

Two-dimensional van der Waals (2D vdWs) materials are a class of new materials that can provide important resources for future electronics and materials sciences due to their unique physical properties. Among 2D vdWs materials, black phosphorus (BP) has exhibited significant potential for use in electronic and optoelectronic applications because of its allotropic properties, high mobility, and direct and narrow band gap. Here, we demonstrate a few-layered BP-based nonvolatile memory transistor with a poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric top gate insulator. Experiments showed that our BP-based ferroelectric transistors operate satisfactorily at room temperature in ambient air and exhibit a clear memory window. Unlike conventional ambipolar BP transistors, our ferroelectric transistors showed only p-type characteristics due to the carbon-fluorine (C-F) dipole effect of the P(VDF-TrFE) layer, as well as the highest linear mobility value of 1159 cm(2) V(-1) s(-1) with a 10(3) on/off current ratio. For more advanced memory applications beyond unit memory devices, we implemented two memory inverter circuits, a resistive-load inverter circuit and a complementary inverter circuit, combined with an n-type molybdenum disulfide (MoS2) nanosheet. Our memory inverter circuits displayed a clear memory window of 15 V and memory output voltage efficiency of 95%.

High-Performing Thin-Film Transistors in Large Spherulites of Conjugated Polymer Formed by Epitaxial Growth on Removable Organic Crystalline Templates.

Diketopyrrolopyrrole (DPP)-based conjugated polymer PDTDPPQT was synthesized and was used to perform epitaxial polymer crystal growth on removable 1,3,5-trichlorobenzene crystallite templates. A thin-film transistor (TFT) was successfully fabricated in well-grown large spherulites of PDTDPPQT. The charge carrier mobility along the radial direction of the spherulites was measured to be 5.46-12.04 cm(2) V(-1) s(-1), which is significantly higher than that in the direction perpendicular to the radial direction. The dynamic response of charge transport was also investigated by applying a pulsed bias to TFTs loaded with a resistor (∼20 MΩ). The charge-transport behaviors along the radial direction and perpendicular to the radial direction were investigated by static and dynamic experiments through a resistor-loaded (RL) inverter. The RL inverter made of PDTDPPQT-based TFT operates well, maintaining a fairly high switching voltage ratio (Vout(ON)/Vout(OFF)) at a relatively high frequency when the source-drain electrodes are aligned parallel to the radial direction.

Lateral protonic/electronic hybrid oxide thin-film transistor gated by SiO2 nanogranular films

Ionic/electronic interaction offers an additional dimension in the recent advancements of condensed materials. Here, lateral gate control of conductivities of indium-zinc-oxide (IZO) films is reported. An electric-double-layer (EDL) transistor configuration was utilized with a phosphorous-doped SiO2 nanogranular film to provide a strong lateral electric field. Due to the strong lateral protonic/electronic interfacial coupling effect, the IZO EDL transistor could operate at a low-voltage of 1 V. A resistor-loaded inverter is built, showing a high voltage gain of ∼8 at a low supply voltage of 1 V. The lateral ionic/electronic coupling effects are interesting for bioelectronics and portable electronics.

Rutile TiO2 active-channel thin-film transistor using rapid thermal annealing

TiO2 active-channel thin-film transistors (TFTs), in which the bottom-gate top-contact architecture was prepared with atomic layer deposition grown TiO2 as the semiconducting layer, were fabricated and then investigated based on key process parameters, such as the rapid thermal annealing (RTA) temperature. Structural analyses suggested that TiO2 films annealed at temperatures above 500 °C changed from an amorphous to a rutile phase. The TFT with a TiO2 semiconductor annealed at 600 °C exhibited strongly-saturated output characteristics, a much higher on/off current ratio of 4.3 × 105, and an electron mobility of 0.014 cm2/Vs. Moreover, the potential for manipulating TiO2-based TFTs with RTA methodology was demonstrated through the realization of a simple resistive-load inverter.

Design and Analysis of N-Type CNTFET Based 2 X 1 Multiplexer

This paper enumerates the efficient design and analysis of N-type CNTFET based 2X1 Multiplexer. The Multiplexer is designed using Ballistic CNTFET (VHDL-AMS model) with the dcnt of 1nm in resistive load inverter logic. The transient and power analysis are obtained with operating voltage at 0.6V for the multiplexer using system vision tool. There are many issues facing while integrating many number of transistors like short channel effect, power dissipation, scaling of the transistors. To overcome these problems by Consider the carbon nano tube(CNT) have promising application in the field of electronics. The simulation results are presented, and the power consumptions are compared with the conventional MOSFET design. The comparison of results indicated that the CNTFET based design is capable of efficient power savings.

Flexible and stable solution-processed organic field-effect transistors

Highly stable, solution-processed, small molecule-polymer blend organic field-effect transistors (OFETs) with a top-gate geometry were demonstrated on a flexible polyethersulfone (PES) substrate. The top-gate dielectric was a bi-layer comprised of CYTOP and a high- k Al 2O 3 layer grown by atomic layer deposition (ALD). A solution processed 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) and poly(triarylamine) (PTAA) blend was used as the organic semiconductor. TIPS-pentacene and PTAA blend OFETs with the CYTOP/Al 2O 3 bi-layer top gate dielectric showed an averaged saturation mobility value of 0.24 ± 0.08 cm 2/Vs at operation voltages below 8 V. A constant direct-current bias stress test was carried out to examine their operational stability for 2 h. Under bias stress, neither significant change in mobility nor shift in the threshold voltage has been observed in these OFETs. To evaluate the real potential of these OFETs towards the development of circuit components commonly used in electronic applications, a resistive-load inverter was implemented by connecting an OFET to an external load resistor. Excellent stability of the transistor led to electrically stable inverters with negligible variations of the voltage transfer characteristics before and after bias stress. After the operational stability test, these OFETs were exposed to air and then were subjected to bending experiments. Even after exposure to air for 4 months and bending for 30 min, no significant changes in performance were observed in either a single transistor device or in a resistive-load inverter.

Electrical Characteristics of Large-Scale Integration Silicon MOSFET's at Very High Temperatures,Part III: Modeling and Circuit Behavior

The effects of high temperature (27°C to 300°C) on electrical characteristics of long n and p channel metal-oxide semiconductor fieldeffect transistors (MOSFET's) are used to extend the validity of the conventional (room temperature) large and small signal models of these devices. A complementary metal-oxide semiconductor (CMOS) inverter's transfer characteristics and switching speed performance, and the frequency response of a simple resistive load inverter are presented, with temperature as a parameter. Some implications of the models developed, on analog MOS circuit design (for high-temperature, operation), are discussed.