Reset Signal Research Articles

Increase of radiation sensitivity of ESR centres by faulting and criteria of fault dates

The ESR spectra and ages of the fractured rocks along the Itoigawa-Shizuoka Tectonic Line, a major fault in Japan, were measured. The ESR signal intensities tend to become larger with decreasing distance from the fault boundary, because the radiation sensitivities of the ESR centres have increased by faulting. According to fracturing and heating experiments, when the radiation sensitivities of ESR centres have visibly increased, the signals may have been almost completely reset by faulting. As a result of the increase of radiation sensitivity, the error range of the TD values for incompletely reset ESR signals is comparatively large, whereas it is smaller in the case of completely reset signals. Therefore, by assessing the error range of TD values we can determine whether ESR signals were completely reset at the time of faulting.

Gallium arsenide digital integrated circuits for controlling SLAC CW-RF systems

In order to fill the PEP and SPEAR storage rings with beams from the SLC (Stanford Linear Collider) linac and damping rings, precise control of the linac subharmonic buncher and the damping ring RF is required. Resettable GaAs master/slave D-type flip-flops have recently been developed which are capable of operating at frequencies of 3 GHz and higher. Using these digital devices as frequency dividers, one can phase-shift the SLAC (Stanford Linear Accelerator Center) continuous-wave (CW) RF systems to optimize the timing for filling the storage rings. The performance of integrated circuits from two vendors was evaluated for this application. Using microstrip circuit techniques, the authors built and operated in the accelerator several chassis to synchronize a reset signal from the storage rings to the SLAC 2.856-GHz RF and to phase-shift divide-by-four and divide-by-sixteen frequency dividers to the nearest 350-ps bucket required for filling.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A CMOS VLSI chip for filtering of TV pictures in two dimensions

Low-cost digital transmission of color TV signals over the channels of a future broad-band network (Integrated Services Digital Network, or ISDN) requires data reduction by digital low-pass filters. Low-pass filtering of a TV picture amounts to process pixels which are adjacent in either the horizontal or vertical direction. For this purpose, the pixels must be stored in a delay unit. A VLSI chip with a delay unit is reported that is based on a resettable first-in-first-out (FIFO) memory and a pipelined arithmetic unit. The FIFO concept starts from a three-transistor cell array which is accessed by a pointer and customized to a FIFO memory by suitable second-layer metal wiring. Rather than cascade registers, the FIFO memory can be adapted to different standards by the reset signal for the pointer. The approach results in a regular compact design (80-kbit transistors, 31 mm/SUP 2/). An experimental chip fabricated with 1.5-/spl mu/m CMOS technology operates up to 22 MHz (typical values). A data stream of 22/spl times/32 Mb/s is exchanged between the memory and the arithmetic basic unit.

An electronic readout for radiotherapy treatment couch rotation

The system described involves counting markings on the circumference of a strobed disc. The system employs a 4 track disc: 2 tracks are used to define the degree of rotation; a third to indicate which semicircle the couch is in and a fourth to give a reset signal when the couch passes through zero degrees. In association with the special logic system featuring good immunity to external signals, this has resulted in a simple device in which accumulated error is unlikely, spurious counting is practically eliminated and an accuracy of +or-1 degrees can be obtained using simple machining techniques to produce the disc.

A Simple Method for Digital Recording of Mass Spectra

A simple method has been developed for digital measurement and recording of mass spectra. The system consists of a peak memory, a maximum detector, a measure command generator, an automatic reset signal generator and a conventional autorange digital voltmeter. It can measure the peak height of mass spectra from 3 mV to 10 V. The precision is within ± 0.5% for the input signal higher than30 mV.

A controlled analogue pulse height store

The analogue pulse height store stores the height of an input signal (5 V max.) up to maximally 100 μsec after the time of occurrence of the peak of the input signal within an accuracy of 0.6 mV. The analogue pulse height store can be used in series with the input of an 8192 channel analogue-to-digital converter and may serve the purpose of “time-derandomizing”. The advantage of such a circuit when converting analogue information obtained from radiation detectors into digital information, will be shown. The circuit is composed of a linear gate and stretcher, to be described here, and associated control circuit. The operation of the control circuit of the analogue pulse height store circuit is influenced by the threshold, lower level and upper level discriminators, (anti)-coincidence requirements and analogue pulse height store reset signal. At the moment that stored information is available the control circuit generates an “analogue pulse height storage ready” signal. Ambient temperature changes and repetition rate variations do not effect the output base line level significantly. Dielectric absorption in the storage capacitor and loss of charge effects are compensated.