Relaxed Buffer Layers Research Articles

The dissociation of (a+c) misfit dislocations at the InGaN/GaN interface.

In hexagonal materials, (a+c) dislocations are typically observed to dissociate into partial dislocations. Edge (a+c) dislocations are introduced into (0001) nitride semiconductor layers by the process of plastic relaxation. As there is an increasing interest in obtaining relaxed InGaN buffer layers for the deposition of high In content structures, the study of the dissociation mechanism of misfit (a+c) dislocations laying at the InGaN/GaN interface is then crucial for understanding their nucleation and glide mechanisms. In the case of the presented plastically relaxed InGaN layers deposited on GaN substrates, we observe a trigonal network of (a+c) dislocations extending at the interface with a rotation of 3° from <1 00> directions. High-resolution microscopy studies show that these dislocations are dissociated into two Frank-Shockley 1/6<2 03> partial dislocations with the I1 BSF spreading between them. Atomistic simulations of a dissociated edge (a+c) dislocation revealed a 3/5-atom ring structure for the cores of both partial dislocations. The observed separation between two partial dislocations must result from the climb of at least one of the dislocations during the dissociation process, possibly induced by the mismatch stress in the InGaN layer.

Crystallization characteristics of Li2O–Nb2O5 compound films on sapphire substrates and formation of crack-free and thick LiNbO3 epitaxial films

The formation of crystal phases in Li 2 O–Nb 2 O 5 compound films deposited on sapphire C-plane and A-plane substrates was studied by X-ray diffraction. Sufficiently oxidized samples with Li-deficient or stoichiometric compositions were prepared by co-sputtering from LiNbO 3 (LN) and Li 2 O targets. Crystallization during deposition at elevated temperatures and solid-phase crystallization (SPC) of deposited amorphous films were investigated. For films on sapphire C-planes, nucleation into Li 3 NbO 4 (222) domains occurred at the onset temperature of crystallization. In the case of stoichiometric films, the LN(006) signal indicating epitaxial growth was the primary one for crystallization during deposition above 460 °C and SPC above 750 °C. Misoriented LN(104) domains tended to coexist with LN(006) domains. In the case of Li-deficient films, LiNb 3 O 8 (_602) domains coexisted with LN(006) at temperatures above 750 °C as a result of Li 2 O loss. For films on sapphire A-planes, epitaxial LN(110) domains were predominant. Li 3 NbO 4 (222) domains were totally absent and the signal intensity of LiNb 3 O 8 (212) was less than 10% of that of LN(110) even for the Li-deficient films, which reflected fast crystallization of LN(110) domains. The SPC rate of stoichiometric film was considerably lower than that of Li-deficient film. As-crystallized LN film on the sapphire C-plane was strained with a narrow domain width. Thick film cracked as a result of stress caused by lattice mismatch with the substrate. In contrast, LN film processed by SPC was not strained and had large domains with flat film surface. Based on these results, crack-free 1-μm-thick LN epitaxial films on a sapphire C-plane were achieved. First, an amorphous LN buffer was subject to SPC to obtain a relaxed buffer layer. Subsequently, a stress-free thick LN overlayer was grown by co-sputtering from Li 2 O and LN targets at 530 °C. The relaxed buffer layer effectively mitigated the strain caused by the lattice mismatch with the substrate.

Strained Si Nanosheet pFET Based on SiC Strain Relaxed Buffer Layer for High Performance and Low Power Logic Applications

Strained Si Nanosheet pFET Based on SiC Strain Relaxed Buffer Layer for High Performance and Low Power Logic Applications

Strain engineering of ferroelectric topologies prepared on conventional SrTiO3 substrates buffered with REScO3 layers

Strain engineering of low dimensional ferroelectrics has achieved substantial progresses such as the finding of ferroelectric topologies as flux-closures, vortices, skyrmions, merons and polar waves identified in strain mediated ferroelectric multilayers/superlattices or single-layer films. Particularly, tensile strains from REScO3 (RE: rare earth elements) substrates have shown great capabilities for mediating these novel ferroelectric topologies. However, there are large difficulties for preparing high quality REScO3 single-crystal substrates. This fact has induced large obstacles for exploring the structures and properties of ferroelectric topologies. Here we propose a practical way to prepare REScO3 ultrathin films by a combination of precision pulsed laser deposition (PLD) and controlled post-annealing, which shows the same strain engineering effects on preparing ferroelectric polar topologies. A PrScO3 buffer layer was deposited on a conventional SrTiO3(001) substrate and then annealed at 800 ℃. Transmission electron microscopy (TEM) investigations revealed the high quality of the obtained PrScO3 films with almost no threading dislocations, where the mismatch with the SrTiO3 substrate was relaxed by misfit dislocations and thus a relaxed PrScO3 buffer layer was obtained. Atomic scale studies based on the advanced TEM methods revealed that periodic flux-closure arrays in PbTiO3 layers were successfully obtained, in the later PbTiO3/SrTiO3 multilayer films grown on the PrScO3 buffered SrTiO3 substrates. These results suggest that the PrScO3 buffer layer here can serves as the common REScO3 single-crystal substrates. This study provides a practical way to prepare REScO3 buffer layers serving as strain engineering ingredient for creating exotic phenomena in perovskite oxide heterostructures.

Growth of highly relaxed InGaN pseudo-substrates over full 2-in. wafers

A highly relaxed InGaN buffer layer was demonstrated over a full two-inch c-plane sapphire substrate by metalorganic chemical vapor deposition. The InGaN buffer layer was grown on a 100 nm GaN decomposition stop layer with a 3 nm thick high indium composition InGaN underlayer. After thermal decomposition of the underlayer at 1000 °C, a 200 nm thick In0.04Ga0.96N buffer showed 85% biaxial relaxation measured by a high resolution x-ray diffraction reciprocal space map. When used as a pseudo-substrate for the regrowth of InGaN/InGaN multi-quantum wells, the sample showed a 75 nm red-shift in room temperature photoluminescence when compared to a co-loaded GaN template reference. The longer emission wavelength is associated with higher indium incorporation in the InGaN layers from the lessening of the compositional pulling effect caused by compressive strain. Using this technique, a simple red light emitting diode was demonstrated with an active layer growth temperature of 825 °C and a peak wavelength of 622 nm at a current density of 20 A cm−2. This work represents a unique method to relax a III-nitride based layer over a full substrate.

(Invited) Si-Cap-Free Low-DIT SiGe Gate Stack for High-Performance pFETs

As the continuous physical device scaling is facing increasing challenges in today’s CMOS technology, introduction of high mobility channel material has further increased its potential value as performance booster. Low-Ge-content SiGe is the leading candidate for p-channel devices, as it is process-compatible with state-of-the-art Si CMOS fabrication platform and requires no strain relaxed buffer layer. In order to benefit from the high intrinsic carrier mobility at a low VDD operation, an efficient SiGe channel passivation with low interface state densities (Dit) needs to be developped. However, the presence of GeO is known to increase Dit [1]. One of the effective passivation schemes for SiGe-based channel surface uses an epitaxially-grown ultrathin Si cap [2]. It suppresses the formation of GeO and enables to fabricate a high-k/SiO2 gate stack equivalent to the one in Si devices. The outstanding improvement achieved with this approach was previously highlighted on pure Ge channel devices, where the formation of GeO is inevitable without the use of Si-cap [3]. On the other hand, it poses some concerns such as EOT penalty and process controllability, making the Si-cap-free route the desired option as long as the interface and oxide bulk trap densities can be kept under control. In this contribution, we will review our recent studies towards the realization of a low-Dit Si-cap-free SiGe gate stack [4]. Selective GeO scavenging from Si1-xGexOy interface layer was previously reported as the key process to reduce Dit of SiGe gate stack [1]. Wostyn et al., demonstrated on Si0.75Ge0.25 that the annealing of chemical oxide in inert ambient (i.e. H2) reduces GeO in Si1-xGexOy IL thanks to the conversion of the thermally-unstable GeO into SiO [5]. A MOS capacitor experiment confirmed a clear Dit reduction by H2 anneal, although at an increased EOT. Additional NH3 anneal on IL was found to further reduce the Dit down to 5×1011 cm-2eV-1 while cancelling out the H2-anneal-induced EOT increase (EOT=10.1 Å). We also found that the metal gate deposition process has a strong impact on Dit even for the same metal. While the PVD W/TiN led to low Dit and EOT, both of them increased as the PVD was changed to ALD (or ALD followed by CVD) process. This can be explained by the PVD-TiN-induced additional GeO scavenging from IL [6] and/or oxygen diffusion from ALD-based metal to IL through HfO2 inducing GeO formation. A nitridation of HfO2 was found to suppress the negative impact from ALD-based metal electrode. XPS confirmed that the significant Dit reduction coincides with the nitridation of HfO2. By replacing the HfO2 with other dielectrics in which lower oxygen diffusivity is expected such as SiO2, the Dit of SiGe gate stack became insensitive to the metal deposition process and nitridation, indicating that the high oxygen diffusivity of the HfO2 layer was, together with the GeO formation, the root cause of the process-sensitive Dit. These results emphasize the importance of the oxygen depth profile control for the realization of a low-Dit SiGe gate stack.

Status and Prospects of AlN Templates on Sapphire for Ultraviolet Light‐Emitting Diodes

Herein, the scope is to provide an overview on the current status of AlN/sapphire templates for ultraviolet B (UVB) and ultraviolet C (UVC) light‐emitting diodes (LEDs) with focus on the work done previously. Furthermore, approaches to improve the properties of such AlN/sapphire templates by the combination of high‐temperature annealing (HTA) and patterned AlN/sapphire interfaces are discussed. While the beneficial effect of HTA is demonstrated for UVC LEDs, the growth of relaxed AlGaN buffer layers on HTA AlN is a challenge. To achieve relaxed AlGaN with a low dislocation density, the applicability of HTA for AlGaN is investigated.

Reduced nonradiative recombination in semipolar green-emitting III-N quantum wells with strain-reducing AlInN buffer layers

Using strain-reducing partially relaxed AlInN buffer layers, we observe reduced nonradiative recombination in semipolar green-emitting GaInN/GaN quantum wells. Since strain is a key issue for the formation of defects that act as nonradiative recombination centers, we aim to reduce the lattice mismatch between GaInN and GaN by introducing an AlInN buffer layer that can be grown lattice-matched along one of the in-plane directions of GaN, even in the semipolar (112¯2) orientation. With the increasing thickness, the buffer layer shows partial relaxation in one direction and thereby provides a growth template with reduced lattice mismatch for the subsequent GaInN quantum wells. Time-resolved photoluminescence measurements show reduced nonradiative recombination for the structures with a strain-reducing buffer layer.

High Absorption Contrast Quantum Confined Stark Effect in Ultra-Thin Ge/SiGe Quantum Well Stacks Grown on Si

We report on the performance of the quantum confined Stark effect (QCSE) in ultra-thin (~350 nm) Ge/SiGe quantum well stacks grown on Si. We demonstrate an absorption contrast $\Delta \alpha /\alpha $ of 2.1 at 1 Vpp swing in QCSE stacks grown on ultra-thin (100 nm) strain relaxed GeSi buffer layers on 300 mm Si wafers. Such ultra-thin QCSE stacks will enable future integration of highly efficient QCSE electro-absorption modulators with low optical coupling loss to passive Si waveguides in a sub-micron silicon photonics platform.

Fabrication of relaxed InGaN pseudo-substrates composed of micron-sized pattern arrays with high fill factors using porous GaN

Fully or partially relaxed micron-sized InGaN patterns with fill factors up to 69% were demonstrated via porosification of the underlying GaN:Si layer. The impact of the porosification etch conditions and the pattern geometry on the degree of InGaN relaxation were studied and monitored via high resolution x-ray diffraction reciprocal space maps. Additionally, a 45 nm redshift in the photoluminescence emission from InxGa1−xN/ InyGa1−yN multi-quantum wells (MQWs) regrown on bi-axially relaxed InGaN buffer layers was observed when compared to a co-loaded reference sample grown on GaN. The longer emission wavelength was associated with higher indium incorporation into the InGaN layers deposited on the InGaN base layers with a lattice constant larger than GaN, due to the reduced lattice mismatch between MQW and InGaN base layer, also called compositional pulling effect.

A novel three-layer graded SiGe strain relaxed buffer for the high crystal quality and strained Si0.5Ge0.5 layer epitaxial grown

In this work, a novel three-layer SiGe strain relaxed buffer/strained Si0.5Ge0.5 layer stacking structure is systematically investigated. The novel three-layer graded SiGe strain relaxed buffer, whose Ge concentration increased from bottom to top by roughly 10% with an in situ annealing after each layer grown, can effectively constrain the threading dislocation in the strain relaxed buffer layer. Moreover, a chemical mechanical planarization process can be applied to the strain relaxed buffer to further improve its surface roughness. A high crystal quality and atomically smooth surface Si0.5Ge0.5 layer can be successfully realized on the novel chemical mechanical planarization-treated three-layer SiGe strain relaxed buffer. This strategy can attain at least 50 nm and 0.6% compressive strained Si0.5Ge0.5 layer and its quantification of the strain level is confirmed by utilizing the scanning moire fringe imaging technique. It can be seen that this novel structure can provide a better mobility and larger width for the FinFET or nanowire SiGe channel device.

High crystal quality strained Si0.5Ge0.5 layer with a thickness of up to 50 nm grown on the three-layer SiGe strain relaxed buffer

In this work, a novel stacking structure of three-layer SiGe strain relaxed buffer/strained Si0.5Ge0.5 layer for shallow trench isolation last scheme is successfully developed. Firstly, a three-layer SiGe epitaxy with Ge concentration increased from bottom to top by roughly 10% combining with each layer post growth in-situ annealing is employed to effectively constrain the threading dislocation defect in the bottom and middle strain relaxed buffer layer and the top layer of strain relaxed buffer with thickness of ∼1 μm has no obviously defect impact. Before Si0.5Ge0.5 layer epitaxy on the top of this strain relaxed buffer layer, a chemical-mechanical planarization step is employed to improve surface roughness of strain relaxed buffer layer from 6.09 nm to 0.23 nm and final Si0.5Ge0.5 layer surface roughness from 6.73 nm to 0.76 nm. Finally, on the post CMP three-layer SiGe strain relaxed buffer, a smooth and high crystal quality strained Si0.5Ge0.5 layer with a thickness of 50 nm, which is larger than its critical thickness of ∼20 nm, is successfully prepared by utilizing our new developed technique.

Electrical Transition in Isostructural VO2 Thin-Film Heterostructures

Control over the concurrent occurrence of structural (monoclinic to tetragonal) and electrical (insulator to the conductor) transitions presents a formidable challenge for VO2-based thin film devices. Speed, lifetime, and reliability of these devices can be significantly improved by utilizing solely electrical transition while eliminating structural transition. We design a novel strain-stabilized isostructural VO2 epitaxial thin-film system where the electrical transition occurs without any observable structural transition. The thin-film heterostructures with a completely relaxed NiO buffer layer have been synthesized allowing complete control over strains in VO2 films. The strain trapping in VO2 thin films occurs below a critical thickness by arresting the formation of misfit dislocations. We discover the structural pinning of the monoclinic phase in (10 ± 1 nm) epitaxial VO2 films due to bandgap changes throughout the whole temperature regime as the insulator-to-metal transition occurs. Using density functional theory, we calculate that the strain in monoclinic structure reduces the difference between long and short V-V bond-lengths (ΔV−V) in monoclinic structures which leads to a systematic decrease in the electronic bandgap of VO2. This decrease in bandgap is additionally attributed to ferromagnetic ordering in the monoclinic phase to facilitate a Mott insulator without going through the structural transition.

Reliability studies on biaxially tensile strained-Si channel p-MOSFETs

An integrated technology computer aided simulation framework is used for the first time to predict the reliability (degradation) of substrate-induced strained-Si channel heterojunction field effect transistors on relaxed Silicon-Germanium buffer layer with ultra-thin SiO2 and high-k gate stacks. State-of-the-art four-state nonradiative multiphonon model is used for the degradation studies. Single defects and trap studies have been taken up on devices subjected to negative voltage stressing at an elevated temperature. Threshold voltage shift (due to charge capture and emission processes) in virtually fabricated devices has been studied in detail. For the first time, non radiative multiphonon model is used to explain the degradation mechanisms (oxide defects dominating the partial recovery of threshold voltage after stressing) in strained-Si channel heterojunction field effect transistors. It is shown that degradation in strained-Si channel device on relaxed-SiGe buffer is more compared to its Si-channel counterpart.

Experimental Analyses on Multiscale Structural and Mechanical Properties of ε-Si/GeSi/C-Si Materials

Strained silicon (ε-Si) is a promising material that could extend Moore’s law by enhancing electron mobility. A ε-Si material is usually composed of multiscale, multilayer heterostructures, where the strained-silicon film or strap is tens-of-nanometers thick, and its buffer layers are of the micrometer scale. The structural properties determine the electrical performance and reliability of ε-Si-based devices. Inhomogeneous residual stress is induced during the preparation, which induces ε-Si structure failure. In this work, biaxial strained-silicon films that contain graded and relaxed germanium-silicon buffer layers were prepared on monocrystalline silicon wafers through reduced-pressure chemical-vapor epitaxy. The layer components and thicknesses were measured using energy-dispersive spectroscopy and scanning-electron microscopy. Crystal and lattice characters were observed by using high-resolution transmission-electron microscopy and micro-Raman spectroscopy. The residual stress distribution along cross-sections of the ε-Si multilayer structures was examined by using micro-Raman mapping. The experimental results showed that, with a gradual increase in germanium concentration, the increasing residual stress was suppressed owing to dislocation networks and dislocation loops inside the buffer layers, which favored the practical application.

Structural properties of compressive strained Ge channels fabricated on Si (111) and Si (100)

Structural properties of the strained Ge channels formed on SiGe (111) and SiGe (100) relaxed buffer layers are investigated. Compressive strained Ge(111) channels are grown on reverse graded Si0.26Ge0.74 buffer layers, and as a result, very low rms roughness of 1.7 nm and large compressive strain of −0.92% are obtained. The phosphorous doping is attempted in the SiGe buffer for the purpose of suppression of parallel conduction and very abrupt doping is realized without very little diffusion. The high-quality, doping controlled and largely strained Ge(111) channel/SiGe(111) buffer heterostructure is a promising template for high-performance Ge(111) based devices.

Stimulated Emission at 1.3-μm Wavelength in Metamorphic InGaAs/InGaAsP Structure with Quantum Wells Grown on Ge/Si(001) Substrate

A laser structure comprising metamorphic InGaAsP layer and InGaAs quantum wells on a non-inclined Si(001) substrate with relaxed Ge buffer layer has been grown for the first time by metal-organic vapor phase epitaxy (MOVPE). The optically pumped lasers exhibit stimulated emission at a wavelength of 1.3 μm. At liquid-nitrogen temperature, the threshold power density of pumping at 0.8 μm amounted to 250 kW/cm2.

Стимулированное излучение на длине волны 1.3 mum в метаморфной структуре InGaAs/InGaAsP с квантовыми ямами, выращенной на подложке Ge/Si (001)

AbstractA laser structure comprising metamorphic InGaAsP layer and InGaAs quantum wells on a non-inclined Si(001) substrate with relaxed Ge buffer layer has been grown for the first time by metal-organic vapor phase epitaxy (MOVPE). The optically pumped lasers exhibit stimulated emission at a wavelength of 1.3 μm. At liquid-nitrogen temperature, the threshold power density of pumping at 0.8 μm amounted to 250 kW/cm^2.

Ultrathin AlN‐Based HEMTs Grown on Silicon Substrate by NH3‐MBE

AlN‐based HEMTs grown on silicon by ammonia‐assisted molecular beam epitaxy (NH3‐MBE) are demonstrated and studied. As shown by photoluminescence, the very thin GaN channel (35–55 nm‐thick) is compressively strained on the 250 nm‐thick relaxed AlN buffer layer grown on silicon substrate. The structure is then completed by an 8 nm‐thick AlN barrier and 2 nm‐thick GaN cap. Despite an ultrathin total epilayer (only ≈300 nm‐thick), a high 2DEG density (≈2.7 × 1013 cm−2) is measured by Hall effect. Room temperature mobility values, as high as 636 cm2 V−1 s−1, are measured. They are higher than those reported on similar structures grown on sapphire, SiC and bulk AlN substrates, showing the interest of growing such structures on silicon substrate. Also, low contact resistance values are obtained, as low as 0.18 Ω mm, by using a basic fabrication process.

Role of indium tin oxide electrode on the microstructure of self-assembled WO3-BiVO4 hetero nanostructures

Self-assembled WO3-BiVO4 nanostructured thin films were grown on a (001) yttrium stabilized zirconia (YSZ) substrate by the pulsed laser deposition method with and without the indium tin oxide (ITO) bottom electrode. Their microstructures including surface morphologies, crystalline phases, epitaxial relationships, interface structures, and composition distributions were investigated by scanning electron microscopy, high-resolution transmission electron microscopy, and X-ray energy dispersive spectroscopy. In both samples, WO3 formed nanopillars embedded into the monoclinic BiVO4 matrix with specific orientation relationships. In the sample with the ITO bottom electrode, an atomically sharp BiVO4/ITO interface was formed and the orthorhombic WO3 nanopillars were grown on a relaxed BiVO4 buffer layer with a mixed orthorhombic and hexagonal WO3 transition layer. In contrast, a thin amorphous layer appears at the interfaces between the thin film and the YSZ substrate in the sample without the ITO electrode. In addition, orthorhombic Bi2WO6 lamellar nanopillars were formed between WO3 and BiVO4 due to interdiffusion. Such a WO3-Bi2WO6-BiVO4 double heterojunction photoanode may promote the photo-generated charge separation and further improve the photoelectrochemical water splitting properties.