Leakage Current Reduction Research Articles

Strain evolution from the ferroelectric to the relaxor state in (0.67 - x)BiFeO3-0.33BaTiO3-xBi(Mg0.5Zr0.5)O3 lead-free ceramics.

The BiFeO3-BaTiO3 solid solution exhibits enhanced electric properties due to its modified phase structure with relaxor characteristics and reduced leakage current. Despite these advancements, the underlying mechanism behind the phase transition from a ferroelectric to a relaxor state in BF-BT ceramics remains largely unexplored. Here, the evolution of strain in (0.67 - x)BiFeO3-0.33BaTiO3-xBi(Mg0.5Zr0.5)O3 ceramics is investigated, with a focus on the strain transition from a ferroelectric to a relaxor phase. A strengthening of relaxor behavior is observed in the modified rhombohedral (R) and pseudocubic (PC) phase structure, resulting in optimal strain (Suni = 0.25%, Spos = 0.24%) at x = 0.04. The enhanced strain is attributed to the promotion of domain switching and the presence of strong random fields, with polar nanoregions integrating into a long-range ordered matrix. Furthermore, a gradual increase in strain with rising temperature is noted, driven by increased polarization and the expansion of ferroelectric domains. This study underscores the critical role of structural modifications in augmenting the electric response of BF-BT ceramics, thereby advancing the development of lead-free piezoelectric materials.

A Self‐Assembling Molecule for Improving the Mobility in PEDOT:PSS Hole Transport Layer for Efficient Perovskite Light‐Emitting Diodes

AbstractPoly(3,4‐ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), the most widely used hole injection layer (HIL) for perovskite light‐emitting diodes (PeLEDs), has a large hole injection energy barrier and easy charge separation at PEDOT:PSS/perovskite layer. Here, a self‐assembling molecule (SAM) called (2‐(3,6‐dimethoxy‐9H‐carbazol‐9‐yl)ethyl) phosphonic acid (MeO‐2PACz) is introduced as an interlayer between PEDOT:PSS and perovskite to overcome the limitations of PEDOT:PSS HIL. The MeO‐2PACz interlayer facilitated hole injection due to the reduced hole injection energy barrier and the improved hole mobility, enhanced photoluminescence (PL) due to the prevented charge transfer from perovskite into PEDOT:PSS, and reduced interface trap density due to the passivation of methoxy and carbazole group toward perovskite. As a result, PeLEDs with MeO‐2PACz interlayer has greatly enhanced maximum luminance (Lmax = 17,310 cd m−2) and reduced leakage current, resulting in higher maximum external quantum efficiency (EQEmax = 21.50%) compared to pristine Control device (EQEmax of 4.82%).

Leakage current in GaN-on-GaN vertical GaN SBDs grown by HVPE on native GaN substrates

This study investigates leakage mechanisms in vertical GaN-on-GaN Schottky barrier diodes (SBDs) and demonstrates effective mitigation strategies. The fabricated devices exhibit low reverse leakage current (1 × 10−5 A/cm2 at −200 V) and a high Ion/Ioff ratio (∼1010), surpassing the performance of GaN SBDs on foreign substrates. We elucidate dominant leakage mechanisms—thermionic emission, Poole–Frenkel emission, and variable-range hopping—and their evolution with temperature and bias. Optimized fabrication processes, including defect etching and a novel dual-layer passivation technique, achieve over a 1000-fold reduction in leakage current.

Systematic investigation of the influence of magnetic and non-magnetic ion substitution in BiFeO3 under similar internal chemical pressure

Polycrystalline Bi1-xRxFeO3 (R = Ho and Y, x = 0.00, 0.05 and 0.10) compounds were prepared to perform a systematic investigation of the role of chemical nature and effect of internal chemical pressure on the structural, microstructural, magnetic, electric, ferroelectric and optical properties of the compounds. Structural analysis revealed that lattice distortions observed in Ho and Y-substituted compounds were not the same. The lattice parameters were larger in the case of the Y-substitution compared to the Ho-substituted counterpart. Scanning electron micrographs confirmed the formation of dense, well-connected grains exhibiting a reduction in size with increasing substitution. The magnetic properties of BiFeO3 were enhanced through the suppression of the spin structure with the substitution. The substitution of magnetic (Ho3+) ions led to an improvement in remanent magnetization and coercive field, whereas the substitution of non-magnetic (Y3+) ions resulted in enhanced maximum magnetization with negligible coercive field at room temperature. The ferroelectric measurements evidenced that both remanent polarization and coercive fields improved in substituted compounds, attributed to a decrease in charge carriers. Furthermore, the Y3+ ion substitution positively influenced ferroelectric properties by reducing leakage currents compared to the Ho3+ ion substitution. The optical absorption measurements indicated a decrease in the energy band gap of BiFeO3 with substitution, implying alterations in the material's optical characteristics. The ac conductivity studies demonstrated a discernible reduction in the conductivity of the substituted compounds. Specifically, Ho-substitution exhibited a more pronounced magnitude in the decline in conductivity relative to Y-substitution. This outcome signifies the potential efficacy of Ho-substitution in exerting control over the insulating characteristics of the compounds.

A new single-source, single-phase, 9-L 4-B switched capacitor-based multilevel inverter

ABSTRACT All types of non-conventional energy sources (NCES) produce low voltage, but offer it to be converted into usable and essential form. Switched capacitor multilevel inverter (SC-MLIs) has played a vital role in extracting power from NCES to fulfill the requirements of today’s need. Researchers have shown a great interest in extracting this power which comes from solar PV, wind, fuel cells and other miniature sources which is often not significant at all. This research offers a topology that is very simple and easy to implement. The authors also demonstrate a novel SC-MLI with a single ground and four voltage boosting capabilities. This paper analyzes and reviews the suggested inverter can create nine levels along with four times the voltage from a single dc source. Three self-balanced switched capacitors in association with a pair of five switches and single diode are used to offer quadruple boosting. A level-shifted pulse width modulation technique helps to generate the output voltage. The execution of the SC-MLI and the capacitor architecture for the suggested topology are fully investigated. The availability of common neutral is advantageous in reducing leakage current, especially in green energy utilization. In the context of voltage gain, the number of components employed, and the presence of common neutral, the designed inverter is contrasted to several other previously revealed inverters.

A novel 4H–SiC thermal neutron detector based on a metal-oxide-semiconductor structure

Energy resolution and leakage current are two key parameters for semiconductor neutron detectors. Metal-Oxide-Semiconductor (MOS) detectors introduce an additional oxide layer compared to Schottky Barrier Diodes (SBDs) detectors in order to reduce leakage current. However, this also leads to a degradation in energy resolution due to the introduction of an additional dead layer. Therefore, optimizing the thickness of the oxide layer is important for MOS detectors. In this study, a 4H–SiC-based MOS thermal neutron detector was designed with comprehensive consideration of the oxide layer. Subsequently, a prototype of the detector was fabricated and tested. The prototype of the MOS detector achieved an nA-level leakage current under a reverse bias of −200 V. Additionally, it demonstrated good energy resolution performance in a moderated D-T neutron source test. The MOS detector was able to clearly distinguish between the two reaction channels of 10B converter events, which is consistent with the theoretical branching ratio. This work highlights the potential application of 4H–SiC-based MOS detectors for thermal neutron detection.

Phase transition kinetics and sublayer optimization of HfO2/ZrO2 superlattice ferroelectric thin films

The sublayer thickness of superlattices, as a key factor affecting lattice integrity, interface defects, and strain, deserves in-depth studies about its impact on improving ferroelectric properties. This study described and analyzed the performance of HfO2/ZrO2 superlattices with various sublayer thicknesses. It can be concluded that the structure of the thicker layers will guide the trend of the phase composition of the entire device: when ZrO2 layers are thicker, the superlattices will exhibit antiferroelectricity due to the higher content of the tetragonal phase (t-phase); when HfO2 layers become thicker, the fraction of the monoclinic phase (m-phase) will increase, leading to a decrease in ferroelectricity and an increase in leakage current. In this way, the device with a 1:1 HfO2/ZrO2 thickness ratio was optimized to have the largest remanent polarization and the lowest leakage current. Maintaining the same thickness ratio of the HfO2/ZrO2 superlattices, it was found that HfO2/ZrO2 superlattices with thinner sublayers exhibited a larger remanent polarization (Pr) value due to increased interlayer distortion. On the contrary, the thicker sublayers reduced leakage current, which was beneficial for improving the device lifespan.

Gate all around carbon nanotube field effect transistor espoused discrepancy cascode pass transistor adiabatic logic for ultra-low power application

Advances in wearable technology, IoT, and mobile applications have increased the demand for ultra-low-power electronic devices. Adiabatic Logic Circuit (ALC) is a design technique utilized in digital circuits to decrease the power consumption by decreasing the dynamic power dissipation. Current technologies face challenges in achieving both high performance and ultra-low power consumption. This research work introduces a novel approach in digital circuit design, specifically the Gate All-around Carbon Nanotube Field Effect Transistor with Discrepancy Cascode Pass Transistor Adiabatic Logic (GAA-CNTFET-DCPTAL), tailored for ultra-low power applications. This design operates efficiently with a four-phase Power Clock (PC) and demonstrates remarkable performance by achieving operation frequencies of up to 1 GHz while minimizing energy dissipation. GAA-CNTFET provides superior electrostatic control and high carrier mobility, reducing leakage currents and enhancing switching speeds. Simultaneously, Discrepancy Cascode Pass Transistor Adiabatic Logic (DCPTAL) uses adiabatic logic principles and a cascode structure to minimize energy dissipation during switching events. The technology node of proposed model is 10 nm. The software used for assessment is HSPICE is used for the simulation and validation of the proposed design. The proposed GAA-design attains 25.36 %, 14.28 %, and 16.06 % lower average power analyzed with existing techniques, such as Design with Evaluation of Clocked Differential Adiabatic Logic Families for the applications of low Power (DE-CDAL-LPA), Adiabatic logic-base strong ARM comparator for ultra-low power applications (AL-SARM-ULPA) and Analysis of 2PADCL Energy Recovery Logic for Ultra Low Power VLSI Design for SOC with Embedded Applications (2PADCL-ULP-VLSI) respectively.

Solution to SRAM static power consumption with MTCMOS

The rapid growth of mobile devices has led to an increasing demand for battery life and energy efficiency in recent years, the reduction of circuit power consumption has become extremely crucial. SRAM has become an indispensable component of modern System-on-Chip (SoC) designs, and reducing its power consumption holds significant importance in minimizing overall chip power consumption. On the other hand, as manufacturing processes advance, static power consumption resulting from leakage currents has gradually emerged as a primary source of power consumption. This paper analyzes the power composition of SRAM, provides a detailed explanation of the principles and influencing factors of MTCMOS design technology, and conducts modeling analysis on 6T SRAM based on MTCMOS. In the modeling analysis, we compare the leakage current and static power reduction effects of 6T SRAM using four different process technologies: 28nm, 40nm, 65nm, and 90nm. From the data, it can be observed that MTCMOS has a notable effect in reducing leakage current for 6T SRAM across various process technologies. Comparing 6T SRAM of different process technologies, we can roughly see that the power reduction effect reaches a peak and gradually decreases. However, due to the lack of more advanced process libraries, we cannot further validate whether this inference is accurate.

Role of oxygen vacancy in controlling the resistive switching mechanism for the development of conducting filaments in response of homo and hetero electrodes: Using DFT approach

In the realm of progression of internet of things, artificial intelligence and cloud services, nonvolatile memory devices such as, resistive random access memory (RRAM) emulated the vision of building internet of everything. In this study, robustness of homo- (Ag–Ag, and Pt–Pt), and hetero- (Ag–Pt) top, and bottom electrodes material without and with incorporated oxygen vacancies (Vos) in Sr4Ti4O12 RS layer were investigated. Presence of conductivity in the absence of external electric field proves the presence of nonvolatile memory behavior. Observed RS behavior (in the range of a few Angstroms) may be used to resolve the scalability issue of the proposed RRAM device system. At the same time, oxygen vacancies (Vos) introduced additional functionalities like: additional reduction sites, and reduction of leakage current by quantizing the conduction within RS material. Diffusion barrier elucidated the diffusion mechanism of oxygen vacancies in the considered heterostructure to understand the energy state and the type of RS conduction mechanism. Potential energy line ups, formation energy and electronic properties identified the Vos as principal sites for reduction of Ag atoms by forming metal oxide (Ag-Vos) complex. It is predicted that ReSET, and hence high resistance state (HRS) is harder to achieve with homo-electrodes. The findings of this study provides the effective solution to scalability, stability, and low power consumption in the realm of Pt–Sr4Ti4O12–Ag (with 2Vos mediated in RS layer) based RRAM devices.

Stepped ohmic structure of AlGaN/GaN HEMT with lower off-state leakage current

Abstract Utilizing the TCAD-ATLAS platform, we performed accurate fitting of the electrical characteristics of GaN HEMT devices, achieving a fitting error of less than 5%. Building upon this parameter fitting, we introduced a stepped ohmic structure and compared it with the conventional rectangular structure. The findings highlight the significant impact of the ohmic structure on the off-state drain leakage current of the device. Through the implementation of the stepped ohmic structure, a remarkable reduction in the off-state leakage current was achieved. Specifically, the off-state leakage current decreased by three orders of magnitude, declining from 10−5 mA/mm to 10−8 mA/mm. Importantly, this improvement in leakage current was accomplished without adversely affecting the device’s output characteristics. These results underscore the effectiveness of the stepped ohmic structure in enhancing the overall performance of GaN HEMT devices.

H/O edge passivated B/N co-doped armchair graphene nanoribbon field-effect transistors, based on first principles

This study employs the nonequilibrium Green’s function method in conjunction with density functional theory to fabricate and analyze a Graphene Nanoribbon Field-Effect Transistor (GNRFET). The co-doping of B and N creates built-in electric fields, thereby reducing leakage current. The results demonstrate effective control performance of planar gates, as evidenced by an increase in IDS with rising gate voltage. Furthermore, a negative differential conductance phenomenon is observed at bias voltages exceeding 0.7 V, exhibiting correlation with transmission spectra and energy band structures. To precisely illustrate the electron distribution within the doped scattering region, calculations involving transport paths, the molecular projection self-consistent Hamiltonian (MPSH), and the emission eigenvalues and eigenstates of the device are conducted. This research provides a reference for exploring and developing smaller and more energy-efficient AGNR field effect transistor designs and implementations. The principal objective of this paper is to investigate the potential applications of these smaller, more energy-efficient devices.

Suppressing leakage current and charge accumulation via perovskite interface morphology regulation for efficient light-emitting diodes

Charge carriers will recombine outside the emitting layer (EML) in non-ideal perovskite light-emitting diodes (PeLEDs), which can lead to parasitic loss and be detrimental to the performance of PeLEDs. Here, we have subtly utilized the property of perovskite nanocrystals (NCs) to design and optimize the homogeneity and optical property of EML, thereby suppressing the undesired carrier loss behavior in system. Photoluminescence (PL) spectra with transmission electron microscopy (TEM) images show that smaller and more homogeneous NCs in size are obtained by temperature-controlled (TC) method. Atomic force microscopy (AFM) images and temperature-dependent PL spectra show that EML with better optical property and uniformity is fabricated. The multiscale capacitance characterization shows that the device with modified EML exhibits significantly reduced leakage current, while the increased specific surface area between electron transport layer (ETL) and EML substantially reduces charge accumulation. Additionally, multiscale reactance, impedance and phase angle responses, reveal that the carrier oscillation behavior in the optimized device is suppressed compared to control group, leading to less energy loss. Consequently, the optimized devices exhibit lower leakage current and superior electroluminescent properties. The luminance is increased from 31650 cd/m2 to 72941 cd/m2, current efficiency (CE) is improved from 59.9 cd/A to 94.3 cd/A, and the external quantum efficiency (EQE) rises from 12.6 % to 19.7 %, corresponding to improvement of 230 %, 157 %, and 156 %, respectively. This research provides valuable insight into the impact of functional layer morphology on carrier dynamic behavior in PeLEDs.

Reduced subthreshold swing in a vertical tunnel FET using a low-work-function live metal strip and a low-k material at the drain.

In this research paper, a vertical tunnel field-effect transistor (TFET) structure containing a live metal strip and a material with low dielectric constant is designed, and its performance metrics are analyzed in detail. Low-k SiO2 is incorporated in the channel-drain region. A live molybdenum metal strip with low work function is placed in a high-k HfO2 layer in the source-channel region. The device is examined by the parameters I off, subthreshold swing, threshold voltage, and I on/I off ratio. The introduction of a live metal strip in the dielectric layer closer to the source-channel interface results in a minimum subthreshold slope and a good I on/I off ratio. The low-k material at the drain reduces the gate-to-drain capacitance. Both the SiO2 layer and the live metal strip show excellent leakage current reduction to 1.4 × 10-17 A/μm. The design provides a subthreshold swing of 5 mV/decade, which is an excellent improvement in TFETs, an on-current of 1.00 × 10-5 A/μm, an I on/I off ratio of 7.14 × 1011, and a threshold voltage of 0.28 V.

Improvements in Resistive and Capacitive Switching Behaviors in Ga2O3 Memristors via High-Temperature Annealing Process.

This study investigates the effect of a high-temperature annealing process on the characteristics and performance of a memristor based on a Ag/Ga2O3/Pt structure. Through X-ray diffraction analysis, successful phase conversion from amorphous Ga2O3 to β-Ga2O3 is confirmed, attributed to an increase in grain size and recrystallization induced by annealing. X-ray photoelectron spectroscopy analysis revealed a higher oxygen vacancy in annealed Ga2O3 thin films, which is crucial for conductive filament formation and charge transport in memristors. Films with abundant oxygen vacancies exhibit decreased set voltages and increased capacitance in a low-resistive state, enabling easy capacitance control depending on channel presence. In addition, an excellent memory device with a high on/off ratio can be implemented due to the reduction of leakage current due to recrystallization. Therefore, it is possible to manufacture a thin film suitable for a memristor by increasing the oxygen vacancy in the Ga2O3 film while improving the overall crystallinity through the annealing process. This study highlights the significance of annealing in modulating capacitance and high-resistive/low-resistive state properties of Ga2O3 memristors, contributing to optimizing device design and performance. This study underscores the significance of high-temperature annealing in improving the channel-switching characteristics of Ga2O3-based memristors, which is crucial for the development of low-power, high-efficiency memory device.

Research on SVPWM Method for Leakage Current Suppression and Switching Loss Reduction in Nonisolated Three-Level Inverters

Research on SVPWM Method for Leakage Current Suppression and Switching Loss Reduction in Nonisolated Three-Level Inverters

Low Temperature (Down to 6 K) and Quantum Transport Characteristics of Stacked Nanosheet Transistors with a High-K/Metal Gate-Last Process.

Silicon qubits based on specific SOI FinFETs and nanowire (NW) transistors have demonstrated promising quantum properties and the potential application of advanced Si CMOS devices for future quantum computing. In this paper, for the first time, the quantum transport characteristics for the next-generation transistor structure of a stack nanosheet (NS) FET and the innovative structure of a fishbone FET are explored. Clear structures are observed by TEM, and their low-temperature characteristics are also measured down to 6 K. Consistent with theoretical predictions, greatly enhanced switching behavior characterized by the reduction of off-state leakage current by one order of magnitude at 6 K and a linear decrease in the threshold voltage with decreasing temperature is observed. A quantum ballistic transport, particularly notable at shorter gate lengths and lower temperatures, is also observed, as well as an additional bias of about 1.3 mV at zero bias due to the asymmetric barrier. Additionally, fishbone FETs, produced by the incomplete nanosheet release in NSFETs, exhibit similar electrical characteristics but with degraded quantum transport due to additional SiGe channels. These can be improved by adjusting the ratio of the channel cross-sectional areas to match the dielectric constants.

Advancements And Applications of Finfet Technology in Modern Semiconductor Engineering

This comprehensive study presents an in-depth analysis of Fin Field-Effect Transistor (FinFET) technology, a significant innovation in semiconductor technology, focusing on its structural attributes, applications, and future prospects. FinFETs, characterized by their distinctive fin-like channels, are pivotal in overcoming the limitations of traditional MOSFETs, particularly in the context of device miniaturization. The paper begins by exploring the basic theory and structural characteristics of FinFETs, emphasizing their enhanced control over short channel effects and reduced leakage currents in scaled-down devices. Attention is then directed towards the integration of FinFET technology in Static Random-Access Memory (SRAM), detailing how FinFETs contribute to improved stability and efficiency in memory storage. Another crucial application discussed is in the biomedical field, where FinFETs have facilitated the development of advanced instrumentation amplifiers and sensitive sensors, marking a leap in medical electronics. The paper concludes by addressing the challenges encountered by FinFETs as fabrication approaches the 5-7nm scale, including their physical and structural limitations. It also highlights ongoing research in structural modifications and material innovations like Gate-All-Around FETs and alternative materials, underscoring the continued evolution and relevance of FinFET technology in the ever-advancing semiconductor industry.

In situ electrical characterization of the Au/n-Si Schottky barrier structure under 1.2 MeV Ar ion irradiation

Understanding the impact of energetic ion irradiation on semiconductor materials and devices is essential for optimizing their electronic applications. This knowledge contributes to the broader goal of tailoring material properties to enhance the overall performance and reliability of semiconductor devices. In this study, we investigate the impact of 1.2 MeV Ar8+ irradiation on Au/n-Si Schottky barrier structures in-situ, as a function of ion irradiation fluence. Electrical characterization was performed in-situ on a single sample to mitigate any variability in device parameters between samples. It is observed that ion irradiation results in an increased Schottky barrier height with a reduction in reverse leakage current. The behavior is attributed to dopant deactivation by the energetic ion irradiation-induced defects near the interface. These results underscore the importance of understanding ion irradiation impacts on semiconductor devices, providing valuable insights for optimizing Schottky diodes in electronic applications.

Fundamental Origin of Si Surface Defects Caused by Laser Irradiation and Prevention of Suboxide Formation through High Density Ultrathin SiO2

This research investigates surface damage in electronic devices from laser irradiation, particularly focusing on voids, cracks, and vacancies. We discovered that applying a high-density ultrathin SiO2 layer effectively prevents such defects. Atomic Force Microscopy (AFM) analysis showed a significant reduction in surface roughness, with the Rq factor value dropping to 0.158 nm in samples coated with this SiO2 layer. Additionally, X-ray Photoelectron Spectroscopy (XPS) was used to study suboxide formation in the Al2O3/Si structure, revealing insights into defect origins. Electrical tests indicated a substantial decrease in laser-induced damage, evidenced by a leakage current density reduction to 2.4 × 10−6 A/cm2, markedly lower than uncoated samples. Post-metallization annealing (PMA) further improved results, with the interface state density decreasing to 0.63 × 1012 atoms eV−1 cm−2. Our findings highlight the effectiveness of the high-density ultrathin SiO2 layer in mitigating surface defects caused by continuous wave (CW) laser irradiation, promising significant advancements in electronic device manufacturing through potential application in CW laser annealing processes.