Reduce Insertion Loss Research Articles

Design of novel multiband bandpass filters based on coupled symmetric short‐circuit stub multimode resonators

AbstractIn this letter, the working mechanism of suggested bandpass filters with connected symmetric short‐circuit stub multimode resonators is described. Because of the design flexibility, the suggested bandpass filters' centre frequencies may be modified based on the design approach. Meanwhile, the suggested bandpass filters have reduced insertion losses and compact sizes. A prototype is built and tested with six passbands centred at 1.57/2.38/3.55/5.14/5.83/6.78 GHz to confirm the design and analysis. Good agreement between the simulated, and measured results is observed, indicating that the proposed structure can be applied in the field of communication, information, and automation.

Narrow band STW filters with reduced insertion loss

Narrow band STW filters with reduced insertion loss

Feasibility and Structural Transformation of Electrodeposited Copper Foils for Graphene Synthesis by Plasma‐Enhanced Chemical Vapor Deposition: Implications for High‐Frequency Applications

AbstractLarge‐area graphene is typically synthesized on rolled‐annealed copper foils, which require transferring to other substrates for applications. This study examines large‐area graphene growth on electrodeposited (ED) copper foils—used in lithium‐ion batteries and printed circuit boards—via plasma‐enhanced chemical vapor deposition (PECVD). It reveals that, for a set plasma power, a minimum growth time ensures full graphene coverage, leading to monolayer and then multilayer graphene, showing PECVD growth on ED copper is not self‐limited. The process also beneficially modifies the ED copper substrate, like removing the surface zinc layer and changing copper grain size and orientation, thus improving graphene growth. Additionally, the study includes high‐frequency scattering parameter (S‐parameter) measurements in a coplanar waveguide (CPW) system. This involves graphene on a sapphire substrate with a silver electrode. The S‐parameter data indicate that the CPW with graphene shows reduced insertion losses in high‐frequency circuits compared to those without graphene. This underscores graphene's role in reducing insertion losses between metallic and dielectric layers in high‐frequency settings, offering valuable insights for industrial and technological applications.

Compact circular microstrip 1:4 power divider/combiner with defected ground plane

This letter presents a methodology for the design of high-performance miniaturized Circular Power Dividers (CPDs) for wideband applications. To accomplish this objective, annular slots are strategically incorporated into patch and the ground plane of CPDs. This, in turn, increases the effective path length of the surface current flowing across the patch. This yields miniaturization, improved impedance matching, reduced insertion loss and increased isolation over a larger bandwidth. A mathematical model is developed for the design of the proposed configuration called Circular power dividers with Defected Ground Plane(CDGP). The presented model has been verified through various simulations and practical measurements. By implementing this approach, a substantial miniaturization of approximately 83% and more than threefold increase in bandwidth has been achieved when compared with non-slotted CPDs. Moreover, there is improvement in insertion loss, isolation, and return loss as well. There is good agreement between the mathematical model, simulation results and measured parameters.

An S–K Band 6-Bit Digital Step Attenuator with Ultra Low Insertion Loss and RMS Amplitude Error in 0.25 μm GaAs p-HEMT Technology

This paper presents an ultra-wideband, low insertion loss, and high accuracy 6-bit digital step attenuator (DSA). To improve the accuracy of amplitude and phase shift of the attenuator, two innovative compensation structures are proposed in this paper: a series inductive compensation structure (SICS) designed to compensate for high frequency attenuation values and a small bit compensation structure (SBCS) intended for large attenuation bits. Additionally, we propose insertion loss reduction techniques (ILRTs) to reduce insertion loss. The fabricated 6-bit DSA core area is only 0.51 mm2, and it exhibits an attenuation range of 31.5 dB in 0.5 dB steps. Measurements reveal that the root-mean-square (RMS) attenuation and phase errors for the 64 attenuation states are within 0.18 dB and 7°, respectively. The insertion loss is better than 2.54 dB; the return loss is better than −17 dB; and the input 1 dB compression point (IP1 dB) is 29 dBm at IF 12 GHz. To the best of our knowledge, this chip presents the highest attenuation accuracy, the lowest insertion loss, the best IP1dB, and a good matching performance in the range of 2–22 GHz using the 0.25 μm GaAs p-HEMT process.

Frequency tunable magnetostatic wave filters with zero static power magnetic biasing circuitry

A single tunable filter simplifies complexity, reduces insertion loss, and minimizes size compared to frequency switchable filter banks commonly used for radio frequency (RF) band selection. Magnetostatic wave (MSW) filters stand out for their wide, continuous frequency tuning and high-quality factor. However, MSW filters employing electromagnets for tuning consume excessive power and space, unsuitable for consumer wireless applications. Here, we demonstrate miniature and high selectivity MSW tunable filters with zero static power consumption, occupying less than 2 cc. The center frequency is continuously tunable from 3.4 GHz to 11.1 GHz via current pulses of sub-millisecond duration applied to a small and nonvolatile magnetic bias assembly. This assembly is limited in the area over which it can achieve a large and uniform magnetic field, necessitating filters realized from small resonant cavities micromachined in thin films of Yttrium Iron Garnet. Filter insertion loss of 3.2 dB to 5.1 dB and out-of-band third order input intercept point greater than 41 dBm are achieved. The filter’s broad frequency range, compact size, low insertion loss, high out-of-band linearity, and zero static power consumption are essential for protecting RF transceivers from interference, thus facilitating their use in mobile applications like IoT and 6 G networks.

L-band of ∼ 1.6 μm tunable multi-wavelength mode-locked Er-doped fiber laser with an MMF- FMF based structure

1.6 μm tunable mode-locked fiber laser are mainly used in the biomedical field, laser processing, and other aspects, have excellent application prospects. We propose a novel MMF-FMF-based device, which acts both as a saturable absorber and a wavelength selection filter. The reduction of insertion loss caused by FMF affects the laser gain competition process, leading to changes in gain allocation and bandwidth allocation. The laser generated stable mode-locked pulses with a repetition frequency of 23.23 MHz at pump powers exceeding 51 mW. By adjusting the angle of the fiber optic squeezer with the PC, successfully achieved switchable single-, dual-, and triple-wavelength lasing outputs, as well as tunable single- and dual-wavelength lasing outputs. The wavelength-tuning ranges for the single- and dual-wavelength lasing outputs were 31 nm (1570 nm-1601 nm) and 24 nm, respectively. The accurately adjustable L-band novel mode-locked fiber laser exhibits enormous potential for application.

Concept for Parameter Design and Optimization of Surface Acoustic Wave Devices

Concept for Parameter Design and Optimization of Surface Acoustic Wave Devices

A Hybrid 3-D Frequency Selective Structure Featuring Enhanced Stopband Suppression and Reduced Insertion Loss

A Hybrid 3-D Frequency Selective Structure Featuring Enhanced Stopband Suppression and Reduced Insertion Loss

Toward a10 dB net-gain waveguide amplifier in an Er3+-Yb3+ co-doped phosphate glass.

High-gain materials and high-quality structures are the two main conditions that determine the amplification performance of optical waveguides. However, it has been hard to balance each other, to date. In this work, we demonstrate breakthroughs in both glass optical gain and optical waveguide structures. We propose a secondary melting dehydration technique that prepares high-quality Er3+-Yb3+ co-doped phosphate glass with low absorption loss. Additionally, we propose a femtosecond laser direct-writing technique that allows controlling the cross section, size, and mode field of waveguides written in glass with high accuracy, leveraging submicron-resolution multi-scan direct-writing optical waveguide technology, which is beneficial for reducing insertion loss. As a proof of concept demonstration, we designed and fabricated two kinds of waveguides, namely, LP01- and LP11-mode waveguides in the Er3+-Yb3+ co-doped phosphate glass, enabling insertion loss as low as 0.9 dB for a waveguide length of 2 mm. Remarkably, we successfully achieved an optical amplification for both the waveguides with a net gain of >7 dB and a net-gain coefficient of >3.5 dB/mm, which is approximately one order of magnitude larger than that in the Er3+-Yb3+ co-doped phosphate glass fabricated by the traditional melt-quenching method. This will open new avenues toward the development of integrated photonic chips.

High-Quality AlGaN/GaN HEMTs Growth on Silicon Using Al0.07Ga0.93N as Interlayer for High RF Applications

In this study, AlGaN/GaN high electron mobility transistor (HEMT) with different interlayer thicknesses of Al0.07Ga0.93N were grown by metal-organic chemical vapour deposition (MOCVD) is investigated. The AlGaN/GaN HEMTs have the same device’s structure, with the Al0.07Ga0.93N interlayer thickness varied from 0 to 800 nm. All of the samples demonstrate high crystal quality in the GaN channel, with low dislocation density of (1.34–3.81) × 109 cm−2 and low AFM surface roughness of 0.27–0.39 nm. The heterostructure with an interlayer exhibits better mobility (1750 cm2 V∙s−1) compared to the structure without an interlayer (1610 cm2 V∙s−1). Furthermore, the interlayer improves breakdown voltage, and reduces insertion loss. The DC characteristics show that the 300 nm-thick Al0.07Ga0.93N is beneficial in improving leakage current and iso-breakdown voltage up to 450 V at a spacing of 10 μm. The insertion loss reduces to –0.75 dB mm−1 compared to the structure without an interlayer. The device with a 300 nm-thick Al0.07Ga0.93N interlayer exhibits the potential of RF, including a measured transconductance of 440 mS∙mm−1 and cutoff frequencies of = 48/96 GHz at a given bias point.

Frequency response and transient analysis of through glass packaging vias using matrix-rational approximation (MRA) technique for three-dimensional ICs

In this paper, a computationally efficient matrix rational approximation (MRA) technique is developed to analyze the electrical behaviour of through packaging vias in glass interposer (TGVs). Using MRA technique, the electrical behaviour of TGVs utilizing differential multi-bit configuration, filled with composite copper-mixed carbon nanotube bundle (Cu-mCNTB), is investigated. A temperature-dependent π-type equivalent circuit of such differential multi-bit (DM) composite TGVs is developed using partial-element equivalent-circuit technique. The effective complex conductivity of Cu-mCNTB is also derived by appropriately considering the effects of temperature-dependent mean free path in CNTs. The frequency dependent differential- and common-mode impedances are obtained up to 100 GHz through PEEC technique. It is analyzed that composite DM-TGVs outperform silicon via counterparts in terms of reduced insertion loss using proposed MRA technique and verified through high-frequency structure simulator (HFSS). The transient analysis including crosstalk-induced propagation delay, peak crosstalk, and peak timing of coupled Cu-mCNTB/composite DM-TGVs is determined through the proposed MRA model, which exhibits error within 1% compared to the SPICE. The robustness of proposed model is examined under a wide variety of test cases including the proposed 5-Cu-mCNTB composite TGV array. For the transient analysis, the CPU runtime using the MRA model is 18.57 × faster than the SPICE. To the best of the authors’ knowledge, it is for the first time that temperature-dependent modeling and crosstalk analysis of coupled TGV structures is reported using MRA technique.

Optimization of the Planar Schottky Diode Structure in THz Range

Optimization of the structure of a planar Schottky diode with a whisker and an air anode lead allowed to obtain 198 GHz bandwidth (fractional bandwidth of 16.5 %) at a central frequency of ~1200 GHz and reduce insertion losses of 3.4 dB at a noise temperature of ~3300 K.

Novel Miniaturized Self-Packaged Filters Based on Metasubstrate in SISL Platform

In this paper, a novel strategy is proposed to design miniaturized self-packaged filter based on the proposed metasubstrate in substrate integrated suspended line (SISL) platform. Multi-layer SISL and periodic metasubstrate structures contribute to the miniaturization and self-packaging of second-and fourth-order quarterwavelength hairpin filters, caused by the higher permittivity. The designed dumbbell-shaped metasubstrate shows a high relative permittivity of 15.4. The proposed FR4-based second/fourth-order filters with a reduced insertion loss of 1.13 dB/1.49 dB only show the miniaturized size of 0.26 λg ×0.19 λg and 0.27 λg ×0.32 λg, respectively. And the circuit areas of the above two designed filters with metasubstrate are reduced by 46% and 34%, compared with the cases without metasubstrate, successively.

Free Field Insertion Loss and Echo Reduction of Finite Size Periodic Scatterers in Room Environment

Free Field Insertion Loss and Echo Reduction of Finite Size Periodic Scatterers in Room Environment

Quadratic-Gradient Metasurface-Dome for Wide-Angle Beam-Steering Phased Array With Reduced Gain Loss at Broadside

The quest for increasing the scanning range of a phased array is a challenging task for antenna engineers, and its solution could lead to significant advances in different applicative scenarios, ranging from 5G and beyond 5G communications to radar and satellite systems. For this purpose, the use of a deflecting meta-dome is one of the most promising solutions recently proposed that, however, still presents some inherent limitations, such as the significant reduction of the broadside gain of the array, due to the diverging effect of the dome, as well as the complexity of the implementation due to the need of a continuous phase profile. In this framework, the paper aims at proposing some technical solutions for maximizing the meta-dome performance and relaxing the implementation complexity. In particular, by properly discretizing and engineering the phase profile along the dome and by taking into account the different angles of incidence onto the meta-cells, we show how it is possible designing realistic meta-domes with reduced insertion loss at broadside, improved steering capabilities, and a reduced profile. In addition, a complete design workflow for a realistic meta-dome based on cascaded metasurfaces is presented.

A Planar Integrated Rectenna Array With 3-D-Spherical DC Coverage for Orientation-Tolerant Wireless-Power-Transfer-Enabled IoT Sensor Nodes

Multiple IoT sensor nodes with radio frequency (RF) power harvesting are deployed in random positions and orientations with respect to the power transmitter (Tx) generally installed on ceiling and side walls. The IoT sensor nodes with wireless power transfer (WPT) systems employing conventional rectenna designs with complex structures can provide only 2-D coverage, thus, free-positioning and orientation-insensitive WPT is unrealizable. Therefore, a novel, compact, planar-integrated rectenna-array providing 3-D-spherical coverage is proposed for the WPT system in two-layer PCB technology. The proposed design scheme harvests maximum RF power in both, azimuth and elevation planes, by encapsulating endfire and inherent tilted-beam bore-sight rectenna elements within a single sector. The radial integration of six such sectors coordinately achieves 3-D-spherical dc coverage, and the bore-sight 3 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times1$ </tex-math></inline-formula> patch antenna array (PA) functions as a dc low pass filter (dc-LPF) offering miniaturization and insertion loss reduction. The endfire and bore-sight rectenna components harvest 240 and 255 mV at 1280 and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1176~\Omega $ </tex-math></inline-formula> output loads with RF-dc conversion efficiency of 69.1% and 65.28% at 5.8 GHz, respectively. Further, the rectenna elements are integrated using a simple and easily realizable low-loss parallel dc combining circuit, making it suitable for IoT sensor nodes.

Compact CEBG Filter for High-Frequency Applications With Low Insertion Loss

A compact configurable electromagnetic bandgap (CEBG) filter and a low-loss low-temperature cofired ceramics (LTCCs)-based electromagnetic bandgap (EBG) filter have been proposed. To the best of the authors’ knowledge, this is the minimum size configurable bandpass filter (BPF) ever reported using EBG material. The proposed circuits successfully integrate an integrated passive device (IPD) technique-based high- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Q$ </tex-math></inline-formula> capacitors and LTCC-based built-in capacitors with EBG substrates. The frequencies of the filters can be easily adjusted by controlling the capacitors. For proof-of-concept demonstration purposes, CEBG filters and LTCC-based EBG filters were designed and experimentally validated from the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$C$ </tex-math></inline-formula> -band to the Ku-band. The measurement results demonstrated the filters’ compact size, wide stopband, and reduced insertion loss (IL) as working frequency increases. Four LTCC EBG filters are implemented and fabricated with the highest working frequency of 17 GHz, a minimum IL of 1.91 dB, and a 3-dB fractional bandwidth (FBW) of 3%. The CEBG filter demonstrated a compact size of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.6\times1.35$ </tex-math></inline-formula> mm, a configurable frequency from 6.88 to 13.5 GHz with an almost constant FBW. Insertion losses of the EBG filters reduce as their working frequencies increase which shows an excellent high-frequency application capability of the filters.

Suppression of p-type parasitic channel formation at the interface between the aluminum nitride nucleation layer and the high-resistivity silicon substrate

In this study, GaN-based epitaxial structures were grown on high-resistivity silicon (HRSi) substrates by metalorganic chemical vapor deposition. The p-type parasitic channels generated at the interfaces of the aluminum nitride (AlN) nucleation layers and HRSi substrates were characterized by surface capacity measurement, backside secondary ion mass spectrometry, and spread resistance profiling. The 2-nm thick silicon nitride (SiNx) layer formed by nitridation on the HRSi substrates was used to suppress the Al diffusion from the 50-nm AlN nucleation layer and also prevented from generation of the p-type parasitic channels. The p-type parasitic channels induced insertion losses at high frequencies. Transmission line measurement was used to determine the insertion losses. The insertion loss of the GaN-based epitaxial structure with the optimized 25-nm AlN nucleation layer on the 2-nm SiNx layer was -2.72 dB/mm. It was only 0.04 dB/mm higher than that of the annealed HRSi substrate (-2.68 dB/mm) at 10 GHz. Obviously, the diffusion of Al from the optimized 25-nm thick AlN nucleation layer into the HRSi substrate can be alleviated by the SiNx layer, thereby reduced insertion loss.

Capacitive Feedbacked Cold-Phase Compensator Analog Pre-Distorter and PAE Enhancer for K-Band CMOS PAs

A K-band two-stage power amplifier (PA) with capacitive-feedbacked cold-phase compensator (cold-PC) linearizer and power-added-efficiency (PAE) enhancer is introduced in 180-nm CMOS technology. This cold-PC consists of two parts. First, a cold-FET analog pre-distorter (APD) with a new capacitive-feedbacked technique is proposed to improve the linear behavior of the PA by enhancing the corresponding APD’s compensation slope. The proposed implementation has a reduced insertion loss and a minimal chip area overhead. Second, a low-pass two-tunable inductive and capacitive PC is proposed to solve the phase shift problem at intermediate nodes that would enhance the PAE of the stacked-transistors configuration. The implemented PA achieves, at 23.5-GHz, a maximum measured PAE of 21.2%, output power at the 1-dB compression point (OP1dB) of 13.4-dBm, and saturated output power of 15-dBm using a total chip area of 0.58 mm2. Employing the proposed cold-PC results in a decrease of the measured error vector magnitude (EVM) of the 400-MHz 5G-NR of 64-QAM modulated signal and an increase of the OP1dB and its PAE by 2.5-dB and 7%, respectively (enhancement by 78% and 72% from the original case, respectively), which, to the best of authors’ knowledge, is the highest reported enhancement of the linearizers of k-band PAs.