Reduced DC Link Voltage Research Articles

A DSTATCOM Topology With Reduced DC-Link Voltage Rating for Load Compensation With Nonstiff Source

The distribution static compensator (DSTATCOM) is used for load compensation in power distribution network. In this paper, a new topology for DSTATCOM applications with nonstiff source is proposed. The proposed topology enables DSTATCOM to have a reduced dc-link voltage without compromising the compensation capability. It uses a series capacitor along with the interfacing inductor and a shunt filter capacitor. With the reduction in dc-link voltage, the average switching frequency of the insulated gate bipolar transistor switches of the DSTATCOM is also reduced. Consequently, the switching losses in the inverter are reduced. Detailed design aspects of the series and shunt capacitors are discussed in this paper. A simulation study of the proposed topology has been carried out using power systems computer-aided design simulator and the results are presented. Experimental studies are carried out to verify the proposed topology.

Two Different Schemes for Three-Level Voltage Space Vector Generation for Induction Motor Drives with Reduced DC-Link Voltage

In this paper, two different schemes for three-level voltage space vector generation for induction motor drives are proposed. In a conventional 3-phase four-pole induction motor, there exist two identical winding coil groups per phase around the stator, which are connected in series and spatially apart by two pole pitches. In this work, these two identical voltage profile pole pair winding coils in each phase of the induction motor are disconnected and reconnected appropriately to achieve a drive scheme with reduced dc-link voltage. Two different schemes are proposed in the present work. In the first scheme the identical pole phase winding groups are connected in two star groups and fed from the independently controlled (decoupled control) two two-level inverters from both sides of the motor with the same dc-link voltage with half the magnitude compared to conventional NPC three-level inverter. The phase windings are connected in two star groups, so there will not be any path for zero sequence currents. Thereby requirement of isolated voltage sources is eliminated compared to the previous open-end winding multilevel inverter schemes. In the second scheme the identical pole phase winding groups are connected in parallel and fed from the two two-level inverters from both sides of the motor with one fourth the dc-link voltage (compared to the conventional NPC three-level inverter) resulting in a three-level voltage space vector across the motor phase windings. The schemes presented in this paper, does not require any special design modification for the induction machine. For the present study, a four pole IM drive is used, and the scheme can be easily extended to induction motors with more than four poles. The proposed scheme is experimentally verified on a four pole, 5HP induction motor drive.