Reconfigurable Operation Research Articles

Design of a metasurface loaded with RF varactor and PIN diode integration dual-band reconfigurable antenna for bluetooth, Wi-Fi, WLAN and wireless 5G applications

Abstract This article presents a compact dual-band reconfigurable antenna design utilizing a metasurface integrated with an RF varactor and PIN diode for Bluetooth, Wi-Fi, WLAN, and 5G wireless applications. The results of the study show that using the metasurface reflector (MSR) structure gives a much higher gain than using a decagon antenna without a metasurface reflector. This antenna is designed and fabricated on FR4 epoxy substrate materials with a dielectric constant of 4.4 and the thickness of the substrate is 1.6 mm. The metasurface reflector (MSR) loaded antenna has a total electrical dimension of 0.51λ0 × 0.49λ0 × 0.013λ0, where λ0 represents the resonating wavelength at a 2.6 GHz center frequency. In the proposed work, the slotted decagon patch antenna consists of a complementary split-ring resonator constructed on its ground plane. Moreover, for the frequency reconfiguration, a PIN diode switch and an additional varactor diode switch are used for tuning the frequency band. Furthermore, without affecting the radiator structure, the varactor diode is placed on the upper side of the patch and the PIN diode switch is integrated into the ground plane. The proposed antenna has reconfigurable and tunable operating frequencies of 2.6 GHz and 3.4 GHz. The operational frequency of the band is switched between 2.6 GHz to 3.4 GHz. The switching operation of the dual configuration of 2.6 GHz with the PIN diode ON and 3.4 GHz with the PIN diode OFF. However, simultaneously applying a reverse bias voltage to the varactor diode from 0-10 V shifts its resonance frequency from 2640-2510 MHz and frequency tuning is done in respective bands. The proposed antenna achieved a peak gain of 7.5 dBi, and a radiation efficiency range of 72– 82% in the overall operating bands of interest. The proposed work is used for Bluetooth, Wi-Fi, WLAN, and wireless 5G applications. Performance verification is done by fabricating prototypes and verifying their performance using simulation and testing results.

Principles and Applications of Two-Dimensional Semiconductor Material Devices for Reconfigurable Electronics

With the advances in edge computing and artificial intelligence, the demands of multifunctional electronics with large area efficiency are increased. As the scaling down of the conventional transistor is restricted by physical limits, reconfigurable electronics are developed to promote the functional integration of integrated circuits. Reconfigurable electronics refer to electronics with switchable functionalities, including reconfigurable logic operation functionalities and reconfigurable responses to electrical or optical signals. Reconfigurable electronics integrate data-processing capabilities with reduced size. Two-dimensional (2D) semiconductor materials exhibit excellent modulation capabilities through electrical and optical signals, and structural designs of 2D material devices achieve versatile and switchable functionalities. 2D semiconductors have great potential to develop advanced reconfigurable electronics. Recent years witnessed the rapid development of 2D material devices for reconfigurable electronics. This work focuses on the working principles of 2D material devices used for reconfigurable electronics, discusses applications of 2D-material-based reconfigurable electronics in logic operation and artificial intelligence, and further provides a future outlook for the development of reconfigurable electronics based on 2D material devices.

Frequency-bin-encoded entanglement-based quantum key distribution in a reconfigurable frequency-multiplexed network

Large-scale quantum networks require dynamic and resource-efficient solutions to reduce system complexity with maintained security and performance to support growing number of users over large distances. Current encoding schemes including time-bin, polarization, and orbital angular momentum, suffer from the lack of reconfigurability and thus scalability issues. Here, we demonstrate the first-time implementation of frequency-bin-encoded entanglement-based quantum key distribution and a reconfigurable distribution of entanglement using frequency-bin encoding. Specifically, we demonstrate a novel scalable frequency-bin basis analyzer module that allows for a passive random basis selection as a crucial step in quantum protocols, and importantly equips each user with a single detector rather than four detectors. This minimizes massively the resource overhead, reduces the dark count contribution, vulnerability to detector side-channel attacks, and the detector imbalance, hence providing an enhanced security. Our approach offers an adaptive frequency-multiplexing capability to increase the number of channels without hardware overhead, enabling increased secret key rate and reconfigurable multi-user operations. In perspective, our approach enables dynamic resource-minimized quantum key distribution among multiple users across diverse network topologies, and facilitates scalability to large-scale quantum networks.

Digital twin-based shop-floor reconfiguration design for uncertainty management

Reconfiguration has emerged as a paradigm that adjusts shop-floor operations based on production requirements in such a way as to obtain desired performance and adapt to changes quickly. Existing research puts more emphasis on optimising the layout and configuration of shop floors based on simplified mathematical models and algorithms. However, uncertainty and complexity of shop-floor operations could diminish the effectiveness of the reconfiguration solution. This paper presents a digital twin-based design method for shop-floor reconfiguration to solve the problems. Digital twin models with dynamic fidelity are used for reconfiguration design to provide effective information of shop-floor complexity. To analyse the impact of uncertainty on shop-floor performance and then guide the shop-floor reconfiguration design, methods of shop-floor performance fluctuation identification, uncertain event extraction, reconfiguration operation domain division are proposed. The proposed method is verified with the case study of a chemical fibre silk cake packing shop floor.

All-Fiber Synapse Based on Ge2Sb2Te5 for Reconfigurable Logic Operations

All-Fiber Synapse Based on Ge₂Sb₂Te₅ for Reconfigurable Logic Operations

IMPLEMENTED RECONFIGURABLE CACHE MEMORY ARCHITECTURE BASED ON 32-BITS MIPS PROCESSOR

This work presents the design of a reconfigurable cache memory utilizing a 32-bit MIPS processor, implemented through the utilization of VHDL (Very high-speed IC Hardware Description Language). A comprehensive implementation of a 32-bit, single-cycle MIPS processor is presented in VHDL. This processor is capable of supporting 50 instructions, comprising 25-R-type, 16-I-type, and 9-J-type instructions. The processor incorporates a three-dimensional reconfigurable cache memory architecture, enabling the modification of cache memory size, cache organization (in terms of associativity), and cache block size. The reconfigurable cache memory concept proposes the use of multi-cache controller units to execute reconfiguration operations and ensure that all permitted cache memory sets can be utilized with varying levels of associativity. The design is built on an FPGA using the Xilinx ISE design suite, which is based on the hardware description language. To ensure that assess functionality of the proposed reconfigurable cache memory design for various reconfiguration scenarios, numerous assembly language programs have been developed and performed on the MIPS processor. The results validated the efficacy of the suggested reconfigurable cache memory concept and demonstrated its simulation using the Xilinx ISim simulator.

Resistive switching behavior of quasi-2D CsPbBr3 memristors: Impact of ambient atmosphere on logic storage and computing integration with anti-crosstalk and reconfiguration features

Passive units integrating storage and computing with anti-crosstalk and multi-logic reconstruction are crucial for high computing power and high-density non-volatile storage. In this study, we report an anti-crosstalk and reconfigurable logic memory based on a single passive quasi-two-dimensional (2D) CsPbBr3 device. The effect of the ambient atmosphere (air and N2 environments) on the resistive behavior of the memristors is explored. In air, these devices exhibit negative differential resistance (NDR) effects and antipolar resistive switching behavior, while in N2, they display irreversible switching from low-resistance state to high-resistance state. Various active electrodes (Ag, Cu, Au, and C) were employed to investigate this phenomenon. It is proposed that in air, O ions interact with surface defects under high alternating voltage, retaining a significant quantity of Br− ions within the quasi-2D CsPbBr3, resulting in capacitive-like behavior. Conversely, in N2, surface defects capture Br− ions, leading to the absence of a hysteresis loop in the I-V characteristic. Under N2 operation, write-once-read-many (WORM) capability is achieved. Surprisingly, operating under air enables integrated non-volatile storage and computing, facilitating 12 reconfigurable logic operations in a passive 1R structure and suppressing sneak current in crosstalk setups. This study emphasizes the pivotal role of air in the resistive switching mechanism and provides novel insights for developing next-generation memories tailored for high-density integrated circuits and storage-computing integration.

Anti-Interference All-Optical Logic Computing Based on a 2D Polarization-Sensitive Photodiode.

Optical logic operation is promising for ultrafast information processing and optical computing due to the high computation speed and low power consumption. However, conventional optical logic devices require either a complex structure and circuit design or a constant voltage supply, which impedes the development of high-density integrated circuits. Here, all-optical logic devices are designed using a self-powered polarization-sensitive photodiode of the GeSe homojunction, which is attributed to an anisotropic band structure and built-in electric field. The single photodiode can realize linear logic functions (AND, OR, NAND) and a nonlinear logic gate (XOR) by programming wavelength, power density, and polarization angle. Moreover, complex logic functions (XNOR, Y = IN1, Y = IN2, Y = IN1, and Y = IN2) can be achieved through integrating two photodiodes in parallel. In addition, the neural network algorithm is utilized to validate the feasibility of all-optical logic computing and anti-interference. This work proposes an avenue to design an all-optical reconfigurable logic operation in polarization-sensitive devices.

Bidirectional Polarization-Integrated Van Der Waals Ferroelectric Field-Effect Transistor for Multi-State Storage and Dual-Logic-in-Memory Computing

The rapidly growing number of AI-enabled applications is driving the need for development of energy efficient computing hardware that can handle massive amount of computations required for neural network operation. As one of the promising approaches for processing data within memory, Logic-in-memory is parallel execution of reconfigurable logic operation within memory allows fast and efficient computations. For realizing the logic-in-memory hardware, implementing practical logic functions with high density is of critical concern.Here, we demonstrate a multi-state dual-logic-in-memory device implemented via a single bidirectional polarization-integrated ferroelectric field-effect transistor (BPI-FeFET) by integrating the in-plane vdW ferroelectric semiconductor SnS and the out-of-plane vdW ferroelectric gate dielectric CuInP2S6 (CIPS). Four reliable resistance/conductance states (two-bit storage) with an on/off ratio between the highest and the lowest channel current of >105, high switching endurance (>104 cycles), and stable retention characteristics (>104 s). The mechanism of two-bit storage in a single BPI-FeFET is analyzed from two perspectives: carrier density and carrier injection controls, originating from the out-of-plane polarization of the gate dielectric and in-plane polarization of the semiconductor, respectively.Unlike the conventional multilevel FeFET, direct conversions among the four-memory states of proposed BPI-FeFET without pre-examination or additional erasing step are demonstrated experimentally. The potential of the BPI-FeFET as a low-cost and high-density in-memory computing circuit was further explored. To utilize the fabricated BPI-FeFET as a dual-logic-in-memory device, two logical operations are selected (e.g. XOR and AND) by properly setting initial states, and their parallel execution is demonstrated. Additionally, these logical computations are reconfigurable when the initial state of the device is set to different states, making it flexible for implementing various types of functions that can be potentially required for different types of neural networks. We believe the flexibility and efficiency of dual-logic-in-memory devices provide a promising pathway for realizing next generation low power computing systems.

Multibarrier Collaborative Modulation Devices with Ultra-High Logic Operation Density.

The demands for highly miniaturized and multifunctional electronics are rapidly increasing. As scaling-down processes of transistors are restricted by physical limits, reconfigurable electronics with switchable operation functions for different tasks are developed for higher function integration based on split- or vertical-dual-gate structures. To promote the present reconfigurable electronics and exceed the function integration limit, the critical issue is to integrate complex operations into simple circuit forms by establishing more control dimensions. This work proposes a multibarrier collaborative (MBC) modulation architecture to increase the control dimension by multiple forms of potential barriers and achieves combinational and reconfigurable logic operations by a single MBC device. The MBC architecture exhibits ultrahigh logic operation density, including 58.8% area reduction for multiplexer operations and 71.4% area reduction for 4-logic reconfigurable operations. Besides, a hardware security module composed of 4 MBC devices implementing 8 types of logic operations is demonstrated. This work reveals an effective design of function integration for next-generation electronics.

Boolean Computation in Single-Transistor Neuron.

Brain neurons exhibit far more sophisticated and powerful information-processing capabilities than the simple integrators commonly modeled in neuromorphic computing. A biological neuron can in fact efficiently perform Boolean algebra, including linear nonseparable operations. Traditional logic circuits require more than a dozen transistors combined as NOT, AND, and OR gates to implement XOR. Lacking biological competency, artificial neural networks require multilayered solutions to exercise XOR operation. Here, it is shown that a single-transistor neuron, harnessing the intrinsic ambipolarity of graphene and ionic filamentary dynamics, can enable in situ reconfigurable multiple Boolean operations from linear separable to linear nonseparable in an ultra-compact design. By leveraging the spatiotemporal integration of inputs, bio-realistic spiking-dependent Boolean computation is fully realized, rivaling the efficiency of a human brain. Furthermore, a soft-XOR-based neural network via algorithm-hardware co-design, showcasing substantial performance improvement, is demonstrated. These results demonstrate how the artificial neuron, in the ultra-compact form of a single transistor, may function as a powerful platform for Boolean operations. These findings are anticipated to be a starting point for implementing more sophisticated computations at the individual transistor neuron level, leading to super-scalable neural networks for resource-efficient brain-inspired information processing.

Spin-to-charge conversion via dual-mode ferromagnetic resonance in Ta/NiFe/FeMn/CoFeB multilayer

The precise engineering of microwave absorption frequencies is of paramount importance in the advancement of spintronic-based RF devices. In the pursuit of this objective, magnetic thin films demonstrate unrivaled efficacy in enabling external modulation of their microwave responses in a reconfigurable manner. Here, we demonstrate dual-frequency ferromagnetic resonance modes and corresponding spin-to-charge conversion efficiency in thin film structures comprising Ta/NiFe/FeMn/CoFeB multilayer. A systematic thickness variation of the NiFe layer (i.e., 4–20 nm) has been undertaken to elucidate the impact on both static and dynamic properties across the multilayer structure. The presence of two distinct magnetic layers manifests in the emergence of two-step magnetic hysteresis loops, which are incorporated with unique resonant modes. The separation between the resonant fields shows tunable properties with excitation frequencies, thereby offering a wide range of reconfigurable operating parameters. The effective damping parameter has shown a decrement with increasing thickness of the NiFe layers. The effective spin mixing conductance for the NiFe layer was found to be 7.4 ± 0.6 nm−2. The spin-to-charge conversion within these structures has been demonstrated through measurements of the inverse spin Hall effect. Systematic thickness variation revealed that the prominent voltage drop was observed in the NiFe layer compared to the CoFeB layer. Considering the opposite spin Hall angles of Ta and FeMn layer, the direction of the spin flow and spin-to-charge conversion efficiency are summarized.

Reconfigurable terahertz stretchable spoof surface plasmon polariton waveguide for filter applications

In this paper, a reconfigurable terahertz spoof surface plasmon polariton (SPP) waveguide is proposed on a stretchable polydimethylsiloxane (PDMS) substrate. The SPP unit incorporates a folded stub and a conventional V-shaped SPP groove, enhancing the equivalent capacitance and consequently reducing the cutoff frequency. The cutoff frequency of the proposed SPP unit can be tuned from 285 to 390 GHz with stretchable factors of 1 ∼ 1.2, thereby achieving a reconfigurable operating frequency. The horizontal dimension of the proposed SPP waveguide can be tuned from 6.36 mm to 7.12 mm. Moreover, the SPP waveguide can generate transmission continuous phase shifts of −30°, −60°, −90°, and −120° with stretchable factors of 1.05, 1.1, 1.15, and 1.2, respectively, in the 150–190 GHz band. Applying the characteristic mode theory, a split ring resonator (SRR) functions as the equivalent magnetic dipole, which remains unaffected by stretchable deformation. When loaded with four SRR cells, the proposed SPP waveguide generates a tunable passband with a fixed notched frequency at 193 GHz. Another stretchable SPP resonator serves as the equivalent electric dipole, operating from 284 GHz to 256 GHz in 1∼1.2 stretchable states. By loading three SPP resonators, the SPP waveguide can achieve a passband for the initial state, and a tunable stopband is introduced under 1.1 and 1.2 stretchable states. The proposed stretchable method provides a promising solution for planar terahertz components and systems with reconfigurable functions.

Voltage control of multiferroic magnon torque for reconfigurable logic-in-memory

Magnons, bosonic quasiparticles carrying angular momentum, can flow through insulators for information transmission with minimal power dissipation. However, it remains challenging to develop a magnon-based logic due to the lack of efficient electrical manipulation of magnon transport. Here we show the electric excitation and control of multiferroic magnon modes in a spin-source/multiferroic/ferromagnet structure. We demonstrate that the ferroelectric polarization can electrically modulate the magnon-mediated spin-orbit torque by controlling the non-collinear antiferromagnetic structure in multiferroic bismuth ferrite thin films with coupled antiferromagnetic and ferroelectric orders. In this multiferroic magnon torque device, magnon information is encoded to ferromagnetic bits by the magnon-mediated spin torque. By manipulating the two coupled non-volatile state variables—ferroelectric polarization and magnetization—we further present reconfigurable logic operations in a single device. Our findings highlight the potential of multiferroics for controlling magnon information transport and offer a pathway towards room-temperature voltage-controlled, low-power, scalable magnonics for in-memory computing.

2D Reconfigurable van der Waals Heterojunction for Logic Gate Circuits and Wide-Spectrum Photodetectors via Sulfur Substitution and Band Matching.

The attractive physical properties of two-dimensional (2D) semiconductors in group IVA-VIA have been fully revealed in recent years. Combining them with 2D ambipolar materials to construct van der Waals heterojunctions (vdWHs) can offer tremendous opportunities for designing multifunctional electronic and optoelectronic devices, such as logic switching circuits, half-wave rectifiers, and broad-spectrum photodetectors. Here, an optimized SnSe0.75S0.25 is grown to design a SnSe0.75S0.25/MoTe2 vdWH for logic operation and wide-spectrum photodetection. Benefiting from the excellent gate modulation under the appropriate sulfur substitution and type-II band alignment, the device exhibits reconfigurable antiambipolar and ambipolar transfer behaviors at positive and negative source-drain voltage (Vds), enabling stable XNOR logic operation. It also features a gate-modulated positive and negative rectifying behavior with rectification ratios of 265:1 and 1:196, confirming its potential as half-wave logic rectifiers. Besides, the device can respond from visible to infrared wavelength up to 1400 nm. Under 635 nm illumination, the maximum responsivity of 1.16 A/W and response time of 657/500 μs are achieved at the Vds of -2 V. Furthermore, due to the strong in-plane anisotropic structure of SnSe0.75S0.25-alloyed nanosheet and narrow bandgap of 2H-MoTe2, it shows a broadband polarization-sensitive function with impressive photocurrent anisotropic ratios of 15.6 (635 nm), 7.0 (808 nm), and 3.7 (1310 nm). The direction along the maximum photocurrent can be reconfigurable depending on the wavelengths. These results indicate that our designed alloyed SnSe0.75S0.25/MoTe2 vdWH has reconfigurable logic operation and broadband photodetection capabilities in 2D multifunctional integrated circuits.

Nonvolatile photoelectric memristor for reconfigurable Boolean logic operation and data storage

Photoelectric memristors have the advantages of highly parallel computing and large-scale interconnection, which provides a promising method for reconfigurable logic operations and greatly promotes the development of new memory computing technology. In this paper, a photoelectric memristor was fabricated using natural gelatin and water-soluble CdSe/ZnS quantum dots with a shell structure. Under light stimulation, the device undergoes photoelectric effects in the dielectric layer, generating electron–hole pairs and causing the device to transition from a high-resistance state to a low-resistance state. Seven nonvolatile logic functions are achieved using three wavelengths of light excitation devices. Compared with traditional electrically controlled memristors, emerging photoelectric memristors are more attractive because they can integrate the advantages of photons and electrons.

Reconfigurable Fractional-Order Operator and Bandwidth Expansion Suitable for PIα Controller

Reconfigurable Fractional-Order Operator and Bandwidth Expansion Suitable for PI^α Controller

A High-Efficiency, Ultrawide-Dynamic-Range Radio Frequency Energy Harvester Using Adaptive Reconfigurable Technique

This paper presents a novel adaptive reconfigurable rectifier architecture for radio frequency energy harvesting (RFEH); in addition, a new metric for high-efficiency dynamic range (DR) is proposed. The presented rectifier architecture is based on a double-sided diode-feedback cross-coupled differential-drive rectifier (CCDR) structure incorporating self-body bias for reconfigurable operation. An adaptive structure based on a Schmitt trigger is proposed to adaptively switch the rectifier connection without auxiliary voltage (Vaux), with two rectifier stages in parallel at low power and in series at high power. The system is simulated at a 180 nm CMOS process and the results show more than 17 dB DR at 900 MHz, with efficiency higher than 50% at a 100 kΩ load.

Development of PLC-Based Hardware Test-Bench Prototype for Solar-Wind-Battery-Based Microgrid System’s Control Algorithm Validation

Programmable Logic Controllers (PLCs) are gaining traction in microgrid operation due to their real-time deployment, reliable and robust operation, and fast response, even in harsh environments. Recognizing the critical need for robust and reconfigurable microgrid control and operation, this research proposes a hardware test-bench prototype using the Reconfigurable Allen-Bradley—Micro820/2080-LC20-20QBB PLC to demonstrate control algorithms aiming for efficient control, energy management, and resilient microgrid automation. The design and construction of a prototype controller test bench, along with the PLC configuration, wiring diagrams, and control logic, constitute the significant contributions of this research. The proposed controller test bench’s performance is evaluated through similar condition simulations in the presence of disturbances induced by the reduced contributions of renewable energy sources, such as solar and wind. The results illustrate the effectiveness of the developed control algorithm implemented in the proposed controller, ensuring the stable operation of the microgrid. Consequently, this work advances the simulation-based validation of microgrid control algorithms and provides insights into the practical application of a PLC-based hardware test bench under various environmental conditions.

Design of a fractal triple-band reconfigurable filtering antenna for multiband applications

This letter constitutes a novel triple-band reconfigurable filtering antenna used for Bluetooth, WiMAX and WLAN applications. First, a compact triple-band reconfigurable filter is instigated which is composed of two pairs of Stepped Impedance Resonators (SIRs) and a pair of Uniform Impedance Resonators (UIRs). The SIRs are entrenched at the upper and lower half of feed lines operating at 2.4 and 5.4 GHz, respectively. A pair of UIRs operating at 3.5 GHz is folded and enclosed near the upper SIR. A shunt stub is tapped at the source-load feeding lines to upgrade the selectivity of the filter. The proposed filter uses four PIN diodes to initiate different reconfigurable multiband operations. A fractal antenna is implemented with a modified binary tree topology. The ground plane of the proposed antenna is reformed with a stub. The improved antenna structure enables three radiating bands with enhanced performance. Later, the designed filter is integrated into the antenna to implement the intended triple-band reconfigurable filtering antenna.