Reconfigurable Analog Front-end Research Articles

A LFP/AP Mode Reconfigurable Analog Front-End Combining an Electrical EEEG-iEEG Model for the Closed-Loop VNS.

This article presents a local field potential (LFP)/action potential (AP) mode reconfigurable analog front-end (AFE) dedicated for the closed-loop vagus nerve stimulator (VNS). It combines an inverse electrical model of the intracranial electroencephalogram (iEEG) conducting in the brain tissues and been recorded at scalp as the extended electroencephalogram (EEEG). The AFE contains a LFP/AP mode reconfigurable EEEG preamplifier, a tunable integrator to compensate the effect of either the recording electrodes or head tissues, and an adder. The LFP/AP mode reconfigurable EEEG preamplifier consists of a tunable chopper-stabilized amplifier (CSA) and a 2nd-order tunable low pass filter (LPF). For better separation of LFP and AP signals, a high-order DC servo loop (DSL) characterized as a 2nd-order DSL in parallel with a 1st-order DSL is exploited in the tunable CSA to achieve a tunable high-pass frequency with a stopband attenuation slope (SAS) of +40 dB/dec. In addition, the tunable LPF can obtain a tunable low-pass frequency with a SAS of -40 dB/dec and provide additional 20 dB gain for AP signals. Fabricated in a SMIC 180 nm CMOS technology, and in the LFP band (0.5 Hz-200 Hz) and AP band (300 Hz-5 kHz), the measured mid-band gains of the LFP/AP mode reconfigurable EEEG preamplifier are 39.6 dB and 59.5 dB, the input-referred noises (IRNs) are 2.2 μVrms and 6.3 μVrms, the DC/in-band input impedances are 1.27/1.26 GΩ and 0.3/0.22 GΩ, respectively. The power consumption per channel AFE is 6.3 μW, and the die area is 1.4 mm × 0.25 mm.

A Sensing Mode Reconfigurable Analog Front-End IC for Capacitive Touch and a-IGZO TFT-Based Active-Matrix Capacitive Fingerprint Sensors

In this paper, we propose a sensing mode reconfigurable analog front-end (AFE) IC for a capacitive touch sensor (CTS) and amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT)-based active-matrix capacitive fingerprint sensor (CFS). The CTS consists of the transmit and receive electrodes for enabling the mutual-capacitance (CM) sensing mode, which can detect the multi-touch. The CFS has the array of a-IGZO TFT and a sensing electrode for enabling the self-capacitance (CS) sensing mode to achieve the high sensitivity. In addition, it can reduce the number of sensing lines by adopting the active-matrix type structure to achieve the low-manufacturing cost. To sense the CTS and CFS, the proposed AFE IC is reconfigured to operate the CM and CS sensing modes, respectively. The proposed AFE IC was fabricated using a $0.13~\mu \text{m}$ CMOS process technology with 20 V high-voltage devices, and demonstrated with a $128\times 72\,\,32$ -inch CTS and a $96\times 96\,\,0.27$ -inch CFS, which represents a pixel resolution of 500 pixel-per-inch. The proposed AFE IC achieves the signal-to-noise ratios of 47.8 dB and 25.0 dB for the CTS and CFS, respectively.

Implantable Devices with Reconfigurable Biosensing Analog Front End

This paper, have a tendency to develop a reconfigurable analog front end for wireless body sensing element nodes and implantable devices with reduced size. By converting voltage in to current the effort to achieve the area efficiency is taken. Because these are bio implantable chips if the numbers of transistors are reduced it will reduce lots of power and area, the circuit operation is also quick. In the proposed system, narrow swing current mirror circuit is used in the low pass filter region. By using the current mirror the same input current can be obtained at the output. At the same time the area of the chip used in the devices gets reduced. The active space of the chip is 157µm2.

A Fully Reconfigurable Universal Sensor Analog Front-End IC for the Internet of Things Era

This paper proposes a fully reconfigurable universal sensor analog front-end for the Internet of Things era. It is implemented to be able to process different types (R, C, V, and I) of sensor output by using a single input bond pad and a single reconfigurable analog front-end. In addition, a reconfigurable acquisition mode selection method is applied to measure a wide magnitude range of sensor output. Furthermore, the compensation method for the baseline of the sensor is proposed, which can suppress the saturation of the circuit and improve the sensitivity of the sensor output. Also, the correlated double sampling technique is adopted to reduce the low-frequency noise that can affect the sensor output. The proposed system can detect within a relative error of about 1% by using only one input bond pad and analog front-end for the target sensor output range. The proposed system is implemented using TSMC 0.25- $\mu \text{m}$ CMOS process.

A 36 μW 1.1 mm2 Reconfigurable Analog Front-End for Cardiovascular and Respiratory Signals Recording.

This paper presents a 1.2 V 36 μW reconfigurable analog front-end (R-AFE) as a general-purpose low-cost IC for multiple-mode biomedical signals acquisition. The R-AFE efficiently reuses a reconfigurable preamplifier, a current generator (CG), and a mixed signal processing unit, having an area of 1.1mm2 per R-AFE while supporting five acquisition modes to record different forms of cardiovascular and respiratory signals. The R-AFE can interface with voltage-, current-, impedance-, and light-sensors and hence can measure electrocardiography (ECG), bio-impedance (BioZ), photoplethysmogram (PPG), galvanic skin response (GSR), and general-purpose analog signals. Thanks to the chopper preamplifier and the low-noise CG utilizing dynamic element matching, the R-AFE mitigates ${\text{1}}\text{/}f$ noise from both the preamplifier and the CG for improved measurement sensitivity. The IC achieves competitive performance compared to the state-of-the-art dedicated readout ICs of ECG, BioZ, GSR, and PPG, but with approximately 1.4×-5.3× smaller chip area per channel.

Reconfigurable Multiparameter Biosignal Acquisition SoC for Low Power Wearable Platform.

A low power and low noise reconfigurable analog front-end (AFE) system on a chip (SoC) for biosignal acquisition is presented. The presented AFE can be reconfigured for use in electropotential, bioimpedance, electrochemical, and photoelectrical modes. The advanced healthcare services based on multiparameter physiological biosignals can be easily implemented with these multimodal and highly reconfigurable features of the proposed system. The reconfigurable gain and input referred noise of the core instrumentation amplifier block are 25 dB to 52 dB, and 1 μVRMS, respectively. The power consumption of the analog blocks in one readout channel is less than 52 μW. The reconfigurable capability among various modes of applications including electrocardiogram, blood glucose concentration, respiration, and photoplethysmography are shown experimentally.

Digitally assisted analog front-end power management strategy via dynamic reconfigurability for robust heart rate monitoring

This paper presents a reconfiguration methodology to digitally assist a reconfigurable analog front-end (AFE), with the objective of reducing the power consumption of an ECG-based cardiac activity monitoring system, while maintaining an acceptable performance for the desired signal processing. In this study, we focus on the performance of ECG-based heart rate estimation as an example to demonstrate our proposed strategy. Utilizing the consistency and quasi-periodicity of the ECG waveform, two regions are pre-defined based on the prediction of the R peak by a normalized least mean square (NLMS) adaptive filter. The power consumption and performance of the AFE is dynamically reconfigured accordingly. Experimental evaluations show the system can measure heart rate variability (HRV) with an error of 0.5-4 beats/min with the sampling rate reduced from 488 sps to 100 sps and 40 sps for the two regions respectively, bit resolution reduced from 10-bit to 6-bit and noise tolerance substantially relaxed, offering an estimated 62% total power saving.

초음파 의료 영상 시스템을 위한 재구성 가능한 아날로그 집적회로

초음파 의료 영상 시스템을 위한 재구성 가능한 아날로그 집적회로

Adaptive Ultrasonic Distance Measurement Technique for Handwriting Digitization Using Reconfigurable Analog Blocks

This paper proposes a low-power dynamically adaptive distance measurement technique for ultrasonic (US) pen digitizers. The technique utilizes a new clock frequency-throttling technique for a reconfigurable analog front-end in implementing a frequency-hopping scheme to minimize power dissipation. As a result, a noise-tolerant distance measurement which is not possible in conventional schemes is realized. Furthermore, the use of reconfigurable analog blocks facilitates wider bandwidth usage of the Piezo film transducers that are used for ultrasonic transmissions and receptions.

Future Software-Defined Radio Platforms and Mapping Flows

A software-defined radio (SDR) system is a radio communication system in which physical layer components are implemented on a programmable or reconfigurable platform. The modulation and demodulation is performed in software and thus the radio is able to support a broad ran: of frequencies and functions concurrently. In the ideal SDR transceiver scheme, an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) are attached to the antenna. This would imply that a digital signal processor (DSP) is connected to the ADC and the DAC, directly performing signal processing for the streams of data from/to antenna. Today, the ideal SDR transceiver scheme is still not feasible and thus some processing has to happen in the reconfigurable analog front end.

A highly integrated analog front-end for 3g

This paper describes a reconfigurable analog front-end (AFE) and audio codec IC supporting the wideband code division multiple access (WCDMA) standard. The chip is fabricated on Intel's 0.18-/spl mu/m (SOC) flash+logic+analog (FLA) process technology using a 0.35-/spl mu/m feature size analog transistor. The transmit path contains a 10-bit segmented rail-to-rail digital-to-analog converter, automatically tunable active RC filter, and programmable gain amplifier (PGA) with self-tuning gain and offset correction circuit. The receive path incorporates a PGA, active RC filter, and an 8-bit analog-to-digital converter with built-in offset correction. The AFE operates at 2.7 V with a current consumption of 55 mA and total active area of 15 mm/sup 2/.