Receiver Front-end Module Research Articles

Low Noise and high linearity Wide band Low Noise Amplifier for 5G Receiver Front End System

This work Demonstrates a wideband LNA for 5G receiver front end modules with high linearity, Low noise reused topology has an inter stage wideband inductor based two common source cascade stages. The configuration provides the bias current; better Noise figure increases the forward gain. By providing RC Series network at gate terminal of second stage the return losses are reduced and stability will be increased. After pre and post simulation all parameters are better than the existing LNAS. After post simulation results, the Noise figure is achieved less than 1dB and forward gain as flat 16dB for wide band width of 1.5 – 5.5 GHz. At the 1dB compression point the output is 20dbm achieved and OIP3 IS +40dbm is achieved. The chip size of an LNA along with pad is 0.64mm2. The design is GaAsp HEMT process at 50nm technology.

A QPSK 110-Gb/s Polarization-Diversity MIMO Wireless Link With a 220–255 GHz Tunable LO in a SiGe HBT Technology

In this article, a polarization-diversity technique multiple-input multiple-output (MIMO) is demonstrated to double the spectral efficiency of a line-of-sight quadrature phase-shift keying (QPSK) wireless link at 220-255 GHz with a pair of highly integrated single-chip transmitter (TX) and receiver (RX) front-end modules in 0.13-μm SiGe HBT technology ( f T/ f max = 350/550 GHz) exploiting only a low-cost wire-bonded chip-on-board packaging solution for high-speed baseband (BB) signals. Both TX and RX chips accommodate two independent fundamentally operated direct-conversion in-phase and quadrature (IQ) paths with separately tunable on-chip multiplier-based (×16) local oscillator (LO) generation paths driven from a single external highly stable 13.75-16-GHz frequency synthesizer. On the RX side, a mixer-first architecture is implemented to improve the symmetry between upper and lower sidebands (USB and LSB) at the cost of an increased noise figure (NF), whereas, on the TX chip, each upconversion mixer is followed by a gain-bandwidth (BW)-limited fourstage power amplifier (PA) to support the link budget at a meter distance. Next, two independent IQ data streams from the upconversion/downconversion paths on each chip are directed to a common lens-coupled broadband on-chip slot antenna system. This way, two orthogonal circular polarizations [left-handed circular polarization (LHCP) and right-handed circular polarization (RHCP)] can be transmitted with sufficient isolation for link operation without the need for a high-speed depolarizer in the BB for any relative orientation between TX and RX modules. The antenna combined with a 9-mm diameter Si-lens provides a directivity of 23.5-27 dBi at 210-270 GHz for each of the modules. This, along with a peak radiated power of 7.5 dBm/ch from the TX module, and the cascaded conversion gain (CG)/single sideband (SSB) NF of 18/18 dB/ch for the RX module followed by a broadband amplifier (PSPL5882) from Tektronix allowed successful transmission of two independent QPSK data streams with an aggregate speed of 110 and 80 Gb/s over 1 and 2 m, respectively, at 230 GHz with a board-level limited channel BB bandwidth (BW) of 13.5 GHz.

Symmetric signal and local oscillator polarization diverse coherent optical receiver.

An improved coherent optical receiver architecture that compensates for a random drift in the state of polarization (SOP) of both the signal and the local oscillator (LO) is presented for the first time. The proposed architecture comprises two conventional coherent optical receiver front-ends in tandem, where the SOP of the LO is first divided into its two orthogonal components and then distributed to each coherent optical receiver front-end module. Two distinct methods of polarization diversity recovery of the modulation based on the MRC technique and an eigenvalue-eigenvector decomposition of the covariance matrix have been used to effectively recover the transmitted signal. The concept is validated by numerical simulations, where a differential quadrature phase-shift keyed (DQPSK) modulated signal with a random time-varying SOP is first generated. After its mixing with a LO also possessing a random time-varying SOP, the algorithms that have been developed are provided with eight input variables to be digitally processed. The constellation diagrams corresponding to the recovered DQPSK modulation obtained using the two polarization diversity methods are presented.

30 GHz HTS Receiver Front-End Based on Monolithic Josephson Mixer

A compact, high-gain, and low-noise Ka band HTS Josephson junction-based receiver front-end module for wireless communication is presented in this paper. The front-end module consists of biasing circuits, a semiconductor low-noise amplifier, and a monolithic HTS circuit consisting of an Josephson mixer, bandpass and lowpass filters. The semiconductor LNA in the first stage is applied to achieve a low noise figure of the whole front-end module. Integration of the Josephson mixer with a number of HTS passive components on a single chip improves the coupling efficiency and reduces the connection losses between the components. The total dimension of the packaged front-end module is below 25 mm × 20 mm × 15 mm, which is very compact. Measurement result shows that the front-end module has an overall conversion gain around 40 dB, and a low noise figure close to 0 dB with an LO driving power around -38 dBm at 40 K.

Demonstration of a Portable HTS MMIC Microwave Receiver Front-End

We report the first demonstration of a portable HTS monolithic microwave integrated circuit (MMIC) receiver front-end module operating on a commercial mini cryocooler. The HTS circuit consists of a step-edge junction mixer and a number of HTS filters fabricated on a single MgO substrate. The HTS MMIC circuit is integrated with the mini cryocooler. The sample vacuum chamber, cold-head, compressor and cooling fans are all packed into one customer-designed portable box of approximately 350 mm × 350 mm × 250 mm in dimension. The HTS Josephson junction-based microwave circuit operated successfully in the cryocooler unshielded without observable performance degradation. The design and implementation of the compact unit and performance evaluation of a HTS MMIC frequency down-converter are presented.

A Broadband, Low Noise, Integrated 340 GHz Schottky Diode Receiver

A 340 GHz subharmonic Schottky diode mixer and a multioctave (3-16 GHz) custom low noise amplifier (LNA) have been integrated to form a compact receiver front-end module, exhibiting ultra low noise with an exceptional flat response and broadband instantaneous frequency coverage. At room temperature, a receiver noise temperature of 870 K is measured at an LO drive of 1.2 mW at 170 GHz. The total dc power consumption of the LNA is below 120 mW. Measurements are in good agreement with simulations taking the mixer and LNA mismatch interaction into account.

A COMPACT X-BAND RECEIVER FRONT-END MODULE BASED ON LOW TEMPERATURE CO-FIRED CERAMIC TECHNOLOGY

This letter presents a compact low temperature co-fired ceramic (LTCC) receiver front-end module integrating 9 building blocks. The receiver is a twice-frequency-conversion front-end module with image rejection, works at X-band, consists of an X-band embedded image rejection band-pass filter (BPF), an L- band multilayer image rejection quasi-ellipitc BPF, two monolithic microwave integrated circuit (MMIC) low noise amplifiers (LNAs), two intermediate frequency (IF) amplifiers, two mixers, a IF BPF, and some lumped passive components. All MMICs are mounted into pre- making cavities in the three layers LTCC substrate of the top surface, and the interconnection between MMICs and surface microstrip-line is established by bond wires. A multilayer five-pole Chebyshev interdigital BPF is developed as the first image rejection filter, and a four-pole quasi-elliptic BPF composed of stepped-impedance hairpin resonator and miniaturized hairpin resonators that can be coupled through the apertures on the common ground plane is proposed for as the second image rejection filter. The developed X-band receiver front-end module is fabricated using twenty layers LTCC dielectric substrate, which has a compact size of 30 × 20 × 20 mm 3 (including the metal cavity). The measured receiver gain and noise figure are more than 32 dB and less than 4 dB, respectively. The first and second image rejection is better than 28 dB and 40 dB, respectively. Compared with conventional receiver front-end module using hybrid microwave integrated circuit (HMIC) technology, the proposed receiver module not only has compact size, but also has good performance.

A 1-V 5-GHz CMOS Multiple Magnetic Feedback Receiver Front-End

In this paper, a receiver front-end module operating at 5 GHz and suitable for low-voltage operation is presented. The design consists of a single amplifying transistor low-noise amplifier topology that utilizes multiple magnetic feedback in order to simultaneously achieve high gain and high reverse isolation. In addition, a mixer topology for optimum performance regarding gain, noise, and linearity under low-voltage operation is presented. The design has been fabricated in IBM's 0.13-mum CMOS technology, and the measured performance indicates a receiver conversion gain of 22.3 dB, a noise figure of 2.64 dB, and a third-order input intercept point of .

LTCC-Based Highly Integrated Millimeter-Wave Receiver Front-End Module

This paper presents the design and fabrication of a highly integrated Low Temperature Co-fired Ceramic (LTCC) receiver front-end module. This LTCC module is a dual channel receiver module, works at Ka-band, and fabricated including six Ferro A6M dielectric layers and five metal layers, contains eight embedded resistors and eight MMICs. All MMICs are mounted into pre-making cavities on the top surface of the LTCC substrate. Three slot coupled waveguide-to-microstrip transitions are integrated at LTCC substrate to realize RF and LO signal input. The developed module is highly integrated and reliable, which has a compact size of 58 × 50 × 22 mm3 (including the metal cavity). Each channel of the receiver has the noise figure of less than 9 dB and the gain of more than 24 dB at Ka-band.

A new 94-GHz six-port collision-avoidance radar sensor

A new 94-GHz collision avoidance radar sensor is proposed. The receiver front-end module is based on a six-port phase/frequency discriminator (SPD). The SPD, composed of four 90/spl deg/ hybrid couplers, is manufactured in a metal block of brass using a computer numerically controlled milling machine. Simulation and measurement S-parameters of the SPD are presented in the frequency band. New SPD computer models are generated and used in the system simulations. Preliminary measurements and system simulations performed to obtain the relative velocity of the target and its distance are presented. Statistical evaluations show an acceptable measurement error of this radar sensor.

Ka-band direct digital receiver

A new direct-conversion wideband (26-28.5 GHz) six-port receiver is proposed for mass-market wireless communications. This six-port receiver is designed to operate without the need for precise power reading and the use of a digital signal processor that is usually required in other receivers. The proposed receiver architecture is chosen to satisfy requirements of hardware receivers used in high-speed QPSK communications. The receiver contains a receiver front-end, QPSK demodulator, and carrier recovery module. A reverse modulation loop was used to provide a rapid carrier recovery. The maximum bit rate is determined solely by the limiting speed of the baseband module. This new hardware receiver is proposed as a robust, rugged, low-cost receiver for use in wide Ka-band wireless mass-market QPSK communications such as local multipoint distribution system services, which is a prime example of communication equipment requiring such receivers. Bit-error-rate results are presented versus the noise and reference signal phase shift.

First heterodyne receiver frontend module including a polarization diversity receiver OEIC on InP

For the first time a packaged polarization diversity coherent receiver OEIC including detector units (photodetectors, JFET, load resistor) has been fabricated with the following data: waveguide loss 2 dB, 3 dB balance within 0.4 dB, polarization extinction >30 dB (TM) and >17 dB (TE), 3 dB cutoff frequency of 0.9 GHz, common mode rejection ratio 30 dB. >

Coherent receiver front-end module including a polarization diversity waveguide OIC and a high-speed InGaAs twin-dual p-i-n photodiode OEIC both based on InP

The economic implementation of coherent optical systems requires practical integrated optical front-end receiver devices with reasonable degree of integration. As a precursor to such an OEIC, an InGaAsP/InP polarization diversity waveguide OIC, including two TE/TM-mode splitters, two TE-filters, two 3-dB couplers, and a planar front-illuminated InGaAs twin-dual-p-i-n photodiode-OEIC (including two balanced p-i-n photodiodes) was fabricated. The OIC depicts a TE/TM-mode separation of more than 13 dB, a 3-dB coupler imbalance of less than 10% and an intrinsic loss of less than 2 dB. A single detector device shows a responsivity of 1.05 A/W at a wavelength of 1.55 mu m, a total series resistance below 10 Omega , and a 3-dB bandwidth of more than 10 GHz. The O(E)ICs have been (packaged) in a versatile housing for system tests. The operation of the modules has been demonstrated in a heterodyne experiment yielding a bandwidth of more than 2.2 GHz for the whole module.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>