Abstract

In this article, a polarization-diversity technique multiple-input multiple-output (MIMO) is demonstrated to double the spectral efficiency of a line-of-sight quadrature phase-shift keying (QPSK) wireless link at 220-255 GHz with a pair of highly integrated single-chip transmitter (TX) and receiver (RX) front-end modules in 0.13-μm SiGe HBT technology ( f T/ f max = 350/550 GHz) exploiting only a low-cost wire-bonded chip-on-board packaging solution for high-speed baseband (BB) signals. Both TX and RX chips accommodate two independent fundamentally operated direct-conversion in-phase and quadrature (IQ) paths with separately tunable on-chip multiplier-based (×16) local oscillator (LO) generation paths driven from a single external highly stable 13.75-16-GHz frequency synthesizer. On the RX side, a mixer-first architecture is implemented to improve the symmetry between upper and lower sidebands (USB and LSB) at the cost of an increased noise figure (NF), whereas, on the TX chip, each upconversion mixer is followed by a gain-bandwidth (BW)-limited fourstage power amplifier (PA) to support the link budget at a meter distance. Next, two independent IQ data streams from the upconversion/downconversion paths on each chip are directed to a common lens-coupled broadband on-chip slot antenna system. This way, two orthogonal circular polarizations [left-handed circular polarization (LHCP) and right-handed circular polarization (RHCP)] can be transmitted with sufficient isolation for link operation without the need for a high-speed depolarizer in the BB for any relative orientation between TX and RX modules. The antenna combined with a 9-mm diameter Si-lens provides a directivity of 23.5-27 dBi at 210-270 GHz for each of the modules. This, along with a peak radiated power of 7.5 dBm/ch from the TX module, and the cascaded conversion gain (CG)/single sideband (SSB) NF of 18/18 dB/ch for the RX module followed by a broadband amplifier (PSPL5882) from Tektronix allowed successful transmission of two independent QPSK data streams with an aggregate speed of 110 and 80 Gb/s over 1 and 2 m, respectively, at 230 GHz with a board-level limited channel BB bandwidth (BW) of 13.5 GHz.

Highlights

  • I N RECENT years, the demand for high data-rate wireless links has grown exponentially

  • Due to the large instantaneous BW required for 100+ Gb/s data rates, the influence of both the radio frequency (RF) bandpass response and the LP characteristics of high-speed BB interface for both transmit and receive paths needs to be traded against each other resulting in some specific choice of transceiver architecture

  • If not the most, important is the necessity of in-phase and quadrature (IQ) operation at RF frequency [15], [16], which is removed with an intermediate frequency (IF) architecture. It leads to potentially substantial leakage between I and Q channels that may dominate other impairments and limit the achievable data rates despite a sufficient arbitrary white Gaussian noise-defined (AWGN) signal-to-noise ratio (SNR)

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Summary

INTRODUCTION

I N RECENT years, the demand for high data-rate wireless links has grown exponentially. The majority of the currently available radio frequency (RF) front-end solutions for near-terahertz fully electronic wireless communication relies on III–V semiconductors with impressive peak f max exceeding 1 THz [6]–[8] but featuring a low level of integration in expensive split-block waveguide packaging with external aperture antennas [9]–[14] Both short-distance and external optics-supported longdistance links with modulation speeds of up to 96 and 100 Gb/s have been demonstrated for 8-PSK (phase shift keying) and 16-QAM (quadrature amplitude modulation) modulation formats, respectively [9], [10]. Despite the larger requested BW, a high data-rate operation may be easier to achieve due to the relaxed linearity and phase error tolerance Considering that both methods of approaching the targeted 100+ Gb/s speed by increasing either modulation order or modulation BW at near-terahertz carrier frequencies face multiple challenges related to practical hardware limitations, two additional techniques can be further investigated to increase a total aggregate modulation speed.

TOP-LEVEL ARCHITECTURE OF TX AND RX
BLOCK-LEVEL DESCRIPTION OF DP TX AND RX MODULES
Circuit-Level Description of the Single-Polarization Path
Packaging
Antenna System
RF CHARACTERIZATION
Measurement Setup Description
DP MIMO Measurement
Findings
CONCLUSION
Full Text
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