Real-time Signal Processing System Research Articles

An advanced real-time digital signal processing system for linear systems emulation, withspecial emphasis on network and acoustic response characterization

A fast digital signal processing (DSP) system is described that can perform real-timeemulation of a wide variety of linear audio-bandwidth systems and networks,such as reverberant spaces, musical instrument bodies and very high order filternetworks. The hardware design is based upon a Motorola DSP56309 operating at 110million multiplication-accumulations per second and a dual-channel 24 bit codecwith a maximum sampling frequency of 192 kHz. High level software has beendeveloped to express complex vector frequency responses as both infinite impulseresponse (IIR) and finite impulse response (FIR) coefficients, in a form suitable forreal-time convolution by the firmware installed in the DSP system memory. Analgorithm has also been devised to express IIR filters as equivalent FIR structures,thereby obviating the potential instabilities associated with recursive equations andnegating the traditional deficiencies of FIR filters respecting equivalent analoguedesigns. The speed and dynamic range of the system is such that, when sampling at48 kHz, the frequency response can be specified to a spectral precision of 22 Hz;when sampling at 10 kHz, this resolution increases to 0.9 Hz. Moreover, it is alsopossible to control the phase of any frequency band with a theoretical precision of10−5 degrees in all cases. The system has been applied in the study of analogue filter networks,real-time Hilbert transformation, phase-shift systems and musical instrument bodyemulation, where it is providing valuable new insights into the understanding ofpsychoacoustic mechanisms.

Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies

The design of high performance, high precision, real-time digital signal processing (DSP) systems, such as those associated with wavelet signal processing, is a challenging problem. This paper reports on the innovative use of the residue number system (RNS) for implementing high-end wavelet filter banks. The disclosed system uses an enhanced index-transformation defined over Galois fields to efficiently support different wavelet filter instantiations without adding any extra cost or additional look-up tables (LUT). A selection of a small wordwidth modulus set are the keys for attaining low-complexity and high-throughput. An exhaustive comparison against existing two's complement (2C) designs for different custom IC technologies was carried out. Results reveal a performance improvement of up to 100% for high-precision RNS-based systems. These structures demonstrated to be well suited for field programmable logic (FPL) assimilation as well as for CBIC (cell-based integrated circuit) technologies.

Generalised intermediate transforms: methods of computation and potential applications

The Generalised Transform theory defines a class of orthogonal transforms that include the Fourier and Walsh transforms together with a set of transforms known as Intermediate Transforms. The latter are less familiar and are yet to receive serious attention regarding applicability and methods of computation. This paper attempts to address these two issues via the development of efficient methods for computation of the Intermediate Transforms suitable for both software and hardware implementation, and the identification of an application area for these transforms. Based on a radix-2 FFT algorithm, a novel and easy to implement generic method for fast computation of any member of a given Generalised Transform set, has been developed. A potential area of application in real-time digital signal processing and communication systems has been identified, investigated and assessed quantitatively and qualitatively. This is based on employing the Intermediate Transforms as alternative tools to the discrete Fourier transform trading accuracy for speed. Computational speed advantages of the Intermediate Transforms over the FFT are demonstrated by a new high-speed, two-butterfly realisation method suitable for real-time, hardware processor-based implementation.

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems

The complexity of hardware/software codesign of embedded real-time signal processing systems can be reduced by rapid system prototyping (RSP). However, existing RSP frameworks do not provide a sound specification and design methodology (SDM) because they require the designer to choose the implementation target before specification and design exploration and they do not work together coherently across development stages. This paper presents a new SDM, called MAGIC, that allows the designer to capture an executable specification model for use in design exploration to find the optimal multiprocessor technology before committing to that technology. MAGIC uses a technique called benchmarking, for early validation of promising architectures. The MAGIC SDM also exploits emerging open-standards computation and communication middleware to establish model continuity between RSP frameworks. This methodology has been validated through the specification and design of a moderately complex system representative of the signal processing domain: the RASSP Synthetic Aperture Radar benchmark. In this case study, MAGIC achieves three orders of magnitude speedup over existing virtual prototyping approaches and demonstrates the ability to evaluate competitive technologies prior to implementation. Transfer of this methodology to the system-on-a-chip domain using Cadence's Virtual Component Codesign infrastructure is also discussed with promising results.

ASSP-based radar signal processing

This paper proposes the Application Specific Signal Processor(ASSP)-based implementation of the real-time signal processing system in both spatial domain and time domain for a phased-array radar. This paper also proposes the system-on-silicon hardware design of some ASSPs including the adaptive beamformer, FFT appliation specific integrated circuit, clutter map former and update, moving target extractor and video integrator. The advantages of the processing system are compact, efficient, and robust.

An Introduction to Grain Wave

GrainWave is a real-time software synthesizer and signal-processing system for Power Macintosh computers. It runs on the standard equipment that comes with any Power Macintosh, without requiring any additional hardware. GrainWave has an open synthesis architecture, based upon units called operators. An operator can generate a signal or transform one. Operators are collected into regions that represent individual instruments. One or more regions are contained in a patch. The user can play only one patch at a time. GrainWave is designed to be flexible, with high

Digital signal processors for a signal processing laboratory

An undergraduate level laboratory course on digital signal processors and their use in real-time digital signal processing (DSP) systems is described. Special emphasis is put on some practical issues such as execution time optimization, finite wordlength effects and a pipelined strategy as a suitable way to improve the performance of a real-time DSP system. The primary purpose of the laboratory is a better understanding of the theoretical concepts and a more active participation of the students in the course. The authors think that this paper will be of interest to those teaching related courses such as Introduction to DSP, Digital Signal Processing, Real-time DSP, Microprocessors and Hardware/Softmare Interaction. The well-known Texas Instruments' TMS320C2x and TMS320C5x fixed-point processors are used as the fundamental tool in the lab experiments and the TMS320C3x is suggested as a low-cost floating-point alternative. Enough detail is provided in the paper to duplicate certain parts of the experiments.

Real-Time Vision-based Detection of Waiting Pedestrians

This paper presents a real-time digital signal processing system to detect the presence of pedestrians waiting to cross an intersection. A pedestrian detection algorithm is developed and implemented on a Texas Instruments TMS320C40 digital signal processor (DSP) chip such that videosignals captured and transmitted from an actual intersection are processed in real-time. The detection algorithm consists of a background update and background subtraction components applied to image blocks. The background update is done in order to cope with brightness changes that occur in actual outdoor scenes. In addition, waiting and moving pedestrians are distinguished by using the temporal changes of image block intensities. The results obtained indicate that this DSP implementation provides an acceptable detection rate for this traffic management problem.

Embedded software in real-time signal processing systems: design technologies

The increasing use of embedded software, often implemented on a core processor in a single-chip system, is a clear trend in the telecommunications, multimedia, and consumer electronics industries. A companion paper (Paulin et al., 1997) presents a survey of application and architecture trends for embedded systems in these growth markets. However, the lack of suitable design technology remains a significant obstacle in the development of such systems. One of the key requirements is more efficient software compilation technology. Especially in the case of fixed-point digital signal processor (DSP) cores, it is often cited that commercially available compilers are unable to take full advantage of the architectural features of the processor. Moreover, due to the shorter lifetimes and the architectural specialization of many processor cores, processor designers are often compelled to neglect the issue of compiler support. This situation has resulted in an increased research activity in the area of design tool support for embedded processors. This paper discusses design technology issues for embedded systems using processor cores, with a focus on software compilation tools. Architectural characteristics of contemporary processor cores are reviewed and tool requirements are formulated. This is followed by a comprehensive survey of both existing and new software compilation techniques that are considered important in the context of embedded processors.

Embedded software in real-time signal processing systems: application and architecture trends

We present an extensive survey of trends in embedded processor use with an emphasis on emerging applications in wireless communication, multimedia, and general telecommunications. We demonstrate the importance of application-specific instruction-set processors (ASIPs) in high-volume, low cost applications. We also examine some of the underlying trends of the applications in which embedded processors are used. This is followed by a description of embedded software development tool requirements. High-performance software compilation emerges as a key requirement. Finally, specific industrial case studies of products in MPEG, videophone, and low-cost digital signal processor (DSP) applications are used to illustrate the architecture design tradeoffs, and highlight specific tool requirements. A companion paper (Goosens et al., 1997) presents a comprehensive survey of embedded software development tools, focusing mostly on retargetable software compilation.

Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures

Integrated circuits in telecommunications and consumer electronics are rapidly evolving towards single chip solutions. New IC architectures are emerging, which combine instruction-set processor cores with customised hardware. This paper describes a high-level synthesis system for integration of real-time signal processing systems on such processor cores. The compiler supports a flexible architectural model. It can handle certain types of incompletely specified architectures, and offers capabilities for retargetable compilation and architectural exploration. Results for a realistic application from the domain of audio processing indicate the feasibility and power of the presented approach.

Ultrasonic inspection system for tubular products using real-time digital signal processing

The authors report a real-time signal processing system for ultrasonic testing called the Intelligent Signal Extraction system. This improves the signal-to-noise ratio by synchronous averaging and by finite impulse response filtering with an easy installation into a conventional ultrasonic testing system, resulting in a reliable quality control and guarantee system to meet the requirements in the quality of steel products. This signal processing system is being installed in the actual production lines of electric resistance welding where electrical noise should be reduced to achieve more reliable NDI systems. For the clad expansion pipes, the noise due to the austenitic coarse grains is found to be effectively reduced by the signal processing system.

Switched-current oversampling converters

There are many choices in designing a real-time signal processing system. To exploit the advantages that inexpensive digital CMOS process technologies provide, it is usually a good choice to use digital signal processing circuits extensively and to use analog circuits only as a bridge between the real analog world and digital signal processing circuits. The mixed analog/digital circuits usually have high performance and low cost. SI oversampling converters in particular are the ideal choice as the front ends for the mixed analog/digital design. They serve to bridge the real world and modern process technologies. >

High-level software synthesis for the design of communication systems

A synthesis environment that targets software programmable architectures such as digital signal processors (DSPs) is presented. These processors are well suited for implementation of real-time signal processing systems with medium throughput requirements. Techniques that tightly couple the synthesis environment to an existing communication system simulator are also presented. This enables a seamless transition between the simulation and implementation design level of communication systems. Special focus is on optimization techniques for mapping data flow oriented block diagrams onto DSPs. The combination of different mapping and optimization strategies allows comfortable synthesis of real-time code that is highly adapted to application-specific needs imposed by constraints on memory space, sampling rate, or latency. Thus, tradeoff analysis is supported by efficient interactive or automatic exploration of the design space. All presented concepts are illustrated by the design of a phase synchronizer with automatic gain control on a floating-point DSP.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Signal processing in slit-scan flow cytometry of cell conjugates.

The design and implementation of a real-time signal processing system for slit-scan flow cytometry is described. The system is used to measure the separate scatter and fluorescence peak heights of 2 adherent cells. Preliminary measurements of changes in the membrane potential induced by interactions between natural killer (NK) cells and their target cells are presented.

A denotational theory of synchronous reactive systems

In this paper, systems which interact permanently with their environments are considered. Such systems are encountered, for instance, in real-time control or signal processing systems, C3-systems, and man-machine interfaces, to mention just a few cases. The design and implementation of such systems require a concurrent programming language which can be used to verify and synthesize the synchronization mechanisms, and to perform transformations of the concurrent source code to match a particular target architecture. Synchronous languages are convenient tools for such a purpose: they rely on the assumptions that: (1) internal actions of synchronous systems are instantaneous, and (2) communication with the environment is performed via instantaneous flashes involving some external stimuli. In this paper, we present a mathematical model of synchronous languages and illustrate its use on the Signal language. This model is denotational, and encompasses both relational and functional styles of specification. It allows us to answer fundamental questions related to synchronous languages, such as “what are the basic constructions which should be provided by such languages?”

Synchronous programming with events and relations: the SIGNAL language and its semantics

In this paper, systems which interact permanently with their environment are considered. Such systems are encountered, for instance, in real-time control or signal processing systems, C 3-systems, man-machine interfaces, to mention just a few. The design and implementation of such systems require a concurrent programming language which can be used to verify and synthesize the synchronization mechanisms, and to perform transformations of the concurrent source code to match a particular target architecture. Synchronous languages are convenient tools for such a purpose: they rely on the assumption that: (1) internal actions of synchronous systems are instantaneous, and (2) communication with the environment is performed via instantaneous flashes involving some external stimuli. In this paper, we present a synchronous programming language: SIGNAL. A SIGNAL program specifies dynamical relations between (internal and external) signal flows. The SIGNAL compiler checks deadlock and determinism of the program, and produces an intermediate level code equivalent to a nested family of concurrent automata. The compilation algorithm is supported by: (1) a behavioural semantics of SIGNAL programs in terms of conditional rewriting rules, (2) the coding of this semantics into the skew product of a dynamical system over the field of integers modulo 3 and directed graphs, (3) an algebraic algorithm to transform the above coding into an equivalent executable one, which provides by the way an execution semantics of the language. We briefly discuss the implementation aspects, and explain the capabilities and limitations of the current version of the SIGNAL compiler.

Synthesis of ASIC regular arrays for real-time image processing systems

In this paper the problems involved with high-level synthesis of ASIC regular arrays for real-time signal processing systems will be outlined. It will be shown that novel nonlinear, behavior preserving, transformations and extended affine mapping techniques are of key importance in mapping nonuniform recurrence equations on regular arrays with realistic constraints on area, throughput and I/O bandwidth.

特集 画像処理―アルゴリズムとシステム 映像合成のための動ベクトル検出法に関する一検討

A new video synthesis method is proposed. In this method, the key for extracting moving objects is given in the first frame. In the following frames, the key is moved and transformed according to the detected motion-vector of the objects. Then with this transformed key, the objects are extracted automatically and synthesized. A motion-vector detection method suitable for this synthesis is discussed. According to the experiment using motion pictures with pan, tilt, zoom, and rotation, the matching method obtains an error smaller than ±2 pixels with detection points of 4 distant areas on the edge of the objects. It is confirmed that this synthesis method can be achieved at a video-rate on the real-time video signal processing system called the Picot-system.

ECOLOG II: a real-time acoustic signal processing system for fish stock assessment

A new real-time signal processing sonar system (ECOLOG II) has been developed. Even though the system is compact it is capable of performing in real time all basic functions required for acoustic fisheries stock assessment, including simultaneous echo integration and target strength estimation. The system incorporates a precision echo sounder and a powerful internal processor connected to a host personal computer workstation. The system is flexible so that the same hardware may be used for various operating modes. All user control and operation of the sounder/processor is done with the host workstation. The workstation also provides post processing, data storage and various graphics presentation of output data.