RC Low-pass Filter Research Articles

Lorenz’s state equations as RC filters

In this study, the Lorenz system electronic implementation is performed using an RC low-pass filter within the xyz state equations. This electronic development shows that it is possible to know for each state the cutoff frequency. The bifurcation diagram for each state is shown as a function of cutoff frequency. Simulation results support this suggestion.

Research on the analysis method of power system relay protection action characteristics based on fault recording data

The action characteristics of power system relay protection devices can well analyze whether the relevant actions are correct. An analysis method of relay protection action characteristics in power system based on fault recording data is designed. After analyzing the relay device structure and protection action characteristics and requirements, the power system relay protection action record data recorded by the fault recorder; The second order RC low-pass filter is used to preprocess the recorded data; The filtered data is input into the analysis model of relay protection action characteristics based on SVM algorithm. The SVM algorithm classifies whether the relay protection action characteristics recorded by the filtered fault recording data meet the expectations, and completes the analysis of power system relay protection action characteristics. The experimental results show that this method can effectively analyze the operation characteristics of power system relay protection, and can accurately check whether the relay protection device can operate correctly.

Low-pass RC filter modified by liquid crystal exhibiting one Debye relaxation - theoretical approach

Low-pass RC filter modified by liquid crystal exhibiting one Debye relaxation - theoretical approach

A Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 22-nm CMOS

This paper presents a low noise, and high linearity reconfigurable receiver (RX) analog baseband (ABB) with tunable bandwidth (BW) and gain for multi-standard applications. The designed ABB consists of a programmable gain amplifier (PGA) and a second-order active RC low-pass filter (LPF) with cutoff frequency range from 0.7 MHz–10 MHz, whereas the gain could be tuned between 0 dB and 49 dB. The proposed ABB is implemented in 22 nm CMOS process. The post-simulation results show that the current consumption is 3.36 mA from 1 V supply and the area occupies 571×328 μm 2. The ABB achieves 42.8 dBm in-band third-order harmonic intercept point (IIP3). The spurious-free dynamic range (SFDR) and in-band total harmonic distortion (THD) is 83.2 dBc and is -83.1 dB, respectively. The input referred in-band integrated noise (IRN) is 144.8 μVrms . A digital DCOC is used to calibrate the output DC level.

Perancangan dan Pembuatan Data Acquisition Device Sebagai Sistem Akuisisi Data untuk Kendali Mobil Formula Student

Data Acquisition Device (DAQ) is an electronic component used in formula student vehicles. To optimize the performance of the formula student vehicle and its driver, it is necessary to analyze and monitor the data acquisition system. Parameters acquired on the car include the position of the brake pedal/throttole and wheel speed.DAQ system has 5 input channels namely 3 analog input pins and 2 digital input pins, and 3 output channels, which is the controller pin, fault pin, and brake light pin. The DAQ system in this research is designed and made using Teensy 3.6, a signal conditioning circuit consisting of an RC low pass filter, voltage follower, non-inverting amplifier, and logic level shifter. DAQ system uses CANBUS to read and process sensor data. DAQ system can acquire data from the KTC Linear Motion Position sensor PZ-12-A-50P with an accuracy value of 99,91%; Hall-effect Rotary Position sensor RTY120LVNAX with an accuracy value of 99,94% for both the first and second sensors; and Proximity sensor LJ12A3-4-Z/BX with an accuracy value of 99,58% for the first sensor and 99,46% for the second sensor. DAQ is able to run controller signal processing, detect faults, and activate brake light signal according to FSAE rules.

Electro-acoustic analogies between thermoelastic component of the photoacoustic signal and low-pass RC filter

This paper presents a new approach to the thermal characterization of aluminum, based on the electro-acoustic analogy between the thermoelastic component of the photoacoustic signal and the passive RC low-pass filter. The analogies were used to calculate the characteristic thermoelastic cut-off frequencies of the photoacoustic component and obtain their relationship with the thickness of the aluminum samples. Detailed numerical analysis showed that the required relationship is linear in the loglog scale and can serve as a reference curve for the given material. The results of the numerical analysis were also confirmed experimentally.

Enhanced Charging Energy Efficiency via Optimised Phase of Directly Charging an Energy Storage Capacitor by an Energy Harvester

This paper presents a technique to enhance the charging time and efficiency of an energy storage capacitor that is directly charged by an energy harvester from cold start-up based on the open-circuit voltage (VOC) of the energy harvester. The proposed method charges the capacitor from the energy harvester directly until the capacitor voltage reaches 0.75VOC of the energy harvester, which corresponds to an equivalent charging efficiency of over 81% based on theoretical analysis. This charging efficiency is much higher than relying on a boost converter to charge up the capacitor when the energy harvester is low as most of the functioning blocks cannot operate at low voltage. A control circuit based on RC high-pass and low-pass filters, and a comparator was introduced to detect the instance when the capacitor is charged up to 0.75VOC of the energy harvester. A circuit was built to verify the proposed method and tested with a piezoelectric energy harvester. The proposed circuit achieved an enhanced charging time of over 91% faster and a final capacitor voltage of 317% higher than a conventional boosting scheme.

Design Analysis and Circuit Topology Optimization for Programmable Magnetic Neurostimulator.

Transcranial magnetic stimulation (TMS) is a form of non-invasive brain stimulation commonly used to modulate neural activity. Despite three decades of examination, the generation of flexible magnetic pulses is still a challenging technical question. It has been revealed that the characteristics of pulses influence the bio-physiology of neuromodulation. In this study, a second-generation programmable TMS (xTMS) equipment with advanced stimulus shaping is introduced that uses cascaded H-bridge inverters and a phase-shifted pulse-width modulation (PWM). A low-pass RC filter model is used to estimate stimulated neural behavior, which helps to design the magnetic pulse generator, according to neural dynamics. The proposed device can generate highly adjustable magnetic pulses, in terms of waveform, polarity and pattern. We present experimental measurements of different stimuli waveforms, such as monophasic, biphasic and polyphasic shapes with peak coil current and the delivered energy of up to 6 kA and 250 J, respectively. The modular and scalable design idea presented here is a potential solution for generating arbitrary and highly customizable magnetic pulses and transferring repetitive paradigms.

A 20-Gb/s wideband AGC amplifier with 26-dB dynamic range in 0.18-μm SiGe BiCMOS

This paper presents a 20-Gb/s automatic gain control (AGC) amplifier in a 0.18-μm SiGe BiCMOS for high-speed applications. The proposed AGC amplifier compactly consists of a folded Gilbert variable-gain amplifier (VGA), a post amplifier (PA), a 50-Ω output buffer, and AGC loop including an open-loop peak detector (PD), a RC low-pass filter (LPF), and an error amplifier (EA). The AGC amplifier achieves the broadband characteristic by utilizing inductive peaking and capacitive degeneration as well as fT-doubler techniques to overcome the large parasitic capacitances. The proposed AGC circuits together with a linear VGA exhibits a wide gain control range of 45 dB for the received signal strength indication (RSSI). The measured AGC amplifier achieves a maximum gain of 21 dB and a -3-dB bandwidth (BW) of 20.6 GHz, which can support up to 25.4-Gb/s data rate. For the pseudorandom bit sequence (PRBS) length 231–1 with a bit-error rate (BER) of 10−12 at 20 Gb/s, the measured input dynamic range is 26 dB (20–400mVpp) and the peak-to-peak data jitter is less than 8 ps. The AGC amplifier consumes a power of 160 mW from a 3.3-V supply voltage and occupies an area of 850 μm × 850 μm.

Frequency Response of Metal-Oxide Memristors

Memristors have been at the forefront of nanoelectronics research for the last few decades, offering a valuable component to reconfigurable computing. Their attributes have been studied extensively along with applications that leverage their state-dependent programmability in a static fashion. However, practical applications of memristor-based alternating current (ac) circuits have been rather sparse, with only a few examples found in the literature where their use is emulated at higher frequencies. In this work, we study the behavior of metal-oxide memristors under a noninvasive ac perturbation in a range of frequencies, from 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> Hz. Metal-oxide memristors are found to behave as RC low-pass filters and they present a variable cut-off frequency when their state is switched, thus providing a window of reconfigurability when used as filters. We further study this behavior across distinct material systems, and we show that the usable reconfigurability window of the devices can be tailored to encompass specific frequency ranges by amending the devices' capacitance. This study extends current knowledge on metal-oxide memristors by characterizing their frequency-dependent characteristics, providing useful insights for their use in reconfigurable ac circuits.

Design and test of a mitigation system against voltage ringing in MITICA Acceleration Grid Power Supply

The Acceleration Grid Power Supply of MITICA is a high power, high voltage power supply devoted to feed the acceleration grids of the full scale prototype of the ITER NBI injector. It is divided in two subsystems: the AGPS – Conversion System (CS) and the AGPS – DC Generator (DCG), procured by different domestic agencies. Numerical simulations have pointed out a voltage ringing at the interface of the two systems, which would generate repeated high overvoltage at the input of the AGPS-DCG, not in compliance with the interface requirements. The phenomenon has been investigated and a solution for the mitigation has been identified based on a suitable low pass RC filter, as a trade-off between simplicity and effectiveness. The filters have been successfully tested directly with the AGPS-CS to demonstrate the reduction of the voltage peaks in the operation condition foreseen for the AGPS.

Performance Limits of Generalized Sampling Based 2-Channel Analog-to-Digital Converter

This brief proposes an analog-to-digital converter (ADC) based on Generalized Sampling Theorem and derives a closed form expression of its performance, viz., signal-to-quantization noise ratio (SQNR) and alias-suppression (AS). The ADCs in the 2-channels sample the signal and its filtered version, respectively, at half the Nyquist rate. The outputs of the two ADCs are upsampled by a factor of 2, passed through appropriate reconstruction filters, and then added to give an effective sample-rate which is double that of the sample-rate of each channel ADC. Performance of the proposed ADC has been summarized for simple filters like differentiator, integrator, passive RC low-pass filter, and passive CR high-pass filters. The proposed ADC could therefore be used as an alternative to other popular ADC structures like time-interleaved, frequency-interleaved, and filter-bank ADCs, to achieve high sample-rate with minimal analog circuit overhead.

Bio-Amplifier based on MOS bipolar Pseudo-Resistors: A New Approach using its non-linear characteristic

This paper proposes a new and refined bio-amplifier design, which associates DC offset cancellation, adequate frequency response and buffered outputs to a significant reduction of the signal recovery time. A MOS-Bipolar pseudo-resistor integrated to the feedback network of a single-stage Operational Transconductance Amplifier and the source-follower buffers give to the new topology its main advantages. This architecture makes use of the high resistance values of these pseudo-resistors to eliminate the offset DC level input preserving the low cut-off frequency, without the need of high capacitances, thereby significantly reducing the active die area, which enables its use as a front-end pre-amplifier assembled directly on the acquisition probes. The recovery time after an input voltage transitory of high-amplitude is an important characteristic of the bio-potential amplifiers due to their very low cut-off frequency. The proposed bio-amplifier utilizes the non-linear characteristics of the pseudo-resistor in the recovery time reduction. This time was evaluated and the topology presented a significant contribution in this aspect, assuming values 90% lower when compared with the same topology using a constant resistance. The new amplifier allows voltage gain of 30dB from 0.6 Hz to 2 kHz, and Total Harmonic Distortion (THD) of 0.19% for an input signal of 10Hz. This work also provides a behavioral spice model for MOS-Bipolar pseudo-resistor, which allows an accurate simulation of the linear and nonlinear pseudo-resistor characteristics, obtained through an experimental method of indirect characterization. This method is based on the transitory response from a first order RC low pass filter. The experimental characterization method is of fundamental importance, due to the absence of appropriate SPICE models that describe with precision the pseudo-resistance behavior. The circuits were manufactured by MOSIS on 8HP SiGe BiCmos Global Foundries 0.13μm technology.

Semiclassical Broadening in Quantum Dot Thermometry

We studied the experimental conditions required for the accurate measurement of the electron temperature by using quantum dot (QD) thermometry. The physical requirements were examined by numerically evaluating the QD conductance as a function of QD-reservoir coupling and the electron temperature. An empirical formula for the Coulomb blockade peak at all coupling strengths was suggested. Thereafter, practical limitations set by voltage noise were investigated through a semiclassical treatment of the QD. A noise-broadening, in addition to thermal broadening, was identified, and a noise limit was provided for a given electron temperature. The analysis was applied to a realistic measurement setup by considering a dilution fridge equipped with low-pass RC-filters. We found that careful placements of filters were crucial in order to avoid thermal noise from the filters while measuring ultralow electron temperatures.

State Estimation of RC Filters using Unscented Kalman Filter

This paper implements unscented Kalman filter (UKF) for output voltage estimation of RC low pass filter (LPF) and high pass filter (HPF). At first, the state space model has been obtained using Kirchhoff’s current law (KCL). The performance of UKF has been compared with extended Kalman filter (EKF). The simulation results validate the superiority of UKF over EKF as the estimation error is smaller using UKF as compared to the EKF method. As the UKF uses unscented transform (UT) and EKF uses Taylor series expansion for linearization purpose, linearization error is smaller in UKF as compared to EKF method. Also, UKF implementation has the advantage that it does not require Jacobian computation of nonlinear system model.

A 0.6-V Power-Efficient Active-RC Analog Low-Pass Filter With Cutoff Frequency Selection

This article presents a fully differential (FD) low-voltage (LV) fourth-order Butterworth active- RC low-pass filter (LPF) with a maximum cutoff frequency $(f_{o})$ of 160 MHz, $f_{o}$ programmability, and adaptive power. The proposed filter targets communication systems requiring high and reconfigurable $f_{o}$ at supply voltages $(V_{\mathrm {DD}}s)$ of 0.6 V. The filter is implemented with an active- RC topology, a programmable $f_{o}$ between four steps, 20/40/80/160 MHz, and a $f_{o}$ fine-tuning option after fabrication via capacitor banks. A compact LV FD amplifier with feedforward gain-boosting implementation is used to meet the stringent filter’s performance. The novel amplifier achieves an open loop gain of 66 dB and a maximum unity-gain frequency (UGF) of 759 MHz with $V_{\mathrm {DD}} = 0.6$ V and 5.27 mW of power dissipation. Using the proposed amplifier, the filter achieves the highest $f_{o}$ reported in the literature for LV active- RC implementations and 40% power reduction over similar high- $f_{o}$ LV filters. The filter was fabricated in a CMOS 130-nm technology; it has a THD = 50.7 dB, signal-to-noise and distortion (SNDR) = 45.37 dB, $P_{\mathrm {1dB}} = 4.26$ dBm and 520- $\mu \text{V}$ RMS integrated noise over the filter’s bandwidth (BW), while consuming 23.8 mA from a 0.6-V supply for $f_{o} = 160$ MHz.

DIGITAL OSCILLATOR CIRCUIT WITH AN EXTENDED REPETITION PERIOD OF A PSEUDO-RANDOM PULSE SEQUENCE

In this paper, we consider the issue of upgrading the circuit of a digital generator of a pseudo-random pulse sequence, which can be used to create cryptographic encryption algorithms. The need to modernize the digital generator circuit is associated with an increase in the number of pseudorandom pulse train sequences generated at its output and with pseudorandom intervals between them. To achieve this, a small number of additional elements are included in the circuit of a digital pseudorandom sequence of pulses based on a five-digit shift register with linear feedback. Based on the modernized circuit of a digital generator of a pseudorandom sequence of pulses and an active secondorder Slenlen-Key RC low-pass filter, a digital acoustic noise generator is constructed, which, unlike the prototype, has a truly random output signal over a period of ~ 4 * (2N - 1), subject to circuit simplicity.

Electronically Adjustable Capacitance Multiplier Circuit with a Single Voltage Differencing Gain Amplifier (VDGA)

In this work, we propose a resistorless realization of the simple capacitance multiplier circuit with electronically controllable using a single voltage differencing gain amplifier (VDGA) as an active building block. The circuit utilizes one VDGA and only one capacitor in a simple circuit configuration. The proposed capacitance multiplier circuit can be tuned electronically with the adjustment of the transconductance gains of the VDGA. To emphasis the workability of the proposed circuit, the second-order RC low-pass filter is constructed as an application example. PSPICE simulations are performed to verify the theory.

PERANCANGAN FILTER PASIF UNTUK MEREDAM HARMONISA YANG DI BANGKITKAN OLEH BEBAN LAMPU HEMAT ENERGI (LHE)

The load in the form of energy saving lamps has a harmonic loss generated. The harmonic effect generated is caused by the use of non-linear power electronic components, resulting in a current that is made into a distorted sinusiodal wave which results in the formation of waves at multiple multiples of the fundamental frequency. Based on the negative impact caused by the energy saving light, the filter was designed to reduce the THDi percentage generated by the energy saving light, by installing a low pass RC filter on the energy saving light.

A 9-Bit Resistor-Based Highly Digital Temperature Sensor With a SAR-Quantization Embedded Differential Low-Pass Filter in 65-nm CMOS With a 2.5-$\mu$ s Conversion Time

This paper presents a resistor-based area-compact temperature sensor for on-chip thermal detection. It has three unique features: 1) the use of a differential low-pass RC filter (DLPF) for thermal sensing, which reduces the area; 2) successive approximation register (SAR)-quantization embedded in the DLPF, which reuses the DLPF capacitor for capacitive digital-to-analog conversion (CDAC), eliminates the CDAC references, and utilizes the full sensing range for quantization; and 3) a highly digital circuit architecture, which can be easily implemented using a standard digital design flow and migrated to different processes. The temperature sensor was fabricated in a 65-nm CMOS technology occupying 8400- $ {\mu }\text{m}^{2}$ silicon area. It achieves 0.38 °C resolution at room temperature. After a two-point calibration, the sensor achieves a $3\sigma $ inaccuracy of ±1.2 °C from −30 °C to 100°C. It consumes 35.3- ${\mu }\text{W}$ power from a 1.1-V supply. With a 2.5- ${\mu }\text{s}$ conversion time, the sensor achieves an 88 pJ/conversion energy efficiency, which yields a 12.7-pJ $\cdot \text{K}^{2}$ resolution figure-of-merit (FoM).