A multi-port constrained optimization methodology is presented for the optimal placement of decoupling capacitors in power distribution networks (PDNs) of printed circuit boards (PCBs). The proposed method is based on barrier methods and can simultaneously handle multiple ball grid array (BGA) devices and capacitor ports on practical power/ground plane pairs of polygonal shapes without restriction in the problem geometry. Semi-analytical expressions are developed for the magnitude of device port impedance that is set as the objective function. The placement optimization problem including constraints of planar boundaries and impedance specifications is cast into a matrix expression that meets Karush–Kuhn Tucker (KKT) conditions and solved through Newton–Raphson (N–R) iterations. The convergence of iterations is ensured by guaranteeing the positive definiteness of the system matrix through the Levenberg–Marquardt algorithm. Mutual coupling among multiple ports and discrete components of the problem domain is accounted for via matrix calculus techniques applied to the partial derivatives of optimization variables. The derivatives are evaluated accurately exploiting the semi-analytical relations developed for the distributed planar impedance. The proposed method is tested with several examples, and the results are observed to be in good agreement with those obtained from a numerical electromagnetic (EM) simulator while yielding significant speed-up.
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