Random Telegraph Noise Amplitude Research Articles

Bias dependence in statistical random telegraph noise analysis based on nanoscale CMOS ring oscillators

Random Telegraph Noise (RTN) is one of the major reliability concerns in nanoscale complementary metal-oxide semiconductor (CMOS) technologies. In this paper, we discuss the characterization of RTN in 40 nm CMOS technology using Ring Oscillators (ROSCs). We used different types of ROSCs to study the temporal and spectral characteristics of the RTN. We conducted measurements on one of the arrays with 128 identical ROSC cells. These results enabled statistical characterization of the RTN amplitude strength and its frequency characteristics in different supply voltage variations from 0.5 V to 0.7 V. At power supply of 0.65 V, dominant and observable RTN amplitude above 0.37% Δf/fmean\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$\\Delta f/f_{\ ext{mean}}$$\\end{document} is found in 60% of cells in the array. Further, the capture and emission time constant τe//c\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$\ au_{e//c}$$\\end{document} can be extracted from the measurements, the values observed ranging from 0.2 μ\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$\\upmu$$\\end{document}s to 10 ms.

Low-frequency noise in quasi-ballistic monolithic Al–Ge–Al nanowire field effect transistors

In this work, Al2O3-passivated, monolithic, and crystalline Al–Ge–Al heterostructure nanowire field effect transistors (FETs) with Ge channel lengths ranging from 18 to 826 nm are analyzed from a low-frequency noise perspective. 1/f and random telegraph noise (RTN) are analyzed in an accumulation mode, where the hole channel is formed by applying a back-gate potential VG. The normalized power spectral density of drain current fluctuations of 1/f noise (SID/ID2) at medium currents follows nearly an 1/ID trend. 1/f noise is analyzed within both the mobility and carrier number fluctuation models (MFM and CNFM), respectively. Taking the MFM into account, the Hooge noise parameter α spreads in the interval of 1.5 × 10−4 to 4 × 10−2, with lower values for shorter devices. Using the same data and the CNFM, the density of interface states Dit in the Al2O3/GexOy/Ge system was estimated using the transconductance extracted from the quasi-static transfer I/V characteristics. The extracted Dit values range from 5 × 109 to 3 × 1012 cm−2 eV−1. Contact noise has also been observed in some devices at high currents. RTN analyzed in time domain exhibits a relative RTN amplitude in the 0.3%–20% range. Capture and emission time constants as a function of VG exhibit a typical behavior for metal oxide semiconductor FETs. The extracted noise parameters are comparable with Ge and III–V nanodevices of top-down and bottom-up technologies.

Investigation of Random Telegraph Noise Under Different Programmed Cell Vt Levels in Charge Trap Based 3D NAND Flash

As an important constraint on the threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> ) distribution, the random telegraph noise (RTN) has attracted much attention due to the widely used multi-bit-per-cell technology in 3D NAND flash. This work investigated the physical mechanisms of RTN in charge- trap-based 3D NAND flash. According to statistical 3D TCAD simulation analysis, the fringing field from the control gate and the random discrete nitride trapped charges, two competitive mechanisms, are proposed to be responsible for the non-monotonic RTN behavior. As the programmed cell V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> level increases, the increasing fringing field from the control gate reduces the current-path percolation effect and the RTN amplitude. However, once the random discrete nitride trapped charges start to dominate the percolation current path, the RTN amplitude increases significantly. Instructively, the clarification of RTN competitive mechanisms contributes to compacting V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> distributions specifically in multi-level 3D NAND flash.

Random Telegraph Noise of a 28-nm Cryogenic MOSFET in the Coulomb Blockade Regime

We observe rich phenomena of two-level random telegraph noise (RTN) from a commercial bulk 28-nm p-MOSFET (PMOS) near threshold at 14 K, where a Coulomb blockade (CB) hump arises from a quantum dot (QD) formed in the channel. Minimum RTN is observed at the CB hump where the high-current RTN level dramatically switches to the low-current level. The gate-voltage dependence of the RTN amplitude and power spectral density match well with the transconductance from the DC transfer curve in the CB hump region. Our work unequivocally captures these QD transport signatures in both current and noise, revealing quantum confinement effects in commercial short-channel PMOS even at 14 K, over 100 times higher than the typical dilution refrigerator temperatures of QD experiments (<100 mK). We envision that our reported RTN characteristics rooted from the QD and a defect trap would be more prominent for smaller technology nodes, where the quantum effect should be carefully examined in cryogenic CMOS circuit designs.

Amplitude of Random Telegraph Noise in Junctionless FinFET with Different Channel Shape

Amplitude of Random Telegraph Noise in Junctionless FinFET with Different Channel Shape

On the Accuracy in Modeling the Statistical Distribution of Random Telegraph Noise Amplitude

The power consumption of digital circuits is proportional to the square of operation voltage and the demand for low power circuits reduces the operation voltage towards the threshold of MOSFETs. A weak voltage signal makes circuits vulnerable to noise and the optimization of circuit design requires modelling noise. Random Telegraph Noise (RTN) is the dominant noise for modern CMOS technologies and Monte Carlo modelling has been used to assess its impact on circuits. This requires statistical distributions of RTN amplitude and three different distributions were proposed by early works: Lognormal, Exponential, and Gumbel distributions. They give substantially different RTN predictions and agreement has not been reached on which distribution should be used, calling the modelling accuracy into questions. The objective of this work is to assess the accuracy of these three distributions and to explore other distributions for better accuracy. A novel criterion has been proposed for selecting distributions, which requires a monotonic reduction of modelling errors with increasing number of traps. The three existing distributions do not meet this criterion and thirteen other distributions are explored. It is found that the Generalized Extreme Value (GEV) distribution has the lowest error and meet the new criterion. Moreover, to reduce modelling errors, early works used bimodal Lognormal and Exponential distributions, which have more fitting parameters. Their errors, however, are still higher than those of the monomodal GEV distribution. GEV has a long distribution tail and predicts substantially worse RTN impact. The work highlights the uncertainty in predicting the RTN distribution tail by different statistical models.

Contribution to the Physical Modelling of Single Charged Defects Causing the Random Telegraph Noise in Junctionless FinFET

In this paper, different physical models of single trap defects are considered, which are localized in the oxide layer or at the oxide–semiconductor interface of field effect transistors. The influence of these defects with different sizes and shapes on the amplitude of the random telegraph noise (RTN) in Junctionless Fin Field Effect Transistor (FinFET) is modelled and simulated. The RTN amplitude dependence on the number of single charges trapped in a single defect is modelled and simulated too. It is found out that the RTN amplitude in the Junctionless FinFET does not depend on the shape, nor on the size of the single defect area. However, the RTN amplitude in the subthreshold region does considerably depend on the number of single charges trapped in the defect.

The Influence of a Single Charged Interface Trap on the Subthreshold Drain Current in FinFETs with Different Fin Shapes

The influence of the channel shape in a finned (vertical) field-effect transistor (FinFET) on the amplitude of random telegraph noise (RTN) induced by single interface trapped charge has been simulated for the transistors with rectangular and trapezoidal fin cross sections. It is established that, in a subthreshold region of gate voltages, a single charge trapped at the fin top induces RTN of lower amplitude in the case of a trapezoidal cross sections as compared to that in a transistor with rectangular cross sections. However, a single charge built in the middle of the fin side wall induces RTN of significantly higher amplitude in case of the fin with trapezoidal cross section.

Effects of a dual spacer on electrical characteristics and random telegraph noise of gate-all-around silicon nanowire p-type metal–oxide–semiconductor field-effect transistors

Using a dual spacer consisting of 50% SiO2 and 50% HfO2, the ratio of the on-state current/the off-state current in the order of 106 is achieved for the explored devices. Based on the experimentally validated simulation, the result indicates that the variation of gate-capacitance is significant owing to the sizeable parasitic capacitance resulting from the spacer. The role of the spacer acts as the parallel plate capacitor, the amount of gate capacitance will be increased largely with the HfO2 due to its high parasitic capacitance. For the devices without any spacers, induced by a donor-type single charge trap (SCT), the statistically calculated highest amplitude of random telegraph noise (RTN) is 2.32%. It occurs when the SCT locates in the middle of the channel due to the high occurrence of capture and emission for SCT under low gate voltage. Notably, for devices with considerable spacers, the RTN can be significantly suppressed (≤1%).

The Influence of Fin Shape on the Amplitude of Random Telegraph Noise in the Subthreshold Regime of a Junctionless FinFET

The dependence of random telegraph noise (RTN) amplitude on the gate overdrive in a junctionless field-effect transistor (FinFET) with rectangular and trapezoidal channel (fin) cross sections manufactured using silicon-on-insulator technology has been numerically simulated. It is established that the RTN amplitude in the subthreshold region of gate voltages for a FinFET with a trapezoidal cross section of channel is significantly lower than that for the transistor with rectangular cross section of a channel. In addition, under the same conditions, the RTN amplitude at the threshold gate voltage in a junctionless FinFET is significantly lower than that in planar fully depleted and in usual FinFET.

RTN in GexSe1-x OTS selector devices

Random telegraph noise (RTN) signals in GexSe1-x ovonic threshold switching (OTS) selector have been analysed in this work, both before and after the first-fire (FF) operation and at on- and off-states. It is observed that RTN appears after the FF, and its absolute amplitude at the off-state is small and negligible in comparison with the RTN signals in RRAM devices. At the on-state, large RTN signals are observed, which can either partially or fully block the conduction path, supporting that a conductive filament is formed or activated by FF and then modulated during switching. Statistical analysis reveals that the relative RTN amplitude at on-state in GexSe1-x OTS selector is smaller than or equivalent to those in RRAM devices.

Origin of Low-Frequency Noise in Triple-Gate Junctionless n-MOSFETs

The low-frequency noise in triple-gate junctionless n-MOSFETs, with channel lengths varying from 95 to 25 nm and operating in the bulk and accumulation modes, is investigated by measurements in the frequency and time domains. The experimental drain current noise spectra present $1/{f}$ and Lorentzian-type behavior components. The noise spectra in the time domain reveal that the Lorentzian-type behavior components are due to the capture and emission processes of carriers at discrete gate insulator traps, resulting in random telegraph noise (RTN). The $1/{f}$ behavior can be described by the carrier number with the correlated mobility fluctuations model. In the below-threshold region, the conducting channel is isolated from the interface by depletion region. In the above-threshold region (bulk conduction mode), the histograms of the time-domain data show multilevel switching events, from which one or more individual traps can be distinguished. The extracted time constants of two-level RTN signals indicate the interaction of a single trap either with the channel or with both channel and gate. The relative RTN amplitude is described with the carrier number with the mobility correlated fluctuations physics-based model or with the “hole in the inversion layer” stochastic simulation-based model, enabling estimation of the flat-band voltage fluctuation caused by the RTN.

Impact of RTN on Pattern Recognition Accuracy of RRAM-Based Synaptic Neural Network

Resistive switching memory devices can be categorized into either filamentary or non-filamentary ones depending on the switching mechanisms. Both types have been investigated as novel synaptic devices in hardware neural networks, but there is a lack of comparative study between them, especially in random telegraph noise (RTN) which could induce large resistance fluctuations. In this letter, we analyze the amplitude and occurrence rate of RTN in both Ta2O5 filamentary and TiO2/a-Si (a-VMCO) non-filamentary resistive switching memory (RRAM) devices and evaluate its impact on the pattern recognition accuracy of neural networks. It is revealed that the non-filamentary RRAM has a tighter RTN amplitude distribution and much lower RTN occurrence rate than its filamentary counterpart, which leads to negligible RTN impact on recognition accuracy, making it a promising candidate in synaptic application.

Effect of drain current on appearance probability and amplitude of random telegraph noise in low-noise CMOS image sensors

Random telegraph noise (RTN), which occurs in in-pixel source follower (SF) transistors, has become one of the most critical problems in high-sensitivity CMOS image sensors (CIS) because it is a limiting factor of dark random noise. In this paper, the behaviors of RTN toward changes in SF drain current conditions were analyzed using a low-noise array test circuit measurement system with a floor noise of 35 µVrms. In addition to statistical analysis by measuring a large number of transistors (18048 transistors), we also analyzed the behaviors of RTN parameters such as amplitude and time constants in the individual transistors. It is demonstrated that the appearance probability of RTN becomes small under a small drain current condition, although large-amplitude RTN tends to appear in a very small number of cells.

Investigation of Preexisting and Generated Defects in Nonfilamentary a-Si/TiO2 RRAM and Their Impacts on RTN Amplitude Distribution

An extensive investigation of the preexisting and generated defects in amorphous-Si/TiO2-based nonfilamentary a-vacancy modulated conductive oxide RRAM devices has been carried out in this paper to identify the switching and degradation mechanisms, through a combination of random-telegraph-noise (RTN) and constant-voltage-stress analysis. The amplitude of RTN, which leads to read instability, is also evaluated statistically at different stages of cell degradation and correlated with different defects, for the first time. It is found that the switching between low and high resistance states are correlated with the profile modulation of preexisting defects in the “defect-less” region near the a-Si/TiO2 interface. The RTN amplitude observed at this stage is small and has a tight distribution. At longer stress times, a percolation path is formed due to defects generation, which introduces larger RTN amplitude and a significant tail in its distribution.

Log-Normal Statistics in Filamentary RRAM Devices and Related Systems

We present a phenomenological theory of the log-normal statistics commonly observed in filamentary resistive memory and related devices. Based on the central limit theorem that statistics are shown to emerge regardless of the underlying material properties when the processes are dominated by thermal activation or tunneling. That takes place in particular for the read-out resistances in the high-resistive (OFF) state, and the random telegraph noise amplitudes, but can be observed in the low-resistive (ON) state as well. We show that the statistics of switching times becomes log-normal when the switching is due to the field induced nucleation.

New Understanding of Random Telegraph Noise Amplitude in Tunnel FETs

As one of the important sources of lowfrequency noise, random telegraph noise (RTN) in tunnel FET (TFET) has attracted growing attention recently. However, there is still lack of explanation for the high-amplitude RTN, which may cause serious variability and reliability problems to TFET-based ultralow-power circuits. In this paper, we experimentally investigate the RTN amplitude characteristics in TFETs, revealing the mechanism of highamplitude RTN. It is found that the nonuniform distribution of band-to-band tunneling (BTBT) generation rate along device width direction is responsible for the high-amplitude RTN. Locations with relatively higher BTBT generation rate may act as critical paths dominating the device current. “Lucky” trap located at a critical path can induce the high-amplitude RTN. With device width shrinking, the number of critical paths may be reduced, resulting in much higher maximum RTN amplitude. In addition, the impacts of process parameters on RTN amplitude are discussed. Both higher source doping concentration (N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</sub> ) and higher thermal budget can effectively mitigate the nonuniformity of BTBT generation rate along device width direction, causing suppressed RTN amplitudes. Considering that the higher thermal budget may lead to degraded device performance, the annealing process should compromisingly be designed in terms of both variation and device performance.

Statistical Analysis and Modeling of Random Telegraph Noise Based on Gate Delay Measurement

We propose a characterization methodology for random telegraph noise (RTN) based on gate delay measurement. To convert delay change to MOSFET threshold voltage fluctuation, $ {\Delta V_{T}}$ , a topology-reconfigurable ring oscillator is utilized. We discuss the issue of detecting RTN-induced discrete fluctuations in the delay and develop a kernel density-based method to detect the fluctuations. Characterization results of several RTN properties from a test chip fabricated in a 65 nm bulk process are presented. Particular focus is given on the suitable distribution to present RTN-induced overall $ {\Delta V_{T}}$ distribution and its gate area dependency. The results show that lognormal distribution is better at representing the total $ {\Delta V_{T}}$ distribution. RTN-induced delay fluctuation of 40% has been observed for a single gate under weak inversion operation. Local process variation and RTN amplitude are found to be uncorrelated. The proposed methodology is thus suitable for characterizing RTN of devices operating under switching condition.

Random telegraph noise on the threshold voltage of multi-level flash memory☆☆Project supported by the National Research Program of China (Grant No. 2016YFB0400402), the Natural Science Foundation of Jiangsu Province, China (Grant No. BK20141321), and the National Natural Science Foundation of China (Grant No. 61627804).

We investigate the impact of random telegraph noise (RTN) on the threshold voltage of multi-level NOR flash memory. It is found that the threshold voltage variation () and the distribution due to RTN increase with the programmed level () of flash cells. The gate voltage dependence of RTN amplitude and the variability of RTN time constants suggest that the large RTN amplitude and distribution at the high program level is attributed to the charge trapping in the tunneling oxide layer induced by the high programming voltages. A three-dimensional TCAD simulation based on a percolation path model further reveals the contribution of those trapped charges to the threshold voltage variation and distribution in flash memory.

Poly-Silicon Trap Position and Pass Voltage Effects on RTN Amplitude in a Vertical NAND Flash Cell String

We investigate the dependence of random telegraph noise (RTN) on a poly-silicon trap position in a 3D vertical channel and charge-trapping NAND flash cell string. We characterize RTN in read current of each cell of a string at different read and pass voltages. RTN characteristics resulting from a trap in a read cell or in a pass cell are differentiated. A method to identify a poly-silicon trap position in a NAND string is proposed. We perform the 3D TCAD simulation to calculate channel electron density in a string. Measured RTN characteristics can be explained by current-path percolation and channel carrier screening effects. The distribution of RTN amplitudes in NAND strings is characterized.