Quasi-switched-capacitor Research Articles

An Isolated Phase-Shift-Controlled Quasi-Switched-Capacitor DC/DC Converter With Gallium Nitride Devices

This paper presents the circuit analysis and design guidelines of an isolated voltage-fed phase-shift-controlled quasi-switched-capacitor (QSC) dc/dc circuit. The circuit under study is friendly toward the adoption of gallium nitride (GaN) devices by reducing the voltage stress on the devices and mitigating the circulating energy in the circuit. Compared to the conventional half- and full-bridge-based circuits, the phase-shift-controlled QSC circuit can reduce the voltage stress of high-voltage-side devices to 2/3 of the dc bus voltage. The reduced voltage stress can greatly extend the short-circuit withstand time of GaN devices and, thus, improve the reliability of the overall circuit. In a manner similar to a dual-active-bridge circuit, the circuit under study has low circulating energy since it achieves soft switching operation merely with the energy stored in the transformer’s leakage inductance. In this paper, the operation principle, soft switching analysis, and design guidelines of the circuit are presented. A 1-kW, 400–48-V, 500-kHz switching frequency prototype with GaN devices was built and tested to verify the circuit analysis.

A Family of Quasi Switched Capacitor (QSC) Circuit for Half Bridge DC–DC Converter for Energy Storage Applications

This paper presents an efficient bidirectional Half Bridge Dc-Dc converter in combination with Quasi Switched capacitor converter for low power applications. Dc source and a battery are used as input sources for this converter and it utilizes transformer to isolate half bridge and quasi switched converter. Hence half bridge is connected on primary side and QSC is connected on secondary side of transformer. Compared to general SMPS Half bridge circuit, QSC Half Bridge has good efficiency, low switching stress, soft switching is obtained. A 200W bidirectional half bridge circuit is modeled and simulations are done in MATLAB and obtained results are verified with theoretical calculations.

A Quasi-Switched-Capacitor Resonant Converter

A quasi-switched-capacitor (QSC) resonant converter is proposed for isolated dc/dc conversion in offline power supply application. Similar to the Φ2 resonant converter, the proposed converter is operated most efficiently at fixed switching frequency and duty ratio, and it features trapezoidal voltage waveforms on all switches. Full soft switching combining ZCS, ZVS on and off is achieved within a wide load range, and, therefore, the switching loss is minimized. In addition, compared to half/full-bridge converters (e.g., the LLC resonant converter and the dual-active-bridge converter), the proposed converter reduces the voltage stress on primary-side switches to 2/3 of the input voltage, and, thus, enables more choices of low-voltage devices, which are more efficient because of better figure of merit. Furthermore, the proposed converter reduces the transformer turns ratio by 2/3, and, thus, enables less number of turns of the winding, lower winding loss, and lower transformer leakage inductance, making it suitable for high-frequency operation. A 90-W 88-V/19-V 700-kHz prototype is built with 100-V eGaN FETs. The transformer design and PCB layout are presented to minimize the transformer leakage inductance and stray inductance. The prototype achieved a power density of 172 W/in3, and a flat efficiency curve with a peak value of 96%.

A Wide Bandgap Device-Based Isolated Quasi-Switched-Capacitor DC/DC Converter

This paper proposes an isolated quasi-switched-capacitor (QSC) dc/dc converter to serve as an auxiliary power supply in electric and hybrid electric vehicles, managing a bidirectional power flow between the high-voltage (HV) battery and the low-voltage dc bus. A QSC dc/ac circuit with a 3:1 voltage step-down ratio is proposed to serve as the front-stage circuit of the converter. Based on it, an isolated QSC dc/dc converter is proposed with a synchronous-rectifier, current-doubler post-stage circuit. Compared with existing full-bridge, half-bridge, and three-level converters, the features of the proposed converter include: 1) the voltage stresses on HV-side switches are reduced to two-third of the HV-dc-bus voltage; 2) the voltage stress on transformer is reduced to one-third of the HV-dc-bus voltage; 3) the transformer turns ratio is reduced; 4) it has soft-switching capability and high efficiency; and 5) bidirectional power-flow and simple control can be implemented. The operation principles, soft-switching analysis, and simulation results are presented. Wide Bandgap devices are selected for the proposed converter to shrink the size of passive components, provide high efficiency, and decrease the cooling requirement. Guidelines are given to estimate the key circuit parameters, including the capacitance of the switched capacitors, the transformer dc-bias flux density, and the average currents of the post-stage inductors. Experiment results provided from a 1-kW prototype built with SiC MOSFETs on the HV-side validate the feasibility and superior performance of the proposed converter.

Design and Analysis of Power-CMOS-Gate-Based Switched-Capacitor Boost DC–AC Inverter

A multistage power CMOS-transmission-gate-based (CMOS-TG) quasi-switched-capacitor (QSC) boost DC-AC inverter is proposed and integrated with a boost DC-DC converter for a step-up application with AC or DC load. In this paper, using CMOS-TG as a bidirectional switch, the various topologies can be integrated in the same configuration for achieving two functions: boosting and alternating; boosting for getting a sinusoidal output in which the peak is the result of a many times step-up of the input; alternating to realize the positive/negative half sinusoidal of the output. The inverter does not require any inductive elements as inductor and transformer, so integrated circuit (IC) fabrication will be promising for realization. By using the state-space averaging technique, the large-signal state-space model of the inverter is proposed, and then both the static analysis and dynamic small-signal analysis are derived to form a unified formulation for inverter/converter. Based on this formulation, there are presented for theoretical analysis/control design, including steady-state power, conversion efficiency, voltage conversion ratio, output ripple percentage, capacitance selection, closed-loop control and stability, and total harmonic distortion (THD), etc. Finally, a six-stage QSC boost DC-AC inverter is simulated by PSPICE, and the simulations are discussed for some cases, including: 1) steady-state AC output, ripple percentage, and power efficiency; 2) transient response of the regulated inverter for load variation; 3) a practical capacitive load: electromagnetic luminescent (EL) lamp, and 4) efficiency, ripple percentage, and THD for different loads. The results are illustrated to show the efficacy of the proposed inverter.

Design and analysis of power‐CMOS‐gate‐based switched‐capacitor DC–DC converter with step‐down and step‐up modes

AbstractA unified multi‐stage power‐CMOS‐transmission‐gate‐based quasi‐switched‐capacitor (QSC) DC–DC converter is proposed to integrate both step‐down and step‐up modes all in one circuit configuration for low‐power applications. In this paper, by using power‐CMOS‐transmission‐gate as a bi‐directional switch, the various topologies for step‐down and step‐up modes can be integrated in the same circuit configuration, and the configuration does not require any inductive elements, so the IC fabrication is promising for realization. In addition, both large‐signal state‐space equation and small‐signal transfer function are derived by state‐space averaging technique, and expressed all in one unified formulation for both modes. Based on the unified model, it is all presented for control design and theoretical analysis, including steady‐state output and power, power efficiency, maximum voltage conversion ratio, maximum power efficiency, maximum output power, output voltage ripple percentage, capacitance selection, closed‐loop control and stability, etc. Finally, a multi‐stage QSC DC–DC converter with step‐down and step‐up modes is made in circuit layout by PSPICE tool, and some topics are discussed, including (1) voltage conversion, output ripple percentage, and power efficiency, (2) output robustness against source noises and (3) regulation capability of converter with loading variation. The simulated results are illustrated to show the efficacy of the unified configuration proposed. Copyright © 2003 John Wiley & Sons, Ltd.