Pure Software Simulation Research Articles

Dynamic Simulation of a Warship Control Valve Based on a Mechanical-Electric-Fluid Cosimulation Model

Control valves have an important function in the warship power system. In engineering practice, the fluid oscillation inside the control valve causes the additional load to the valve actuator. When the additional load is added to the original load of the valve, it is possible that the required driving force (or driving moment) of the valve is greater than the maximum force (or moment) output by the actuator, which may cause the abnormal stop of the actuator. Conventionally, the interaction effect of the valve mechanical and electric components on the valve chamber’s flow field cannot be considered in computational fluid dynamics (CFD) simulations, so the oscillating fluid loads cannot be accurately obtained. In order to solve this problem, the mechanical-electric-fluid integrated valve model, using the FLUENT and AMESim cosimulation method, was developed to embody the interaction effect between the components of each part of the control valve and exhibit the fluid oscillation during the operating process of the control valve. Compared with the pure software simulations, the unsteady flow characteristics and dynamic response of the actuator were synchronously obtained in this study, which accurately captured the sudden fluid loads required for further compensation. At the same time, the differences in performance of different valve plugs were compared. The stability time of the valve plug and oscillation amplitude of the unstable fluid loads were distinct for control valves with different flow characteristics. The results can aid in understanding the instability mechanism of the fluid load in the control valve better, which provides the calculation basis for compensating the additional load on the valve plug and improve the reliability of the control valve.

SystemC hardware in the loop simulation scheme

SystemC is the standard in the field of virtual modeling. With the continuous expansion of semiconductor industry, test verification is a very important part in the whole process of semiconductor. Our research is based on the standard SystemC platform, which is very helpful for the early planning and architecture modeling of SOC architecture, as well as for the later regression testing and upper software development testing. SystemC is a pure software solution, but with more and more customized customer needs, we need semi physical simulation. The so-called hardware in the loop simulation is the integration of software and hardware in a platform for simulation. For example, in the previous pure software simulation tests, all of them are virtual, and the simulation engine is implemented by pure software. It has nothing to do with real world time. There are also real device tests. All devices are pure hardware. If a problem is found, it may affect the overall results. The cost of building hardware again is too high. Therefore, the requirement of hardware in the loop simulation is put forward.

The Optimal Control of Fuel Consumption for a Heavy-Duty Motorcycle with Three Power Sources Using Hardware-in-the-Loop Simulation

This study presents a simulation platform for a hybrid electric motorcycle with an engine, a driving motor, and an integrated starter generator (ISG) as three power sources. This platform also consists of the driving cycle, driver, lithium-ion battery, continuously variable transmission (CVT), motorcycle dynamics, and energy management system models. Two Arduino DUE microcontrollers integrated with the required circuit to process analog-to-digital signal conversion for input and output are utilized to carry out a hardware-in-the-loop (HIL) simulation. A driving cycle called worldwide motorcycle test cycle (WMTC) is used for evaluating the performance characteristics and response relationship among subsystems. Control strategies called rule-based control (RBC) and equivalent consumption minimization strategy (ECMS) are simulated and compared with the purely engine-driven operation. The results show that the improvement percentages for equivalent fuel consumption and energy consumption for RBC and ECMS using the pure software simulation were 17.74%/18.50% and 42.77%/44.22% respectively, while those with HIL were 18.16%/18.82% and 42.73%/44.10%, respectively.

A real-time gas turbine simulation model for control logic evaluation

During our development of a gas turbine control system, we need to evaluate the correctness and completeness of the control logic before conducting a hardware-in-the-loop (HIL) test. For this purpose, a pure software simulation framework which includes virtual DPU (VDPU) and gas turbine model interfacing through OPC protocol was proposed. A real-time gas turbine simulation model for this framework was developed. This gas turbine model was written in C++ and employs the object-oriented philosophy for maintenance and further development and it uses a non-iterative method to ensure the real-time capability to run simultaneously with the control logic. From the result of preliminary tests on this model, it shows to be able to simulate the response of real gas turbine to the instructions from the control system and suitable to evaluate the control logic.

Enhancing power quality in electrical distribution systems using a smart charging architecture

The electrification of the mobility sector comes with multiple challenges such as the lack of information on when, where, how long and how fast charging processes of electric vehicles will take place. In order to keep up with increasing power demand of charging processes, besides better predictions also the active control of charging processes will be necessary to minimize infrastructure costs. This work deals with a real-time mechanism for supporting the Power Quality (PQ) in electric distribution grids in terms of congestion and voltage management. In the paper, we propose a distributed smart charging approach that considers real-time conditions of the distribution grid provided by an event-driven architecture that collects data from different points in the grid. Our approach adopts the traffic light model, which allows smooth changing of the charging power to avoid drastic changes of the grid state. In order to be ready for real-world application, the algorithm is validated by a series of experiments on two setups: Pure software (co-)simulation and Power Hardware In the Loop (PHIL) where physical charging stations and electric cars are controlled in a laboratory setup.

Emulation of an Electric Naval Propulsion System Based on a Multiphase Machine Under Healthy and Faulty Operating Conditions

The main objective of this paper is the design of an Electric Naval Propulsion System (ENPS) emulator based on a low power multiphase machine. The whole drive system (control, power electronics, and electric machine) is tested and the mechanical part is emulated based on a Hardware-in-the-Loop principle. First, the modeling of all system components including mechanical and electrical parts are reviewed, and the total hull resistance forces are also developed. Then, a pure software simulation of the ENPS is carried out. After that, the designed emulator architecture is presented, and for adaption purpose, a scaling factor is introduced. The developed emulation tool allows to validate optimal control strategies for the propulsion system under a realistic navigation cycle under healthy and faulty operating conditions. Finally, simulation and experimental results are compared to investigate the accuracy and the performance of the developed emulator, and the effectiveness of the proposed control strategies.

Hardware-accelerated design space exploration framework for communication systems

The efficient hardware implementation of signal processing algorithms requires a rigid characterization of the interdependencies between system parameters and hardware costs. Pure software simulation of bit-true implementations of algorithms with high computational complexity is prohibitive because of the excessive runtime. Therefore, we present a field-programmable gate array (FPGA) based hybrid hardware-in-the-loop design space exploration (DSE) framework combining high-level tools (e.g. MATLAB, C++) with a System-on-Chip (SoC) template mapped on FPGA-based emulation systems. This combination significantly accelerates the design process and characterization of highly optimized hardware modules. Furthermore, the approach helps to quantify the interdependencies between system parameters and hardware costs. The achievable emulation speedup using bit-true hardware modules is a key enabling the optimization of complex signal processing systems using Monte Carlo approaches which are infeasible for pure software simulation due to the large required stimuli sets. The framework supports a divide-and-conquer approach through a flexible partitioning of complex algorithms across the system resources on different layers of abstraction. This facilitates to efficiently split the design process among different teams. The presented framework comprises a generic state of the art SoC infrastructure template, a transparent communication layer including MATLAB and hardware interfaces, module wrappers and DSE facilities. The hardware template is synthesizable for a variety of FPGA-based platforms. Implementation and DSE results for two case studies from the different application fields of synthetic aperture radar image processing and interference alignment in communication systems are presented.

Interface and Stability Issues for SISO and MIMO Power Hardware in the Loop Simulation of Distribution Networks with Photovoltaic Generation

The Power Hardware-in-the-Loop (PHIL) simulation can be used to determine the dynamic behaviour of renewable energy sources feeding into a grid before deployment. This article shows the necessary prerequisites for achieving stability of the simulation. It enlarges the range of SISO interfaces and introduces the MIMO PHIL simulation and the associated interfaces. A use case is shown with two photovoltaic inverters feeding into a low voltage distribution grid. In a lot of applications stability of the simulation can be judged beforehand by use of analytic concepts and a pure software simulation. This opens the way for a broad range of application for Power Hardware-in-the-Loop simulation studying the interaction component-grid-component.

Hardware-in-the-loop for power level estimation of planetary rovers

A framework of a Hardware-In-the-Loop (HIL) simulation for power level estimation of planetary rovers is presented. Planetary rovers are completely autonomous, giving the ability to their designers to estimate power levels through software simulation crucial in determining daily tasks. HIL simulations can further the benefits by allowing designers to incorporate hardware components within traditionally pure software simulations. A test bench consisting of power system components on a rover is designed. Software component models are developed within MapleSim and imported within LabView for real-time simulations. Power levels are estimated using this technique and it was shown that hardware within the simulation loop facilitates more accurate results and can be performed at an early stage, before full system testing is available. Since the test bench was designed for complete modularity and the rover powertrain model is similar to that of electric vehicles, the presented framework can be easily adapted for electric vehicle applications.

Simulation Infrastructure for Autonomous Vision-Based Navigation Technologies

AbstractVision-based navigation technologies are currently under development in order to support future planetary exploration missions to the Moon, Mars and small bodies. By tracking landmarks and local features on the surface of celestial bodies, these technologies will provide GPS-like spacecraft localization capabilities and enable precision orbiting and/or landing toward known targets of interest. In order to contribute to the development roadmap of these technologies, this paper will present the Simulation Infrastructure for Autonomous Navigation technologies (SIAN) aiming at simulating with hardware-in-the-loop and high repeatability vision-based terrain relative navigation algorithms. This scaled simulation infrastructure aims at bridging the gap between pure software simulations and expensive helicopter or rocket-based flight tests. This paper will present the main objectives of this innovative and unique simulation infrastructure and report its conceptual and detailed design.

Virtual vehicle system development and its application for ABS design based on distributed network

In this paper, we explore a novel method for building a virtual vehicle system, integrating pure software simulation and Hardware In Loop (HIL) simulation, which is constructed based on a distributed network of Controller Area Network (CAN) and TCP/IP. Firstly, the dynamic vehicle model is developed in the platform of software simulation, used to design and verify the response of ABS control logic. Secondly, in the HIL simulation the model equations are converted to a stand-alone program of C++ on main computer and integrated with ABS controller, real vehicle devices and components, generate a real vehicle environment based on CAN bus to verify the control performance of ABS in real time. Database, graphic and data processing systems are integrated by cross-platform programming technology on assistant computer connected by ethernet. The analysis and validation of developed control logic for ABS can be performed successfully on this platform.

An open platform for developing multiprocessor SoCs

Nanometer technologies integrate hundreds of millions of transistors in a single chip. Opportunities provided by these technologies, combined with the consolidation of platform-based design approaches, the evolution toward multiprocessor architectures, and consideration of the network-on-chip (NoC) paradigm suggest new methods for designing and verifying embedded systems. Clearly, a pure software simulation platform can't provide the performance required for developing multiprocessor system-on-chip (MPSoC) designs. One of the main design risks for today's systems is the architecture, which developers must validate as early as possible in the overall system design cycle because it has the biggest impact on system dimensioning and performance. To solve these problems, we've studied a reconfigurable MPSoC emulation platform and developed the main emulation subsystem and board. A low-cost modular approach that uses emulation offers an alternative to software simulation for the design and verification of complex multiprocessor system-on-chip (MPSoC) designs.