Punch-through Diodes Research Articles

On-Chip Gate Electrostatic Discharge Protection Design for 900 V Power Metal Oxide Semiconductor Field Effect Transistor Using Punch-Through Diode Without Degrading Switching Loss.

In order to protect the gate oxide from electrostatic discharge (ESD) in power MOSFET, the on-chip ESD protection circuits are required. Zener diode on poly silicon gate was normally used in power device because Zener diode structure was easy to merge with conditions of vertical structure without adding electrode. However, merged Zener diode can make unnecessary gate capacitance, and then switching characteristics are degraded by added capacitance. In this paper, a stacked punch-through diode (PT diode) with lower capacitance than Zener diode was designed for 900 V power MOSFET. The PT diode was consisted on doped polysilicon gate between the gate pad and the source pad. The electrical characteristics of this device was designed and analyzed by TCAD simulation and experiments. On the basis of this analysis, the stacked PT diode for ESD protection was optimized and compared with conventional Zener diode.

Enhancement of the performance of GaN IMPATT diodes by negative differential mobility

A theoretical analysis of high-efficiency punch-through operation GaN-based terahertz IMPATT diodes has been carried out in this paper. It is shown that the negative differential mobility (NDM) characteristics of GaN coupled with the space charge effect acting as a self-feedback system can markedly increase the drift velocity of injection carriers, and thereby enhance diode performance under appropriate external RF voltage. The behavior of traveling electrons in the transit zone is investigated in detail. It is found that the IMPATT diode with a punch-through structure operating in the NDM mode exhibits superior characteristics compared with the equivalent diode operating in the Si-like constant mobility mode. In particular, the NDM-mode diode can tolerate a larger RF voltage swing than that operating in constant mobility mode. Numerical simulation results reveal that the highest efficiency of 26.6% and maximum RF power of 2.29 W can be achieved for the NDM-mode diode at a frequency of 225 GHz. A highest efficiency of 19.0% and maximum RF power of 1.58 W are obtained for the diode with constant mobility.

Novel Punch-through Diode Triggered SCR for Low Voltage ESD Protection Applications

This research presented the concept of employing the punch-through diode triggered SCRs (PTTSCR) for low voltage ESD applications such as transient voltage suppression (TVS) devices. In order to demonstrate the better electrical properties, various traditional ESD protection devices, including a silicon controlled rectifier (SCR) and Zener diode, were simulated and analyzed by using the TCAD simulation software. The simulation result demonstrates that the novel PTTSCR device has better performance in responding to ESD properties, including DC dynamic resistance and capacitance, compared to SCR and Zener diode. Furthermore, the proposed PTTSCR device has a low reverse leakage current that is below 10<SUP>-12</SUP> A, a low capacitance of 0.07 fF/㎛², and low triggering voltage of 8.5 V at 5.6×10<SUP>-5</SUP> A. The typical properties couple with the holding voltage of 4.8 V, while the novel PTTSCR device is compatible for protecting the low voltage, high speed ESD protection applications. It proves to be good candidates as ultra-low capacitance TVS devices.

On Pairing of Bipolar RRAM Memory With NPN Selector Based on Set/Reset Array Power Considerations

In this paper, we present a methodology of choosing an NPN selector (1S) for a given memory element (1M) to form a cross point (consisting of the memory element in series with the selector-1S1M) based on the overall array power efficiency requirements. This methodology is based on extensive TCAD simulations that show excellent match with our experimentally demonstrated n+/p/n+ epitaxial Si punch-through diode as selector (NPN selector) for symmetric bipolar resistive RAM. Using a TCAD validated circuit model of the NPN selector, we derive an equivalent circuit model for the cross point. For an exemplary selector design, our model suggests that the power P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">xp</sub> dissipated in the cross point during set operation obeys the relationship P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">xp</sub> ∝ V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">set</sub> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.5</sup> I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">set</sub> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1.25</sup> , even though the power dissipated in the memory element P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">memory</sub> is V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">set</sub> I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">set</sub> . This shows that lowering the set current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">set</sub> of the memory element leads to a larger reduction in array power than lowering the set voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">set</sub> .

Punchthrough-Diode-Based Bipolar RRAM Selector by Si Epitaxy

We propose an epitaxial punchthrough diode for bipolar resistance RAM (RRAM) selector application. Epitaxial Si:C process is used to deposit n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> /p/n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> layers which are fabricated into 300-nm-diameter vertical punchthrough diodes. High on-current density of >; 1 MA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and high on/off current ratio of >; 250 and >; 4700 (at opposite polarities) are observed. A switching speed of <; 10 ns is measured. On-voltage designability is demonstrated by tuning the p-region doping and length. The comparison of experimental IV with Sentaurus TCAD-simulated IV characteristics confirms the punchthrough mechanism. Comparison with other bipolar RRAM selector technologies highlights the overall advantages of punchthrough-based selector.

Electric field unbalance for robust floating ring termination

The electric field balancing in the guard-ring edge termination structure of 600V class Super-Junction devices is studied. The relation of the lateral electric field across the racetrack structure and the robustness of the structure against avalanche currents is investigated through experimental data and TCAD simulations. It has been found that the electrical field must be substantially imbalanced to achieve good ruggedness. The effect of the P-ring dose on the electrical performances of punch-through PiN diodes is also investigated.

High breakdown field of pnp GaN/InGaN/AlGaN DHBTs with AlGaN collector

We have investigated the characteristics of pnp GaN/InGaN/(Al)GaN double heterojunction bipolar transistors (DHBTs) grown by metalorganic vapour phase epitaxy. In GaN-collector DHBTs, the collector–base breakdown voltage under the open-emitter condition increased with increasing collector thickness. By fitting the experimental results to the theoretical model of the punch-through diode, we obtained the breakdown field of 3.1 MV/cm and the residual carrier concentration of 8.5 × 1016 cm–3 for the GaN collector layer. On the other hand, in a 500 nm thick AlGaN collector, the breakdown voltage was 190 V. Assuming that the bias was uniformly applied in the AlGaN collector, the corresponding breakdown field was calculated to be 3.8 MV/cm. The results indicate that the use of an AlGaN collector in HBTs is a promising way to increase the breakdown voltage without increasing the collector thickness. (© 2007 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

양성자 주입기술을 이용한 PT형 전력다이오드의 스위칭 특성 향상

Lifetime control technique by proton implantation has become an useful tool for production of modern power devices. In this work, punch-through type diodes were irradiated with protons for the high speed power diode fabrication. Proton irradiation which was capable of controlling carrier`s lifetime locally was carried out at the various energy and dose conditions. Characterization of the device was performed by current-voltage, capacitance-voltage and reverse recovery time measurement. We obtained enhanced reverse recovery time characteristics which was about of original device reverse recovery time and about of electron irradiated device reverse recovery time. The measurement results showed that proton irradiation technique was able to effectively reduce minority carrier lifetime without degrading the other characteristics.

Lateral punch-through TVS devices for on-chip protection in low-voltage applications

A novel lateral punch-through TVS (Transient Voltage Suppressor) structure addressed to on-chip protection in very low voltage applications is reported in this paper. Different lateral TVS structures have been studied in order to optimize the electrical performances related with the surge protection capability. Lateral TVS structures with a four-layer doping profile exhibit the best electrical performances, as in the case of vertical TVS devices. The dependence of the basic electrical characteristics on the technological and geometrical parameters is also analysed. Finally, the electrical performances of lateral TVS structures are compared with those of vertical punch-through TVS devices and conventional Zener diodes, being the leakage current level reduced two orders of magnitude in the case of the lateral architecture. Lateral TVS structures exhibits similar performance than vertical counterparts with the advantage of easiest on-chip integration.

Punch-through diodes as replacement for low-voltage Zener diodes in ESD protection circuits

Punch-through diodes as replacement for low-voltage Zener diodes in ESD protection circuits

Punch-through diodes as replacement for low-voltage Zener diodes in ESD protection circuits

We present results on a novel punch-through diode structure that provides good clamping characteristics for both positive and negative polarity. Its performance as off-chip ESD protection device is compared to that of a conventional Zener diode with a comparable capacitance; showing that a punch-through diode features better clamping characteristics and higher current handling at a given reverse stand-off voltage.

Using thin emitters to control BV ce0 effects in punch-through diodes for ESD protection

We present results of a novel punch-through diode structure which uses a thin SiGe emitter to effectively suppress impact-ionisation-related (BV ce0) effects that typically start to dominate the electrical characteristics of conventional punch-through devices at voltages above 2.5– 3.0 V , resulting in the occurrence of negative resistances (snap-back) and severely limiting the application range.

Modelling of leakage current in ferroelectric thin film capacitors

A complete understanding of the leakage current mechanism in ferroelectric thin film capacitors has remained elusive despite numerous experimental and theoretical studies. This paper does not claim to provide the solution but rather to clarify the issues that are still unresolved and need further attention. We discuss the similarities between observed leakage current curves and those for metal-semiconductor-metal punch-through diodes.

Punchthrough diode as the transient voltage suppressor for low-voltage electronics

Protection devices for future low-voltage electronics are needed. Performances of a new punchthrough transient voltage suppressor (TVS) are analyzed with two-dimensional device simulation. Compared with the available low-voltage TVS constructed with a Zener diode, the punchthrough diode shows far superior leakage current and capacitance. These punchthrough TVS devices are satisfactory for applications not only at 3 V but even at 1 V.

Amorphous Silicon Alloy Punch-Through Diodes for Display Applications

AbstractThe current-voltage characteristics of amorphous silicon alloy n-π-n and p-i-p diodes have been investigated. These diodes show highly nonlinear conduction characteristics which are attributed to the punch-through effect. The dependence of the non-linearity on the thickness and doping of the intermediate active layer support this interpretation. An experimental 108 × 108 pixel liquid crystal display was built with punch-through diodes as pixel switches.

Diffused junction effects in punch-through diodes

Diffused junction effects in punch-through diodes

Transmission line modelling and failure modes in power punch-through diodes

The temperature rise in a punch-through diode operating under pulsed conditions has been calculated using the transmission line modeling (TLM) method. The results compare favourably with experimental measurements on devices tested to destruction. Failure is due to a second breakdown process.

The calculation of temperature distribution in punch-through structures during pulsed operation using the transmission line modelling (TLM) method

Finite difference methods are frequently used to model heat flow in semiconductors. However space and time discretisation of the heat equation introduces errors. The transmission line modelling technique (TLM) is a useful alternative in that it solves an equivalent electrical network exactly. The extent of error depends only on how well an equivalent electrical network matches a physical problem. The TLM method has been used to model the behaviour of punch-through diodes during pulsed operation. The results indicate that the mechanism of heat dissipation within the active region of this type of device will have to be described more accurately if agreement between theory and experiment is to be obtained.

Performance of In&amp;lt;inf&amp;gt;x&amp;lt;/inf&amp;gt;Ga&amp;lt;inf&amp;gt;1-x&amp;lt;/inf&amp;gt;As&amp;lt;inf&amp;gt;y&amp;lt;/inf&amp;gt;P&amp;lt;inf&amp;gt;1-y&amp;lt;/inf&amp;gt;photodiodes with dark current limited by diffusion, generation recombination, and tunneling

We present a theoretical study of the effects of diffusion, generation-recombination (GR), and the recently observed tunneling currents on the performance of photodiodes made from In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.73</inf> Ga <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.27</inf> As <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.63</inf> P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.37</inf> and In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</inf> Ga <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</inf> As. Calculations are made for both p+ν and p-i-n punch-through diode configurations, and are compared with recent measurements made by several independent investigators. For doping densities typical of present material ( <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N_{D} \gsim 10^{15}</tex> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> ), tunneling currents become dominant prior to avalanche breakdown. Thus, for detection of weak (-55 dBm at 45 Mbits/s) optical signals, the diodes must be operated at low voltages where GR is the dominant source of reverse-biased leakage. To meet the requirements of low capacitance ( <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C \leq 0.5</tex> pF for a diode area of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) and low GR dominated dark current ( <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I_{D} \leq 10</tex> nA at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T = 70\deg</tex> C), the doping density and effective carrier lifetime (τ <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eff</inf> ) must be <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N_{D} &lt; 7 \times 10^{15}</tex> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">\tau_{eff} \gsim 150</tex> ns for In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.73</inf> Ga <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.27</inf> As <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.63</inf> P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.37</inf> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5 \times 10^{14} \lsim N_{D} \lsim 7 \times 10^{15}</tex> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">\tau_{eff} \gsim 3.5 \mu</tex> s for In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</inf> Ga <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</inf> As.

1/ f noise and velocity saturation in punch-through diodes

The influence of velocity saturation on bulk 1/ f noise is examined. Experiments were performed on p- n- p punch through diodes in which electric fields up to 140 kV/cm are attained. A theoretical model is constructed on the basis of the Hooge-Kleinpenning model and using the impedance-field method. Comparison of theory and experiment indicates that the mean-squared amplitude of the local mobility fluctuations is approximately proportional to the square of the differential mobility.