Pulse Width Modulation DC-DC Converter Research Articles

A new lossless passive snubber with simple structure for pulse width modulation DC-DC converters

A new lossless passive snubber for pulse width modulation converters is introduced in this paper. This snubber is established zero current switching condition for main switch in the converters for turning on distance. This snubber does not impose any additional current stress on the switch. The snubber can be applied to all single-switch DC-DC converters. A boost converter with the proposed snubber is analyzed and to verify theoretical analysis a 200 W sample is implemented and tested, also the experimental results are presented. In order to investigate the effect of snubber circuit in the converter in terms of efficiency, the boost converter with the proposed snubber has been compared in terms of efficiency with the conventional boost converter and the results show that the efficiency has increased by about 7% despite the snubber.

Time-domain Dynamic-performance-improvement Method for Pulse-width-modulated DC-DC Converters Based on Eigenvalue and Eigenvector Sensitivity

For pulse-width modulated (PWM) DC-DC converters, the input voltage fluctuation and load variation in practical applications make it necessary for them to have better dynamic performance to meet the regulation requirements of the system. The dynamic-performance-improvement method for PWM DC-DC converters is mainly based on indirect dynamic performance indices, such as the gain margin and phase margin. However, both settling time and overshoot in the time domain are important in practical engineering. This makes it difficult for designers to obtain a clear understanding of the time-domain dynamic performance that can be achieved with improved control. In this study, a direct analysis of the time-domain dynamic characteristic of PWM DC-DC converters is performed. A dynamic-performance-improvement method based on eigenvalues and eigenvector sensitivity (E <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> S-based DPIM) is proposed to directly improve the time-domain dynamic performance index of PWM DC-DC converters. By considering a boost converter with proportional-integral control as an example, an additional virtual inductor current feedback control was designed using the proposed dynamic-performance-improvement method. Simulation and experimental results verify the validity and accuracy of the proposed dynamic-performance-improvement method.

The Time-Invariant Polynomial Model of Fixed-Frequency PWM DC–DC Converter Applying Normalized Coordinate Transformation

In this article, a time-invariant polynomial model of fixed-frequency pulsewidth modulation dc-dc converter is proposed. Through normalized coordinate transformation, the time-varying model of the converter is transferred into a time-invariant model, whose state matrix and input matrix are obtained by the addition and multiplication of matrices simply and expressed by the polynomial of duty cycle concisely. The proposed model has the following advantages. Compared with the state-space average (SSA) model, the ripple of the state vector and the switching period are considered, thereby improving the accuracy. Contrary to other time-invariant models, the state matrix and input matrix instead of the state vector are expanded into series. Therefore, neither the number of state vectors nor the order of the matrices increases, and the proposed model has a simple structure similar to the SSA model. In addition, as a time-invariant polynomial model, the calculation and analysis of the proposed model are much simpler than the time-variant exact model. In order to prove the above advantages of the proposed model, the general expression of the proposed model is derived and the proposed model is compared with other models. These analyses and comparisons are verified through the simulation and experimental results.

A General Frequency-Domain Model of Trailing-Edge and Leading-Edge Carrier PWM dc–dc Converter Based on Hybrid Continuous and Discrete-Time Descriptions

This article proposes a general frequency-domain model to reflect the effect of trailing-edge and leading-edge carrier on the stability of the pulsewidth modulation (PWM) dc-dc converter. The state vector in the general state-space averaging (SSA) model is considered as the sampled value of the actual state vector rather than the average value. In this way, the continuous and discrete-time descriptions can be used together to maintain a balance between accuracy and simplicity. In the proposed model, the main circuit and controller are described by a continuous model with the same equations as the existing SSA model. Therefore, the simple structure of the continuous model is inherited. The PWM carrier comparison component is described by a discrete-time model (DTM), which can accurately reflect the effects of PWM carrier and state vector ripple. Thus, the high accuracy of DTM is maintained as well. In order to show the advantages of the proposed model, the comparison between the proposed model and other existing models is made. Compared with the SSA model and the discrete average model, the proposed hybrid model is more accurate. Compared to the DTM, the proposed hybrid model is more convenient to use. Simulation and experiment results verify the above analyses and advantages.

A non-iterative approach for maximum power extraction from PEM fuel cell using resistance estimation

A primary challenge towards the adoption of Polymer Electrolyte Membrane Fuel Cell (PEMFC) on a wider scale involves the extraction of maximum power irrespective of variation is source and loading condition, commonly referred to as Maximum Power Point Tracking (MPPT). The non-linear voltage current relationship and dynamic variation of maximum extractable power with change in operating parameters makes MPPT task quite challenging. Motivated by the need to achieve MPPT over a wider operating range with reduced computational burden, this paper proposes a non-iterative approach for maximum power extraction from PEMFC. Continuous estimation of resistance across the source and load by monitoring the voltage and current, allows reducing the deviation between equivalent resistance across the PEMFC terminals and its internal resistance by regulating the Pulse Width Modulated DC-DC converter. The power converter for MPPT is designed with the objective of simultaneously minimizing the ripple content and achieving faster dynamic response. The proposed approach is compared with the Incremental Resistance Method (INR), in terms of simplicity, MPP efficiency and better dynamic response for both source and load perturbations. The effectiveness of the proposed scheme has been validated experimentally.

Averaged Small-Signal Model of PWM DC-DC Converters in CCM Including Switching Power Loss

This brief proposes an improved averaged small-signal model of pulse-width modulated dc-dc power converters operated in continuous-conduction mode, which includes a resistance that corresponds to the switching power loss. Through this model, the switching power loss can be incorporated into existing averaged small-signal dynamic models. The proposed approach is based on the principle of conservation of energy. The expressions for the equivalent switching-loss resistance for the basic converter topologies are derived. The improved dc and small-signal models of the switching network are given. A boost dc-dc converter is considered as an example. The effect of the switching-loss resistance on the small-signal control-to-output transfer function is shown. Experimental results are given and the theoretical predictions have been validated.

A soft switching with reduced voltage stress ZVT-PWM full-bridge converter.

This paper introduces a novel active snubber cell for soft switching pulse width modulation DC-DC converters. In the proposed converter, the main switch is turned on under zero voltage transition and turned off under zero voltage switching (ZVS). The auxiliary switch is turned on under zero current switching (ZCS) and turned off under zero current transition. The main diode is turned on under ZVS and turned off under ZCS. All of the other semiconductors in the converter are turned on and off with soft switching. There is no extra voltage stress on the semiconductor devices. Besides, the proposed converter has simple structure and ease of control due to common ground. The detailed theoretical analysis of the proposed converter is presented and also verified with both simulation and experimental study at 100 kHz switching frequency and 600 W output power. Furthermore, the efficiency of the proposed converter is 95.7% at nominal power.

Stability Analysis With Considering the Transition Interval for PWM DC-DC Converters Based on Describing Function Method

The nonlinearity of the switching process in DC–DC converters can result in the inaccuracy and invalidation of traditional stability criterion based on linear modeling, which is very harmful in practice, especially for the DC-DC converters with high stability requirements. In this paper, the describing function method is adopted for the modeling of switching process, namely, pulse width modulation (PWM), in DC–DC converters, and the describing function of the PWM is derived in detail. Considering the nonlinear items in the obtained describing function of PWM, the selection of the parameters in these nonlinear items are first provided and proved in this paper. With the obtained describing function, the stability of the PWM DC–DC converter can be analyzed exactly. Taken a PWM boost converter as an example, the nonlinear model based on describing function and the linear model are established, respectively; furthermore, the stability analysis based on these two kinds of models are carried out. Comparing with the traditional linear stability criterion, the simulation and experimental results validate the effectiveness and accuracy of the stability analysis based on describing function method. Furthermore, the transition interval of the PWM DC–DC converter from a stable region to an unstable region can be determined exactly by the proposed stability analysis method, which is helpful to determine the stability margin in real engineering applications. Therefore, this paper provides a practical stability analysis method for PWM DC–DC converters.

Three-Phase Three-Level Phase-Shifted PWM DC–DC Converter for Electric Ship MVDC Application

A three-phase three-level phase-shifted pulsewidth modulation (PSPWM) dc-dc converter is proposed for electric ship medium-voltage direct current application. Output voltage is controlled by incorporating PSPWM. Gate signals of each phase are phase shifted by 2π/3 from each other. This results in a decrease in output voltage ripple. Major features of the converter include: 1) good dynamic performance under low switching frequency; 2) fault tolerance capability; and 3) plug and play capability. In order to obtain behavioral and performance characteristics of the proposed converter, detailed analytical and hardware in loop simulation studies are carried out. Finally, the viability of the scheme is confirmed through detailed experimental studies on a MW level, 1-kHz prototype developed for the purpose.

Very High Frequency PWM Buck Converters Using Monolithic GaN Half-Bridge Power Stages With Integrated Gate Drivers

Integration is a key step in utilizing advances in GaN technologies and enabling efficient switched-mode power conversion at very high frequencies (VHF). This paper addresses design and implementation of monolithic GaN half-bridge power stages with integrated gate drivers optimized for pulsewidth-modulated (PWM) dc-dc converters operating at 100 MHz switching frequency. Three gate-driver circuit topologies are considered for integration with half-bridge power stages in a 0.15-μm depletion-mode GaN-on-SiC process: an active pull-up driver, a bootstrapped driver, and a novel modified active pull-up driver. An analytical loss model is developed and used to optimize the monolithic GaN chips, which are then used to construct 20 V, 5 W, 100 MHz synchronous buck converter prototypes. With the bootstrapped and the modified pull-up gate-driver circuits, power stage efficiencies above 91% and total efficiencies close to 88% are demonstrated. The modified active pull-up driver, which offers 80% reduction in the driver area, is found to be the best-performing approach in the depletion-mode GaN process. These results demonstrate feasibility of high-efficiency VHF PWM dc-dc converters based on high levels of integration in GaN processes.

Accurate Modeling of Nonideal Low-Power PWM DC-DC Converters Operating in CCM and DCM using Enhanced Circuit-Averaging Techniques

The development of enhanced modeling techniques for the simulation of switched-mode Pulse Width Modulated (PWM) DC-DC power converters using circuit averaging is the main focus of this article. The circuit-averaging technique has traditionally been used to model the behavior of PWM DC-DC converters without considering important nonideal characteristics of the switching devices. As a result, most of these existing approaches present simplified models that are ideal or linearized, and do not accurately account for the performance characteristics of the converter. This is especially problematic for low-power applications. In this article, we present an enhanced nonideal behavioral circuit-averaged model that makes the simulation of DC-DC converters both computationally efficient and accurate, thereby presenting an important tool for circuit designers. Experimentally, we show that our Verilog-A-based new model allows for accurate simulation of both Buck- and Boost-type PWM converters operating in either CCM or DCM modes while providing more than one order of magnitude speedup over the transistor-level simulation.

Fault Diagnosis of PWM DC–DC Converters Based on Magnetic Component Voltages Equation

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis.

Simulation and Experimental Validation of PFC Zeta Converter fed PMSM Drive for Variable speed Applications

In many pulse width modulated DC-DC converter topologies, the controllable switches are operated in switch mode where they are required to turn the entire load current on and off during each switching cycle. Under these conditions, the switches are subjected to high switching stresses and power losses. Recently there is an increased interest in the use of resonant type DC-DC converters due to the advantages of high frequency of operation, high efficiency, small size, light weight, reduced Electro Magnetic Interference (EMI) and low component stresses. A novel PFC (Power Factor Corrected) Converter using Zeta DC-DC converter feeding a PMSM drive using a single voltage sensor is proposed for variable speed applications. A single phase supply followed by an uncontrolled bridge rectifier and a Zeta DC-DC converter is used to control the voltage of a DC link capacitor which is lying between the Zeta converter and a VSI (Voltage Source Inverter). The voltage of a dc-link capacitor of zeta converter is controlled to achieve the speed control of PMSM Drive. The zeta converter is working as a front end converter operating in DICM (Discontinuous Inductor Current Mode) and thus using a voltage follower. A sensor less control of PMSM is used to eliminate the requirement of Hall Effect position sensors. Using MATLAB/ Simulink 7.13 environment the model can be simulated to achieve a wide range of speed control with high power factor and the same can be validated by means of hardware.

Family of single‐switch soft‐switching pulse‐width modulation DC–DC converters with reduced switch stress

In this study, a new family of pulse width modulation DC-DC converters is introduced. The proposed converters have one switch that turns on at zero current switching condition and turns off at zero voltage switching condition. The proposed auxiliary circuit can be used instead of converter switch in any non-isolated and isolated DC-DC converter. The buck converter from this converter family is analysed and its operating modes are discussed. The design considerations are presented and a prototype is realised. The experimental results confirm the validity of theoretical analysis.

High-Frequency-Link Soft-Switching PWM DC–DC Converter for EV On-Board Battery Chargers

This paper proposes a high-frequency-link soft-switching pulse-width modulated dc-dc converter for electric vehicle (EV) on-board battery chargers. Zero-voltage switching of power switches is achieved from light load to full load. Reverse-recovery losses can be reduced in the secondary side output diodes without using any additional circuit components. Zero-current switching of output diodes is achieved by using the series-resonant circuit in the secondary side. The circulating current in the primary side full-bridge circuit can be changed by the operation modes of the output diode current. As a result, a high efficiency can be achieved for EV on-board battery chargers. The performance of the proposed converter is evaluated throughout experimental results for a 2.0-kW prototype circuit.

Soft-Switching Full-Bridge PWM DC–DC Converter With Controlled Output Rectifier and Secondary Energy Recovery Turn-Off Snubber

A zero-voltage and zero-current switching full-bridge pulse-width modulated dc-dc converter with controlled secondary-side rectifier using a novel nondissipative energy recovery turn-off snubber is presented in this paper. Using a controlled rectifier, a turn-off snubber, and an innovative control algorithm, the circulating current of the converter is eliminated and soft switching for all power switches of the inverter is achieved for full-load range from no-load to short circuit. The principle of converter operation is explained and analyzed and the experimental results on a 4.5 kW, 100 kHz laboratory model of the converter are presented.

ZCS-PWM Converter for Reducing Switching Losses

Zero-current (ZC) switching pulse-width modulated (PWM) fly back DC-DC converter is an extended version of the single switch fly back converter with an auxiliary circuit. The main switch and auxiliary switch operate at ZCS turn-on and turn-off conditions, and all uncontrolled devices in the converter operate at zero-voltage-switching (ZVS) turn-on and turn-off. Soft switching techniques are used in PWM DC-DC converters to reduce switching losses and electromagnetic interference (EMI). The circulating current for the soft switching flows only through the auxiliary circuit, the conduction loss and current stress of the main switch are minimized. The general principle of operation of ZCS flyback converter, its merits and demerits, experimental setup and results has been summarized.

A DC–DC Converter Based on the Three-State Switching Cell for High Current and Voltage Step-Down Applications

This paper presents a pulsewidth modulation dc-dc nonisolated buck converter using the three-state switching cell, constituted by two active switches, two diodes, and two coupled inductors. Only part of the load power is processed by the active switches, reducing the peak current through the switches to half of the load current, as higher power levels can then be achieved by the proposed topology. The volume of reactive elements, i.e., inductors and capacitors, is also decreased since the ripple frequency of the output voltage is twice the switching frequency. Due to the intrinsic characteristics of the topology, total losses are distributed among all semiconductors. Another advantage of this converter is the reduced region for discontinuous conduction mode when compared to the conventional buck converter or, in other words, the operation range in continuous conduction mode is increased, as demonstrated by the static gain plot. The theoretical approach is detailed through qualitative and quantitative analyses by the application of the three-state switching cell to the buck converter operating in nonoverlapping mode (D <; 0.5). Besides, the mathematical analysis and development of an experimental prototype rated at 1 kW are carried out. The main experimental results are presented and adequately discussed to clearly identify its claimed advantages.

Comparison of Wide- and High-Frequency Duty-Ratio-to-Inductor-Current Transfer Functions of DC–DC PWM Buck Converter in CCM

Wide- (WF) and high-frequency (HF) small-signal models are presented for pulsewidth-modulated dc-dc buck converter power stage. An exact duty-ratio-to-inductor-current transfer function is derived using the WF model and compared to an approximate transfer function derived using the HF model for the buck converter power stage in continuous conduction mode. The theoretical results are validated using experimental results.

Time-Domain Design of Digital Compensators for PWM DC-DC Converters

A time-domain design method for the digital controller of pulsewidth modulation dc-dc converters was developed. The proposed approach is based on the fact that the closed-loop response of a digitally controlled system is largely determined by the first few samples of the compensator. This concept is used to fit a digital PID template to the desired response. The proposed controller design method is carried out in the time domain and, thus, bypasses errors related to the transformation from the continuous to discrete domain and to discretization. The method was tested by simulations and experimentally. Digital PID controllers for experimental buck- and boost-type converters were designed according to the proposed method and implemented on a TMS320LF2407 DSP core. The measured closed-loop attributes were found to be in good agreement with the design goals. The study was further expanded to investigate the possible realistic closed-loop performance that can be obtained from a system that is controlled by a PID template controller, as well as the stability boundaries of the proposed time-domain controller design approach. The results of the study delineate a normalized map of deviation from the target closed-loop performance goals possible for PID control of switch-mode converters and the areas in which the use of this control law is feasible.