Abstract

Integration is a key step in utilizing advances in GaN technologies and enabling efficient switched-mode power conversion at very high frequencies (VHF). This paper addresses design and implementation of monolithic GaN half-bridge power stages with integrated gate drivers optimized for pulsewidth-modulated (PWM) dc-dc converters operating at 100 MHz switching frequency. Three gate-driver circuit topologies are considered for integration with half-bridge power stages in a 0.15-μm depletion-mode GaN-on-SiC process: an active pull-up driver, a bootstrapped driver, and a novel modified active pull-up driver. An analytical loss model is developed and used to optimize the monolithic GaN chips, which are then used to construct 20 V, 5 W, 100 MHz synchronous buck converter prototypes. With the bootstrapped and the modified pull-up gate-driver circuits, power stage efficiencies above 91% and total efficiencies close to 88% are demonstrated. The modified active pull-up driver, which offers 80% reduction in the driver area, is found to be the best-performing approach in the depletion-mode GaN process. These results demonstrate feasibility of high-efficiency VHF PWM dc-dc converters based on high levels of integration in GaN processes.

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