PSPICE Simulation Research Articles

A Physical Memristor Model for Pavlovian Associative Memory

Abstract Brain-inspired intelligence is considered a computational model with the most promising potential to overcome the shortcomings of the von Neumann architecture, making it a current research hotspot. Due to advantages such as nonvolatility, high density, low power consumption, and high response ratio, memristors are regarded as devices with promising applications in brain-inspired intelligence. This paper proposes a physical Ag/HfO$_{x}$/FeO$_{x}$/Pt memristor model. Firstly, the Ag/HfO$_{x}$/FeO$_{x}$/Pt memristor is fabricated using magnetron sputtering, and its internal principles and characteristics are thoroughly analyzed. Furthermore, we constructed a corresponding physical memristor model which achieves a simulation accuracy of up to 99.72% for the physical memristor. We design a fully functional Pavlovian associative memory circuit, realizing functions including generalization, primary differentiation, secondary differentiation, and forgetting. Finally, the circuit is validated through PSPICE simulation and analysis.

Design of novel oscillator circuit using grounded capacitors and two current mode building blocks

ABSTRACT This paper introduces a new scheme of oscillator realisation and its implementation in the form of a novel circuit, which requires two current mode building blocks and two grounded capacitors, besides two resistors. The proposed circuit generates two sinusoidal voltage outputs and operates on ±2.5 V supply voltage. The parasitic and non-ideal analysis of the proposed circuit is given. PSPICE simulation results are included in support of the proposed theory. The new proposed circuit is compatible to CMOS technology. Several possible applications are suggested as conclusive discussion to justify the new advance.

Analog In-memory Circuit Design of Polynomial Multiplication for Lattice Cipher Acceleration Application

As the core operation of lattice cipher, large-scale polynomial multiplication is the biggest computational bottleneck in its realization process. How to quickly calculate polynomial multiplication under resource constraints has become an urgent problem to be solved in the hardware implementation of lattice ciphers. Therefore, an analog in-memory circuit for fast polynomial multiplication calculation is proposed. First, an in-memory computing circuit for Discrete Fourier Transform and Inverse Discrete Fourier Transform based on memristor array is designed. On this basis, a fully analog circuit that can realize polynomial multiplication in one step is designed. Compared with traditional hardware implementation, the in-memory calculation method used in this article decreases the calculation time of polynomial multiplication to the microsecond level, which greatly improves the speed of lattice cipher encryption and decryption. For the specific examples in this article, PSPICE simulation shows that the average accuracy of the calculation result is above 99.90%.

Comparative Study for DC-DC Converter Output Bank’s Reliability Evaluation Using Prediction Standards MIL-HDBK-217F vs. Telcordia SR-332

In the last decade, a higher level of reliability has become a compulsory demand when it comes to modern DC-DC converters. This work addresses the main reliability metrics: in many studies, the failure rate λ and MTBF of an output capacitor bank used within a high-current low-voltage buck converter have shown that the output capacitor bank is the most critical component within the converter. Many authors dealt with this issue by performing reliability predictions. The majority of studies use only one specific standard prediction to solve the problem. Herein, the calculation was performed using both the older standard, MIL-HDBK-217, and the latest one, Telcordia SR-332, providing a benchmark comparison between the two, which is a helpful tool for output capacitor selection in early-stage design. The military standard was well accepted for decades in reliability prediction, even in industrial electronics, and is still used today in a critical manner because there have been no more updates after the latest version, MIL-HDBK-217F—Notice 2, was released in 1995. Since then, newer prediction standards have appeared in the electronics reliability market. Over time, this standard was mostly used, but it does not accurately model the reliability because of a lack of taking account of the mission profile. The above-mentioned newer standard—i.e., Telcordia SR-332—also tries to compensate for the lack of the newest component technology in the older standard (which is the first standard released on the market), supplying useful design data for design engineers who use the so-called “design with reliability in mind” concept. This provides the designer of DC-DC converters with a comparison between the reliability values when the two mentioned standards are used. This paper establishes the environmental condition for the passive components by means of a point of load (PoL) buck converter that is used for both calculation methods. The influence of temperature and several specific concepts, like reference conditions, operating conditions, ripple, and internal self-heating, were taken into account in order to display the results. The temperature for the capacitor’s capsule needed in πT stress factor calculation was derived using PSPICE simulation. High-fidelity and dedicated SPICE models provided by the manufacturer were used for MOSFETs, polymer electrolytic, and MLCC capacitors that comprise the converter.

Extreme events in a damped Korteweg–de Vries (KdV) autonomous system: A comprehensive analysis

This manuscript explores extreme events in a three-dimensional, damped Korteweg–de Vries (KdV) autonomous system that is derived from the jerk system with a modified basin. Through rigorous stability analysis, we identify the extreme events, confirmed using phase portraits, Poincaré return maps, time series, and probability distribution functions. The Dragon-king phenomenon is obtained and self-organised criticality is discussed. The regime of extreme events in a wide parameter range was obtained through two-parameter scanning. The analog circuit was constructed to mimicking dynamics of damped KdV equation and demonstrated in real-time hardware experiment as well as PSpice simulation. The experimental results show excellent agreement with the numerically obtained results. This study is the first comprehensive examination of extreme events in the damped KdV system, highlighting their nature and potential applications in chaos-based dynamical systems.

Design and Optimization of Thermal Vacuum Sensor Test System Based on Thermoelectric Cooling

The performance of critical components in a sensor testing system may be compromised in a thermal vacuum environment as a result of the impact of extreme temperatures. Moreover, the precision of the angle measurement may be influenced by the thermal deformation effect. This paper presents a simulated analysis of the temperature regulation impact of the thermoelectric cooler (TEC) and outlines the design and optimization process of a sensor test chamber that can function within a consistent temperature range. The mathematical model of TEC is utilized to suggest a design choice, taking into account the aforementioned model, in a temperature-controlled environment with thermal vacuum circumstances. Moreover, the orthogonal test method is employed in combination with the FloEFD finite element analysis to validate the effectiveness of temperature control. In addition, the parameters of the radiation radiator are tuned and designed. Therefore, the temperature range difference inside the test system decreased by 20%. The thermoelectric temperature control system’s steady-state model is investigated using the PSpice simulation, based on the equivalent circuit theory. The discovered conclusions establish a theoretical foundation for improving the efficiency of temperature regulation. The design concepts presented in this work, particularly the optimization technique for radiation radiators in aerospace test equipment using thermoelectric cooling temperature control research and development, hold promise for practical implementation.

Study on the Optical Coupling Effect of Building-Integrated Photovoltaic Modules Applied with a Shingled Technology

Building-integrated photovoltaics (BIPV) comprise the integration of a solar power generation system into the exterior design and architectural elements of a building to produce electricity, which allows the building itself to generate electricity. By integrating shingled technology into the photovoltaic module with optimization of the optical effect, the output performance of the module can be increased while securing an aesthetic appeal as an architectural exterior material for the building simultaneously. In this research, we studied enhancing the performance of BIPV modules through an analysis of the optical coupling effect for shingled technology using PSpice simulation. Compared to the efficiency of 0.2 cm string spacing, the optical coupling effect was increased by 33.33%, 46.98%, 67.01%, and 193.49% according to the string spacing of 0.5 cm, 1 cm, 2 cm and 4 cm, respectively. To analyze this increase, we focused on studying the increase in current due to the reflection and re-absorption of light in the back layer of the solar cell as the cause of this output enhancement. Additionally, the coupling effect in accord with different layers showed that using white EVA to reflect the incident light from the top layer resulted in 117.14% and 521.90% enhancements in maximum output power (Pm) loss % compared to the conventional and black backsheet applied PV modules, respectively.

Vibrational resonance in an asymmetric system modeled by an electronic circuit: Effect of the buffers.

Vibrational resonance (VR) has been extensively studied in symmetric circuits, but research on this phenomenon in asymmetric electronic circuits is understudied. The current study aims to model a novel asymmetric electronic circuit and investigate the occurrence of VR in the circuit. This oscillator shows changes according to four control parameters, with the aid of two buffers. The amplification of signals in electronic circuits gives interesting results, vibrational resonance is one of the phenomena which is based on the amplification of signals. In this study, the asymmetric strength caused by the potentiometers and the frequencies influence are the major aims explored. Interestingly, the circuit shows different types of behaviors that are pointed out through waveform profiles, bifurcation diagrams, largest Lyapunov exponent, and the phase portraits. The dynamic of the system is studied theoretically, numerically and by Pspice Simulation. The Pspice estimates match with numerical simulations. We use the response Q(ω) method, based on the sine and cosine of the Fourier component to study VR. Our discovery suggests that the asymmetric parameter and the amplitude of the high frequency, both affect the occurrence of vibrational resonance.

Minimal Realization Plus Current Output CC-based Biquad Circuit

This paper presents a minimal design of a biquad circuit using only one plus current output type-II current conveyor (CCII), one differential voltage current conveyor (DVCC) and grounded passive components. The circuit enables the implementation of all 5 basic filter types: low-pass (LP), band-pass (BP), high-pass (HP), band-stop (BS) and all-pass (AP) by the selecting and adding of the input and output currents with no component matching constraints. Moreover, the circuit parameters ω0 and Q can be set simply by adjusting the circuit components. The proposed biquad circuit performance has very low sensitivity to circuit components due to its simple structure and a small number of devices (2 active and 4 grounded passive components). This allows the circuit to work at high frequencies. The performance of the proposed topology was evaluated through PSPICE simulator using the 0.18 mm CMOS technology from the Taiwan Semiconductor Manufacturing Company (TSMC).

Efficient Data Transfer and Multi-Bit Multiplier Design in Processing in Memory

Processing in Memory based on memristors is considered the most effective solution to overcome the Von Neumann bottleneck issue and has become a hot research topic. The execution efficiency of logical computation and in-memory data transmission is crucial for Processing in Memory. This paper presents a design scheme for data transmission and multi-bit multipliers within MAT (a data storage set in MPU) based on the memristive alternating crossbar array structure. Firstly, to improve the data transfer efficiency, we reserve the edge row and column of the array as assistant cells for OR AND (OA) and AND data transmission logic operations to reduce the data transfer steps. Furthermore, we convert the multipliers into multi-bit addition operations via Multiple Input Multiple Output (MIMO) logical operations, which effectively improves the execution efficiency of multipliers. PSpice simulation shows that the proposed data transmission and multi-bit multiplier solution has lower latency and power consumption and higher efficiency and flexibility.

IGBT Gate Boost Drive Technology for Promoting the Overload Capacity of Traction Converter.

Under certain circumstances, a high-speed railway may require constant acceleration or emergency braking, in which case the inverter may experience short-term overload conditions and the current passing through the IGBT will go beyond the rated design tolerance. Under overload conditions, the IGBT loss will increase instantly, raising the power semiconductor device's junction temperature in the process. This research examines the boosting-gate-voltage-driven IGBT control technology. It increases the gate drive voltage and the IGBT current capacity and decreases the conduction voltage drop of IGBT under short-term overload conditions, reducing the instantaneous loss and temperature rise undulation of IGBT. The working characteristics of IGBT devices are studied, and the influence of gate drive voltage on device loss and temperature rise fluctuations is analyzed. Based on the emergency acceleration and brake conditions of the actual train operation, the short-term overload characteristics of the inverter are analyzed. The optimization analysis of the boosting gate voltage under emergency conditions is carried out, and the IGBT drive circuit with gate voltage pumping function is designed. The effectiveness of the driving circuit is verified through PSpice simulation and actual switching characteristic test. According to the analysis of experimental data, it can be verified that increasing the gate voltage technology can reduce IGBT losses.

Electronically Tunable Grounded and Floating Capacitance Multipliers Using a Single Active Element

A capacitance multiplier is an active circuit designed specifically to increase the capacitance of a passive capacitor to a significantly higher capacitance level. In this paper, the use of a voltage differencing differential difference amplifier (VDDDA), an electronically controllable active device for designing grounded and floating capacitance multipliers, is proposed. The capacitance multipliers proposed in this study are extremely simple and consist of a VDDDA, a resistor, and a capacitor. The multiplication factor (Kc) can be electronically controlled by adjusting the external bias current (IB). It offers an easy way of controlling it by utilizing a microcontroller for modern analog signal processing systems. The multiplication factor has the potential to be adjusted to a value that is either less than or greater than one, hence widening the variety of uses. The grounded capacitance multiplier can be easily transformed into a floating one by utilizing Zc-VDDDA. PSpice simulation and experimentation with a VDDDA realized from commercially available integrated circuits were used to test the performance of the proposed capacitance multipliers. The multiplication factor is electronically adjustable, ranging in approximation from 0.56 to 13.94. The operating frequency range is approximately three frequency decades. The realization of the lagging and leading phase shifters using the proposed capacitance multiplier is also examined and proven. The results reveal that the lagging and leading phase shifts are electronically tuned via the multiplication factor of the proposed capacitance multipliers.

Fourth‐order inverse filter configuration using current differencing buffered amplifier

AbstractThis article presents three different higher‐order inverse filter (IF) configurations using current differencing buffered amplifier (CDBA) as an active component and a few passive elements. The topology can be used to synthesize fourth‐order inverse low pass filter (FO‐ILPF), inverse band pass filter (FO‐IBPF), and inverse all‐pass filter (FO‐IAPF) using suitable admittance combinations. PSPICE simulations verify the functionality of the proposed IFs with the CMOS‐based CDBA using 180 nm technology. The theoretical analysis and simulated results are also carried out, which shows that they are in close agreement. The passive sensitivity analysis, non‐ideality analysis, Monte Carlo simulation, temperature analysis, percentage of total harmonic distortion (%THD), and noise analysis of the proposed filters are also performed. The proposed design has also been implemented using the current feedback operational amplifier (CFOA) as IC AD844AN to verify the functionality.

Effects of Adding the Antiparallel Diodes in a Model of Solar Photovoltaic Cell: Theory and Pspice Simulations

Background: The photovoltaic (PV) array consisting of modules is considered as the fundamental electrical power conversion unit of the PV generator system. The PV array has nonlinear characteristics with the current-voltage (I-V) characteristic in the exponential form introduced by diodes. In this context, the key objective of the research carried out in the present study is to propose a novel PV cell, with anti-parallel diodes introduced in the circuit model in place of the single diode. Objective: The objective of this research is to compare the effects, magnitudes of current and power generated by the PV cell, with antiparallel diodes to those with single diodes. Methods: The model circuit containing two antiparallel diodes is first designed, and then analyzed through the circuit Equationuations found using the Kirchhoff’s laws. The I-V characteristics are modified in the hyperbolic sine form, and the model Equationuation is solved analytically and numerically using the MATLAB software. The analytical and numerical investigations are then confirmed by Pspice simulation, which is made possible with the introduction of additional bloc necessary to make the output signal voltage tunable in the opened circuit. Results: The I-V characteristic is plotted showing that when the voltage is lower than a particular, the model containing the antiparallel diode has the increasing of current, while that with single diode has constant current. Additionally the current generated by the PV cell oscillates increasingly when the supplied signal voltage is negative. We also found that the maximum power increases with the temperature. The expression of the cutoff signal voltage leading to zero current was also found and plotted, the increasing function of the number Ns of series diodes. As application, the PV circuit designed is used in the charging of the battery of electrical vehicle. Conclusion: The PV cell with antiparallel diodes generates currents for large band of signal voltage, and the power generated increases with temperature.

MO-CCCII-Based Single-Input Multi-Output (SIMO) Current-Mode Fractional-Order Universal and Shelving Filter

This study introduces an innovative filter topology capable of providing simultaneous positive and negative gain outputs for one-fractional order LP, with high-pass, all-pass, and fractional-order shelving filter responses. The circuit, utilizing multi-output second-generation current-controlled conveyors, stands out as the first to deliver ten outputs, incorporating both integer and fractional-order filter responses, without requiring additional components. Its current-mode design simplifies the process, employing minimal active and grounded passive elements, making it appropriate for low-voltage/low-power applications. The filter utilizes fifth-order Oustaloup approximation and Foster type-I RC networks for fractional-order capacitors, providing enhanced control over the transition slope. PSpice simulations confirmed a 1 kHz cut-off, showcasing low power consumption, minimal noise, and a wide dynamic range, positioning the filter as suitable for sensors, control, and acoustic applications.

Enhanced power supply circuitry with long duration and high‐efficiency charging for indoor photovoltaic energy harvesting internet of things end device

AbstractLight is a popular choice as an indoor energy source for Internet of Things (IoT) end devices. However, indoor light sources are intermittent, which can disrupt the operation of IoT end devices, potentially leading to safety concerns or inaccurate data. Therefore, there is a growing need to develop a long‐duration power supply for IoT end devices. The energy from ambient light is harnessed to charge a supercapacitor through an energy manager chip. This supercapacitor serves as the power source for IoT nodes when the ambient light is unavailable. Nevertheless, as the voltage of the supercapacitor drops below the operating threshold, the IoT end node will eventually shut down. This paper proposes a circuit that utilizes a Joule Thief circuit, booster converter, and capacitor stack‐up circuit to extract the remaining energy from the supercapacitor and boost the voltage, thereby extending the operational lifespan of IoT end nodes. Additionally, capacitor stack‐up circuits significantly enhance charging efficiency. PSpice design and simulations confirm circuit feasibility. High‐efficiency charging and long‐duration IoT nodes suggest replacing traditional batteries with supercapacitors, reducing environmental impact.

Electronically Tunable Sinusoidal Oscillator Using Only Single Current-Controlled Current Conveyor Trans-Conductance Amplifier

This work presents a wide frequency range sinusoidal oscillator design that relies on only one active component, a current-controlled current conveyor trans-conductance amplifier, and a few passive components. It just employs two grounded and non-floating capacitors and one resistor to complete the procedure. This design has the advantage of allowing the oscillation frequency and condition to be adjusted not only electronically, but also separately, without affecting the values of any passive components. To verify the functionality and usefulness of the developed sinusoidal oscillator circuit, ORCAD PSPICE simulations are done using 0.18 um process parameters for complementary metal oxide semiconductor technology. The obtained results demonstrate its application to a wide range of frequency generation without the need for additional components, hence validating the theoretical expectation.

Design, development and characterization of Blumlein Pulse Forming Line based pulsed power system for High Power Microwave source research

This paper describes a complete cycle of designing, developing, and characterising a Pulsed Power System (PPS) and generating microwaves using the relativistic source. For low impedance relativistic High Power Microwave (HPM) sources, Blumlein Pulse Forming Line (BPFL) based high voltage pulsed power systems are the most suited. An HPM source such as a virtual cathode oscillator (VIRCATOR) operating in nanosecond durations consists of a primary voltage source that charges a Marx pulse generator’s capacitor bank over a long time. The requirements of a diode load are met by compressing the output pulse width of a Marx generator by a BPFL. This article describes the novel design, construction and characterization of a circulating De-Ionized (DI) water insulated BPFL pulsed power system. A novel approach of insulating gas filled Marx generator of this class/rating is attempted. A pulse power system consisting of high pressure gas insulated Marx generator and circulating DI water-based BPFL was developed and experimented with the resistive load as well as HPM source. The PSPICE simulation of the Blumlein circuit for various load conditions is described. Criticalities in the design of end bushings are elaborated along with the development and testing of a compact BPFL-based pulsed power system.

Design method for VDCC-based analog comb filter for power line interference cancellation

An analog comb filter is implemented by linking multiple VDCC-based notch filters in a cascading fashion (N in total), eliminating N different pole frequencies. This study focuses on suppressing a fundamental frequency of power-line interference of 50 Hz and its consecutive three odd harmonics at 150 Hz, 250 Hz, and 350 Hz. One significant advantage of this comb filter is the independent control over filters' parameters like quality factor and pole frequency. Additionally, these filters can be electronically tuned by adjusting the transconductance gain of VDCC. The suggested notch filter configuration involves 2 capacitors, 2 resistors, and 1 VDCC element. Extensive simulations were conducted using PSPICE simulator software to validate the effectiveness of these filters. The basic building block, VDCC, is designed and implemented in the simulation using integrated circuits MAX435 and AD844.•Design uses a VDCC-based high Q notch filter as the active building block.•The filter employs fewer active and passive components.•Simulated results using commercially available ICs, MAX435 and AD844, confirm the filter's practical utility.

The design of self-healing memristive network circuit based on VTA DA neurons and its application

This paper proposes a self-healing memristive network circuit, which simulates the resilience mechanism of VTA DA neurons. The proposed memristive network circuit mainly consists of four modules: input (synapse) module, damage detection module, threshold trigger module and negative feedback module. The input module is composed of a memristive synaptic circuit, which can react to a harmful initial input rather than a normal initial input. Apart from reacting to initial input, the input module also can receive a feedback signal released by the negative feedback module, and the process of receiving feedback signal is the key of realizing the self-healing function. The damage detection module can output a low level pulse that acts as an input signal of the threshold trigger module when the harmful initial input exists. The threshold trigger module will activate the negative feedback module when the trigger point which corresponds to the positive threshold voltage of memristor is reached. As the last module of the self-healing function, the negative feedback module can transmit the feedback signal, also be called a repairing signal, to the damaged memristor of the input module. The PSPICE simulation results indicate that the proposed memristive network circuit can realize the self-healing function which corresponds to the resilience mechanism of the VTA DA neurons. Meanwhile, when the proposed memristive network circuit has been applied to the damaged electronic machines or robots, the self-healing function of it can make the machines be reusable.