Ps Delay Research Articles

Multi-Period Fast Rotating Optical Delay Line With 228.47 ps Delay Time

Multi-Period Fast Rotating Optical Delay Line With 228.47 ps Delay Time

Origin of the low-energy tail in the photoluminescence spectrum of CsPbBr3 nanoplatelets: a femtosecond transient absorption spectroscopic study.

CsPbBr3 nanoplatelets (NPLs), as some of the two-dimensional lead halide perovskites, have been intensively investigated due to their outstanding photophysical and photoelectric properties. However, there remain unclear fundamental issues on their carrier kinetics and the low-energy tail in their photoluminescence (PL) spectrum. In this paper, we synthesized CsPbBr3 NPLs with five [PbBr6]4- monolayers and performed comprehensive studies by using steady-state absorption, PL, and femtosecond transient absorption (fs-TA) spectroscopic measurements. We determined both the biexciton Auger recombination time (7 ± 2 ps) and trapped exciton lifetime (110 ± 15 ps) of the five monolayer CsPbBr3 NPLs. We also investigated the origin of the low-energy tail emission in their PL spectrum. More importantly, we found that a negative ΔA feature in the energy range of 2.45-2.55 eV appears in their fs-TA spectrum at 2, 4 and 10 ps delay times, which could help them act as a laser gain medium. The low-energy tail emission in their PL spectrum overlaps well with the negative ΔA feature in the energy range of 2.45-2.55 eV in their fs-TA spectrum at 2, 4 and 10 ps delay times.

WITHDRAWN: Design of a novel 1-bit full adder with hybrid logic for full-swing, area-efficiency, and high-speed

In this paper, we propose a hybrid full-swing adder (HFSA) circuit that uses the hybrid full-swing logic (HFSL) technique, which consists of 20 transistors. This circuit relies heavily on a 12-transistor XOR-XNOR circuit to optimize the area and power. Our novel XOR-XNOR circuit plays a crucial role in achieving high-efficiency HFSA circuits. It integrates 2-to-1 multiplexers, pass transistor logic, and inverters to deliver glitch-free full-swing outputs. We compared the efficiency and practicality of our design with those of 10 alternatives by considering their performances and characteristics. Our novel XOR-XNOR circuit surpassed its counterparts with an exceptional chip area reduction of 14.14–28.01 %, an average power of 2.44 μW, and remarkably low delays of 25.88 and 24.87 ps. Notably, the proposed full adder achieved a chip area reduction of 11.30–49.69 %, 3.582 μW power, and a 72.66 ps delay. It emphasizes large-scale structures, such as 4-bit to 64-bit full adders, implemented using cascaded designs with a novel ripple carry adder. Using multipoint and Monte Carlo analysis in the ADEXL design suite to ensure the reliability of all circuits using the Cadence Virtuoso with the GPDK45 nm technology. The proposed method is an alternative to high-speed electronic systems with potential benefits.

Design of Low Power 64-Bit Hybrid Full Adder

Abstract: In the realm of Computer Science, integrated circuits (ICs) have propelled microprocessor and digital signal processor development, hinging on the 1-bit full adder's significance for mathematical tasks. To amplify overall efficiency, enhancing this adder is pivotal. As demand surges for power-efficient devices like smartphones and MP3 players, maintaining a balance between speed, size, and power usage becomes imperative. Engineers tackle this challenge while bridging battery technology gaps. We propose advanced 1-bit full adder designs, evaluated via Cadence Virtuoso. A hybrid version merges Pass-Transistor Logic (PTL), Transmission Gates (TGs), and static CMOS logic. An optimized alternative incorporates efficient 3T-XOR logic. The comparative study considers crucial metrics: the existing FA’s 8.83µW power vs. the proposed's 8.49µW; the proposed's shorter delay of 64.53ps vs. the existing FA’s 83.1ps (18 vs. 22 transistors). At 64 bits, the existing FA’s consumes 66.8µW with a 470.94ps delay (1408 transistors), while the proposed maintains 35.05µW, 64.53ps, and fewer transistors (1152). In summary, the proposed adder excels in efficiency, delay, and transistor use for energy-efficient arithmetic operations.

A Novel Framework of Genetic Algorithm and Spectre to Optimize Delay and Power Consumption in Designing Dynamic Comparators

In integrated circuit (IC) design, analog circuits contribute significantly as the interface between real and digital world signals. Although they make up a relatively small portion of the overall circuit, their design process is often most time-consuming, mostly from the phase of manual iteration of circuit parameters to meet design specifications. Therefore, the design automation of analog circuits with the help of efficient optimization techniques arises as a promising candidate to address the issue. Among optimization algorithms, while the genetic algorithm (GA) has been shown to be effective in finding near-optimal solutions, it has not been extensively applied to the field of analog circuit design. Hence, this paper proposes a method to utilize GA in the optimization of a widely used circuit topology, namely the comparator. The comparator is considered the fundamental block in the design of most analog-to-digital converters (ADCs). For high-speed ADCs, dynamic comparators are usually chosen for the purpose of high speed and power efficiency. In summary, this paper introduces an innovative GA-Spectre architecture to optimize the dynamic comparator with respect to delay and power consumption. The post-optimized results are optimistic with a 72.61 ps delay and 3.11 µW power dissipation.

Long-lasting deformation potential effect in Ge induced by UV photoexcitation

Understanding ultrafast response of a semiconductor is necessary for next-generation optoelectronic device applications. Here, we investigate the ultrafast response of an archetypal semiconductor Ge [111] crystal upon photoexcitation at two pump wavelengths, 800 nm (fundamental) and 400 nm (second harmonic, UV radiation), using time-resolved x-ray diffraction (TXRD). The simulated TXRD profiles using a proposed four-layer model and Takagi–Taupin equations reveal that the strain propagation is primarily due to electron diffusion. Intriguingly, the initial (<100 ps) fast decrease in the induced strain for second harmonic excitation suggests that the strain originates from the deformation potential (DP) effect. The higher photon energy (second harmonic pump) excites the electrons to higher conduction band valleys, resulting in DP-induced strain compared to the fundamental pump, which only generates thermo-elastic strain. The DP strain, estimated from the DP coefficient (simulated via density functional theory-based electronic structure simulations) and electron density (simulated from experimental results), shows an excellent agreement with the observed strain. The strain after ∼100 ps delay for second harmonic excitation and strain from fundamental excitation are attributed to the thermo-elastic effect as confirmed by the density-dependent two-temperature model. Our study reveals the long-lasting DP effect in Ge [111], which provides an opportunity to avoid heating in optoelectronic devices due to the thermo-elastic effect at the initial time scale.

A single-shot pump-probe technique for measuring ultrafast absorption dynamics in a single-beam basis

We demonstrate a single-shot pump-probe technique in a single-beam basis. A transmissive annular echelon is used to spatially encode a single pulse, and generates a pump pulse and a probe pulse train with approximately 8 ps delay time and 40 fs time interval. Using this technique, we studied the ultrafast absorption dynamics of ZnSe at a wavelength of 515 nm. And our results indicate the ZnSe has an ultrafast two-photon absorption process and a slow carrier absorption process at 515 nm. In addition, with the help of a neutral density filter (ND), we also investigated the effect of probe intensity on the experimental results.

Silicon Photonic Phase-Diverse Receiver Enabling Transmission of >Net 250 Gbps/λ Over 40 km for High-Speed and Low-Cost Short-Reach Optical Communications

The fast growth of data traffic in short-reach optical communications drives the demand for high-speed and low-cost optical modules. Here we demonstrate a silicon photonic (SiP) phase-diverse receiver based on our recently proposed asymmetric self-coherent detection (ASCD) scheme with Mach-Zehnder interferometers (MZI). The SiP MZI-ASCD receiver has a hardware-efficient architecture and recovers complex double-sideband signals via the beatings between a signal portion and a delayed signal portion from an asymmetric MZI using only 2 single-ended photodiodes and 2 analog-to-digital converters. The removal of the local oscillator in the direct detection receiver enables low-cost uncooled lasers, whereas the phase diversity closes the gap with coherent detection in terms of electrical spectral efficiency (ESE). Using a SiP MZI-ASCD receiver with a 15 ps delay, we detect a 60 Gbaud single-polarization 16-QAM signal transmitted over 40 km of single-mode fiber (SMF) below 20% overhead (OH) SD-FEC threshold of 2×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> with a net bit rate of 200 Gbps and a record net ESE of 5.86 b/s/Hz per wavelength per polarization. Using a SiP MZI-ASCD receiver with a different delay of 7.5 ps, transmission of single-polarization 16-QAM DSB signal up to 80 Gbaud over 40 km is achieved below 24% OH SD-FEC threshold of 4.5×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> with a record net bit rate of 258 Gbps and a net ESE of 5.31 b/s/Hz per wavelength per polarization.

Analysis of picosecond coherent anti-Stokes Raman spectra for gas-phase diagnostics

We present a hybrid frequency- and time-domain solution, applicable to the case of picosecond coherent anti-Stokes Raman scattering (CARS), for gas-phase diagnostics. A solution has been derived based on both physical arguments and four-wave mixing equations for picosecond CARS, with pulse durations that are comparable to the dephasing time scale for gas-phase Raman coherence—a regime where commonly employed solutions for impulsive (femtosecond) or cw (nanosecond) pump/Stokes forcing are not strictly valid. We present the ps-CARS spectrum in the form of incoherent sums of CARS intensity spectra, calculated from the fundamental solution for impulsive pump/Stokes Raman preparation. The solution was examined for temperatures from 1000–3000 K, for four plausible experimental configurations, with laser pulse durations of 50–150 ps, and probe pulse delays from −20 to 240 ps. Approximations based on cw and impulsive pump/Stokes preparation to fit picosecond CARS spectra at atmospheric pressure were examined and the relative thermometric accuracy and computational cost of these approximations were quantified for the case of a zero nonresonant CARS contribution, and a nonresonant susceptibility equal to 10% of the Raman-resonant value at the N2 bandhead. The nanosecond CARS approximation can result in large fitting errors when the probe pulse time delay is less than the probe pulse duration. Errors as large as 10–20% are observed in the fit temperatures for a zero picosecond probe pulse delay, when the nonresonant background is neglected, largely due to an inability of the time-independent cw model to capture transient frequency spread dephasing effects at the Q-branch bandhead. The inclusion of a nonresonant background results in 40–60% thermometry errors with a nanosecond model at a zero-probe delay. Time-dependent impulsive calculations used for femtosecond CARS better approximate the structure of the N2 bandhead, reducing temperature fitting errors to 5–10% at a short probe pulse delay. The impulsive approximation results in errors up to 10% at intermediate probe pulse delays, where the coherence of the pump and probe pulses leads to multiple terms in the picosecond CARS solution. Both approximations improve as the probe pulse delay exceeds the probe duration. The nanosecond approximation results in a 2–3% error, while the impulsive model results in differences of less than 1% in some cases. Fits to experimental data obtained using short, ∼60ps pulses at a zero probe time delay and longer 100 ps pulses at a substantial 200 ps delay are presented with accuracies of 1–3% in the fit temperature.

A PVT resilient true‐time delay cell

AbstractA true‐time delay (TTD) cell in TSMC 0.18 μm CMOS technology for 1–5 GHz applications is presented. Process variations, ageing effects, field variations, and other non‐idealities have some impacts on the TTD cell's devices. One of the vulnerable specifications of TTD cells is their delay variation. While the TTD cell works in a delay line, the cell must have a constant and robust delay in the frequency band. For this matter, the body bias technique is presented and applied to the inductor‐less TTD cell. With this technique, the threshold voltage can be manipulated intentionally. So, any variation in this voltage can be compensated with the body biasing of transistors. The simulation results show the TTD cell's robust performance against non‐idealities, while delay variation improves more than 3× times in the frequency band of interest. This TTD cell provides a 50.95 pS delay with only 2% variation, while S11 and S22 parameters are lower than −10 dB in the 1–5 GHz frequency band. IIP3 of the TTD cell is about 2.7 dBm, and the power consumption is 20.5 mW.

A High Performance Silicon Nitride Optical Delay Line With Good Expansibility

In this paper, based on the double strip silicon nitride platform, we designed and fabricated a low loss continuously tunable broadband optical delay line, which contains a 5-bit optical switched delay line and a single tunable optical ring resonator working at “off-resonance”. Optical double sideband modulation link measurement results show it can achieve continuous delay tuning of 395.5 ps and in-band delay fluctuations of about 4 ps and 1 ps were obtained in 8 GHz and 5 GHz working bandwidths, respectively. In addition, the proposed optical delay line has a low on-chip insertion loss of 3 dB and a very low optical loss delay ratio of 0.0022 dB/ps. Moreover, it's delay tuning range can be easily increased by cascading more thermo-optic switches. The delay bandwidth can be expanded by adopting the optical single sideband modulation or increasing the FSR of the optical ring resonator. This integrated tunable optical delay line with good overall performances and expand ability shows great potential for microwave photonic applications.

Dynamical Effects of Excess Carriers on SOI FeFET Memory Device Operations

We study the carrier dynamics of memory program (PGM) and readout operations for an n-type silicon-on-insulator (SOI) ferroelectric field-effect transistor (FeFET) through TCAD simulations. We found that gate-induced drain leakages (GIDL) during the PGM operation with large negative gate biases can result in excess hole concentrations as high as 7.3 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times 10^{{20}}$ </tex-math></inline-formula> cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-{3}}$ </tex-math></inline-formula> in the potential well formed in the SOI channel. The hole accumulation causes a large electric field across the ferroelectric (FE) layer and results in a polarization boost at a low PGM voltage. For a nano-scale SOI channel, the retention time of the excess holes can exceed microseconds according to our simulations. The outflow of the excess holes leads to a transient effect in the drain current during the readout operation, and we observed additional retention effects for the FeFET memory window due to the hole dynamic effects on the electrostatics and the FE polarizations. While the excess holes result in a ~100 ps delay in the readout phase before a large read margin can be detected, they have boosted the PGM speed and polarization window. The boosted polarization can be retained for milliseconds, and potentially beyond, resulting in an appreciable ON/OFF ratio during readout. Therefore, such effects can be utilized for low-power memory applications through proper SOI FeFET designs with the awareness of excess carrier dynamics.

Broadband 1×8 Optical Beamforming Network Based on Anti-resonant Microring Delay Lines

We demonstrate a 1×8 binary tree optical beamforming network (OBFN) chip for a microwave photonic phased array antenna. The OBFN is formed by cascading multiple microring resonators (MRRs) working at the anti-resonant wavelengths. The binary tree topology reduces the MRR amount by reusing the MRRs in the preceding stage, and the anti-resonant MRRs realize continuous delay tuning with a reduced in-band delay fluctuation. The delay adjustment is achieved by digitally tuned MRRs and one continuously tuned MRR in each stage with an improved operating bandwidth. The random initial states of the MRRs are calibrated to produce a flat delay response. Experimental results show that the maximum delay is 560 ps. The beamforming performance of the OBFN is evaluated in 20 ps and 45 ps delay increments. In an 8-GHz operating bandwidth, the maximum delay fluctuation is less than 7.6 ps. The capability of our delay lines to suppress the delay ripple encountered in conventional on-resonance delay lines opens exciting opportunities for the development of compact integrated broadband OBFNs demanded in broadband microwave phased array antennas.

Temperature characterizations of silica asymmetric Mach-Zehnder interferometer chip for quantum key distribution

Quantum key distribution (QKD) system based on passive silica planar lightwave circuit (PLC) asymmetric Mach–Zehnder interferometers (AMZI) is characterized with thermal stability, low loss and sufficient integration scalability. However, waveguide stresses, both intrinsic and temperature-induced stresses, have significant impacts on the stable operation of the system. We have designed silica AMZI chips of 400 ps delay, with bend waveguides length equalized for both long and short arms to balance the stresses thereof. The temperature characteristics of the silica PLC AMZI chip are studied. The interference visibility at the single photon level is kept higher than 95% over a wide temperature range of 12 °C. The delay time change is 0.321 ps within a temperature change of 40 °C. The spectral shift is 0.0011~nm/0.1 °C. Temperature-induced delay time and peak wavelength variations do not affect the interference visibility. The experiment results demonstrate the advantage of being tolerant to chip temperature fluctuations.

A Low Insertion Loss Variation Trombone True Time Delay in GaAs pHEMT Monolithic Microwave Integrated Circuit

A wideband true time delay is proposed based on 0.25- μm GaAs pHEMT technology. The novel trombone topology is adopted for achieving low variation in insertion loss of different delay states. The fourth-order and second-order inductive all-pass networks (APNs) are operating as delay cells between input and output lines. By selecting different transmission ways, 3 bit with the step of 14 ps and maximum delay range of 98 ps are realized. Measurement results show the insertion loss of 3.8-10.5 dB over the frequency bandwidth of 6-16 GHz. The variation in insertion loss is less than ±1.4 dB. The chip area with pads is 1.955 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the power consumption is 110 mW.

Crustal Thinning From Orogen to Back‐Arc Basin: The Structure of the Pannonian Basin Region Revealed by P‐to‐S Converted Seismic Waves

AbstractWe present the results of P‐to‐S receiver function analysis to improve the 3D image of the sedimentary layer, the upper crust, and lower crust in the Pannonian Basin area. The Pannonian Basin hosts deep sedimentary depocentres superimposed on a complex basement structure and it is surrounded by mountain belts. We processed waveforms from 221 three‐component broadband seismological stations. As a result of the dense station coverage, we were able to achieve so far unprecedented spatial resolution in determining the velocity structure of the crust. We applied a three‐fold quality control process; the first two being applied to the observed waveforms and the third to the calculated radial receiver functions. This work is the first comprehensive receiver function study of the entire region. To prepare the inversions, we performed station‐wise H‐Vp/Vs grid search, as well as Common Conversion Point migration. Our main focus was then the S‐wave velocity structure of the area, which we determined by the Neighborhood Algorithm inversion method at each station, where data were sub‐divided into back‐azimuthal bundles based on similar Ps delay times. The 1D, nonlinear inversions provided the depth of the discontinuities, shear‐wave velocities and Vp/Vs ratios of each layer per bundle, and we calculated uncertainty values for each of these parameters. We then developed a 3D interpolation method based on natural neighbor interpolation to obtain the 3D crustal structure from the local inversion results. We present the sedimentary thickness map, the first Conrad depth map and an improved, detailed Moho map, as well as the first upper and lower crustal thickness maps obtained from receiver function analysis. The velocity jump across the Conrad discontinuity is estimated at less than 0.2 km/s over most of the investigated area. We also compare the new Moho map from our approach to simple grid search results and prior knowledge from other techniques. Our Moho depth map presents local variations in the investigated area: the crust‐mantle boundary is at 20–26 km beneath the sedimentary basins, while it is situated deeper below the Apuseni Mountains, Transdanubian and North Hungarian Ranges (28–33 km), and it is the deepest beneath the Eastern Alps and the Southern Carpathians (40–45 km). These values reflect well the Neogene evolution of the region, such as crustal thinning of the Pannonian Basin and orogenic thickening in the neighboring mountain belts.

The behaviour of sapphire under intense two-colour excitation by picosecond laser

Ultrashort pulse lasers are evidencing their benefits in the processing of transparent materials. Sapphire is one of the most attractive engineering materials today. It is hard and, therefore, difficult to machine mechanically to the required shape. Laser dicing is one of the promising techniques for sapphire separation. Two-pulse two-colour irradiation was applied to initiate free-shape cutting of the material. Two collinear laser beams with wavelengths of 1064 and 355 nm, pulse duration of 10 ps and inter-pulse delay of 0.1 ns were combined to induce intra-volume modifications (directional cracks) in sapphire for wafer separation. The photon energy of both beams is well below the band gap, and various channels of the multi-photon excitation were involved in the process. Significant enhancement in the modification area was experimentally observed when intensities of focused infrared and ultraviolet beams were within narrow ranges. We discuss the resonant laser–sapphire interaction mechanisms, leading to up to four times higher excitation of the material involving multiple photons and energetic levels of intrinsic defects in the band-gap. The energy level schemes of colour centres involved in two-step multi-photon absorption in sapphire under intensive laser irradiation have been prepared.

CMOS Implementation of a Novel High Speed 4:2 Compressor for Fast Arithmetic Circuits

This paper deals with the design and analysis of a new 4-2 compressor which can be used in high-speed multipliers. The proposed compressor features eliminated glitch at the output waveform. By optimum tuning of the width of the transistors, C out is produced more quickly, and therefore higher operating speeds can be achieved. The effect of process variation on the circuit has been studied and a new structure is proposed to overcome the effect of process variation by utilizing a reference voltage generator circuit. A 32 × 32-bit multiplier has been developed utilizing these compressors in order to evaluate the new compressor in a practical environment. The total multiplier circuit was simulated with HSPICE simulator (BSIM3v3 parameters) using CMOS standard cell library of 0.18 µm and the Layouts were extracted with Cadence Virtuoso v 5.1 Layout Plus tool. The simulation results represent 185 × 10−3 pj Power-Delay-Product (PDP) and 40 pj × ps Energy Delay Product (EDP) with 221 ps delay from input to output.

Analysis and Design of On-Chip RF Interconnect Line for Wideband True-Time Delay Line Application

This paper presents the analytical resistance–capacitance–inductance–conductance (RLCG) model of the on-chip interconnect line (IL) based on its structure, and the proposed model can be used to design IL and analyze the delay characteristics. Using electromagnetic (EM) simulation, the relations between the inductance, quality factor and the width, length of IL are obtained, which verifies the proposed RLCG model of IL. The delay model of IL is derived and verified with respect to the effects of the [Formula: see text] and [Formula: see text] by simulation, which can provide the benefit for the true-time delay line (TTDL) design using IL. This work proposes the experiments on the delay characteristics of 3-bit TTDL with IL based on 0.13[Formula: see text][Formula: see text]m SiGe BiCMOS technology. The group delay and transient delay of the TTDL are measured, which exhibits a maximal relative delay of 35 ps with an average of 5 ps delay resolution over a frequency range of 14–34[Formula: see text]GHz. The results are consistent with the delay analysis based on the proposed IL model.

On-chip tunable SOI interferometer for quantum random number generation based on phase diffusion in lasers

Quantum random number generators (QRNG) derive randomness from quantum mechanical processes and therefore are considered a reliable source of randomness. However large size, high cost and instability issues due to conventional bulk, fiber or free space implementations restrict widespread use into complex systems and significantly affect the scalability and reliability of such solutions. Recently there has been a huge interest in photonic integration technologies for quantum optics in order to overcome aforementioned issues. We report demonstration of a QRNG based on phase diffusion in gain switched (GS) lasers. It produces random numbers by translating random phases of GS pulses (generated at 2.5 GHz rate) into amplitude fluctuations using a packaged on-chip silicon on insulator (SOI) tunable unbalanced Mach–Zehnder interferometer (uMZI). The 400 ps delay line in uMZI has been specially designed by using the combination of multi-mode and single mode waveguides to reduce the losses. The combination of tunable loss control (balancing), low waveguide losses and shorter delay improve interference quality and increase random number generation rates to gigabit scale. The mid-way and output monitoring ports on the chip can potentially be used for health checks to improve the long-term stability and reliability of QRNG in line with NIST recommendations for entropy source. True random numbers are extracted by offline post processing of the raw data. The extracted random numbers show low correlation coefficients and passed all NIST randomness tests achieving 10 Gb/s generation rate.