Proprietary Hardware Research Articles

SU‐F‐BRD‐13: Quantum Annealing Applied to IMRT Beamlet Intensity Optimization

Purpose:We report on the first application of quantum annealing (QA) to the process of beamlet intensity optimization for IMRT. QA is a new technology, which employs novel hardware and software techniques to address various discrete optimization problems in many fields.Methods:We apply the D‐Wave Inc. proprietary hardware, which natively exploits quantum mechanical effects for improved optimization. The new QA algorithm, running on this hardware, is most similar to simulated annealing, but relies on natural processes to directly minimize the free energy of a system. A simple quantum system is slowly evolved into a classical system, representing the objective function. To apply QA to IMRT‐type optimization, two prostate cases were considered. A reduced number of beamlets were employed, due to the current QA hardware limitation of ∼500 binary variables. The beamlet dose matrices were computed using CERR, and an objective function was defined based on typical clinical constraints, including dose‐volume objectives. The objective function was discretized, and the QA method was compared to two standard optimization Methods: simulated annealing and Tabu search, run on a conventional computing cluster.Results:Based on several runs, the average final objective function value achieved by the QA was 16.9 for the first patient, compared with 10.0 for Tabu and 6.7 for the SA. For the second patient, the values were 70.7 for the QA, 120.0 for Tabu, and 22.9 for the SA. The QA algorithm required 27–38% of the time required by the other two methods.Conclusion:In terms of objective function value, the QA performance was similar to Tabu but less effective than the SA. However, its speed was 3–4 times faster than the other two methods. This initial experiment suggests that QA‐based heuristics may offer significant speedup over conventional clinical optimization methods, as quantum annealing hardware scales to larger sizes.

Cider

We present Cider, an operating system compatibility architecture that can run applications built for different mobile ecosystems, iOS or Android, together on the same smartphone or tablet. Cider enhances the domestic operating system, Android, of a device with kernel-managed, per-thread personas to mimic the application binary interface of a foreign operating system, iOS, enabling it to run unmodified foreign binaries. This is accomplished using a novel combination of binary compatibility techniques including two new mechanisms: compile-time code adaptation, and diplomatic functions. Compile-time code adaptation enables existing unmodified foreign source code to be reused in the domestic kernel, reducing implementation effort required to support multiple binary interfaces for executing domestic and foreign applications. Diplomatic functions leverage per-thread personas, and allow foreign applications to use domestic libraries to access proprietary software and hardware interfaces. We have built a Cider prototype, and demonstrate that it imposes modest performance overhead and runs unmodified iOS and Android applications together on a Google Nexus tablet running the latest version of Android.

Cider

We present Cider, an operating system compatibility architecture that can run applications built for different mobile ecosystems, iOS or Android, together on the same smartphone or tablet. Cider enhances the domestic operating system, Android, of a device with kernel-managed, per-thread personas to mimic the application binary interface of a foreign operating system, iOS, enabling it to run unmodified foreign binaries. This is accomplished using a novel combination of binary compatibility techniques including two new mechanisms: compile-time code adaptation, and diplomatic functions. Compile-time code adaptation enables existing unmodified foreign source code to be reused in the domestic kernel, reducing implementation effort required to support multiple binary interfaces for executing domestic and foreign applications. Diplomatic functions leverage per-thread personas, and allow foreign applications to use domestic libraries to access proprietary software and hardware interfaces. We have built a Cider prototype, and demonstrate that it imposes modest performance overhead and runs unmodified iOS and Android applications together on a Google Nexus tablet running the latest version of Android.

ENGLISH

In this world of fast growing technology all the monitoring systems require the features like high performance instrumentation, low-cost primary sensors, online signal processing, portability, and versatility. Introduction of smart sensor comes up with all these features. Commercially available monitoring equipment cannot easily achieve versatility and portability. But smart sensor approach will increase the performance and overcome costs in monitoring systems. They use standard off-the-shelf sensors and add signal processing, communication and integration capabilities in their functionality. This paper proposes implementation of real time system-on-chip (SOC) based smart sensor for time-frequency analysis of the signals like voltage, electric current and vibrations by applying discrete wavelet transform (DWT) on field programmable gate array(FPGA). The proposed smart sensor uses a proprietary hardware processing unit. This unit includes a multiplier accumulate unit (MAC) for computing real time discrete wavelet transform for all the input signals. The proposed designs of MAC uses a modified booth multiplier and carry save adder for area optimization and propagation delay. This design can connect to different primary sensors without additional instrumentation and shows obtained results in 2-D view on a video graphics array screen or liquid crystal display. For presentation purposes, hardware computed results will be sending to a PC through an RS232 interface and plotting in MATLAB. The SOC-based smart sensor module will be designing and developing in Xilinx 12.2 ISE using VHDL and simulating in Modelsim 6.3f.

Reconfigurable SoC-Based Smart Sensor for Wavelet and Wavelet Packet Analysis

Modern monitoring systems require high-performance instrumentation, low-cost primary sensors, online signal processing, portability, and versatility. Smart sensor utilization is an approach to comply with these features. From an industrial point of view, voltage, electric current, and vibrations are signals commonly analyzed during system monitoring, and wavelet and wavelet packet transforms are popular techniques for extracting time-frequency information from these signals. Here, a system-on-chip-based smart sensor with reconfigurable architecture is proposed for time-frequency analysis applying either wavelet or wavelet packet transform. The proposed smart sensor uses a proprietary hardware processing unit and a custom embedded microprocessor. It can connect to different primary sensors without additional instrumentation and shows obtained results in a 2-D or 3-D view on a video graphics array screen or liquid crystal display. Obtained results from three different study cases demonstrate that the proposed smart sensor is able to show online and in real-time the frequency evolution effects in time-varying signals.

Delay-Tolerant, Low-Power Protocols for Large Security-Critical Wireless Sensor Networks

This paper reports the analysis, implementation, and experimental testing of a delay-tolerant and energy-aware protocol for a wireless sensor node, oriented to security applications. The solution proposed takes advantages from different domains considering as a guideline the low power consumption and facing the problems of seamless and lossy connectivity offered by the wireless medium along with very limited resources offered by a wireless network node. The paper is organized as follows: first we give an overview on delay-tolerant wireless sensor networking (DTN); then we perform a simulation-based comparative analysis of state-of-the-art DTN approaches and illustrate the improvement offered by the proposed protocol; finally we present experimental data gathered from the implementation of the proposed protocol on a proprietary hardware node.

Human Friendly Interface Design for Virtual Fitting Room Applications on Android Based Mobile Devices

This paper presents an image processing design flow for virtual fitting room (VFR) applications, targeting both personal computers and mobile devices. The proposed human friendly interface is implemented by a three-stage algorithm: Detection and sizing of the user's body, detection of reference points based on face detection and augmented reality markers, and superimposition of the clothing over the user's image. Compared to other existing VFR systems, key difference is the lack of any proprietary hardware components or peripherals. Proposed VFR is software based and designed to be universally compatible as long as the device has a camera. Furthermore, JAVA implementation on Android based mobile systems is computationally efficient and it can run in real-time on existing mobile devices.

Medusa: a scalable MR console using USB.

Magnetic resonance imaging (MRI) pulse sequence consoles typically employ closed proprietary hardware, software, and interfaces, making difficult any adaptation for innovative experimental technology. Yet MRI systems research is trending to higher channel count receivers, transmitters, gradient/shims, and unique interfaces for interventional applications. Customized console designs are now feasible for researchers with modern electronic components, but high data rates, synchronization, scalability, and cost present important challenges. Implementing large multichannel MR systems with efficiency and flexibility requires a scalable modular architecture. With Medusa, we propose an open system architecture using the universal serial bus (USB) for scalability, combined with distributed processing and buffering to address the high data rates and strict synchronization required by multichannel MRI. Medusa uses a modular design concept based on digital synthesizer, receiver, and gradient blocks, in conjunction with fast programmable logic for sampling and synchronization. Medusa is a form of synthetic instrument, being reconfigurable for a variety of medical/scientific instrumentation needs. The Medusa distributed architecture, scalability, and data bandwidth limits are presented, and its flexibility is demonstrated in a variety of novel MRI applications.

Towards a security architecture for IP-based optical transmission systems

Optical cross-connect systems with several terabits of switching capacity are critical components of today's communication networks. Because of their central role within the telecommunication infrastructure, along with their remote management capabilities, high-capacity network nodes are potential targets of attacks. Built upon proprietary hardware and software components in the past, such systems increasingly make use of standard technology today. The Linux operating system has become a widely-used standard for embedded communication controllers, and similarly the Internet Protocol is widely used for both internal and external data exchange. In this paper, we establish a threat model for transmission network nodes employing these open source technologies. Based upon functional models of such systems, we then introduce security requirements for functional components and their communication with respect to that threat model, thereby forming a security architecture for transmission systems. We further propose security zones to strictly segregate sensitive internal communication from external traffic.

High Efficiency, Large Area, Nanocrystalline Silicon Based, Triple-Junction Solar Cells

ABSTRACTWe have fabricated large-area, thin-film multijunction solar cells based on hydrogenated amorphous silicon (a-Si:H) and nanocrystalline silicon (nc-Si:H) made in a large area batch reactor. The device structure consisted of an a-Si:H/nc-Si:H/nc-Si:H stack on Ag/ZnO back reflector coated stainless steel substrate, deposited using our proprietary High Frequency (HF) glow discharge technique. For the nc-Si:H films, we investigated two deposition rate regimes: (i) low rate <1 nm/s and (ii) high rate >1 nm/s. We optimized the deposition parameters, such as pressure, gas flow, dilution, and power. We did SIMS analysis on the optimized films, and found the impurity concentrations were one order of magnitude lower than the films made with the conventional RF process. In particular, the oxygen concentration is reduced to ~1018 cm-3. This value is among the lowest oxygen concentration reported in literature. The low impurity content is attributed to proprietary cathode hardware and the optimized deposition process. During the initial optimization and investigative phase, we fabricated small-area (0.25 cm2 and 1.1 cm2) cells. The information obtained from the initial phase was used to fabricate large-area (aperture area 400 cm2) cells, and encapsulated the cells using the same flexible encapsulants that are used in our commercial product. We have light soaked the low-rate and high-rate encapsulated modules. The highest initial efficiency of the low-rate modules is 12.0% as confirmed by NREL. The highest corresponding stable efficiency attained for the low-rate samples cells is 11.35%. For the high-rate small-area (1.1 cm2) cells, the highest initial active-area efficiency and corresponding stable efficiency attained are 13.97% and 12.9%, respectively. We present the details of the research conducted to develop the low- and high-rate cells and modules.

A Load Balancing Technique for Wireless LANs

Throughput maximization in a network is one of the major key challenges in wireless LANs (WLANs) and it could be achieved when the load of access points (APs) is balanced. The AP load in WLANs is very often found to be uneven. To overcome such imbalance of load, a load balancing technique have been proposed. The load balancing techniques commonly require proprietary software or hardware at the user side for controlling the user-AP association. A new load balancing technique by controlling the size of WLAN cells (i.e., AP’s coverage range), which is conceptually similar to cell breathing in cellular networks. The proposed scheme does not require any modification from the user side nor may any changes be required to the IEEE 802.11 standard [1]. It only requires the ability of dynamically changing the transmission power of the AP beacon messages. We develop a newer load balancing algorithm that will find the optimal beacon power settings which will thereon help to minimize the load of the most congested AP. The load may become shared and this may be performed with minimal delay and also maximized throughput is to be achieved. Keywords: Network throughput, Access points, WLAN, Beacon Messages, Load balancing, Throughput, Wireless LANs.

Conditions favouring the introduction of positive switching costs for adopters of abstract compatibility standards

Research shows vendors manipulate open standards to introduce positive switching costs for product users. This article explores the possibility of manipulating abstract vertical compatibility standards based on the eXtensible Markup Language (XML) to create switching costs for adopters. Vertical standards formalise business processes and data formats unique to specific industries. Manipulating vertical standards does not optimise or enhance proprietary hardware capabilities since vertical standards are not embedded in physical products, and any manipulation is easily detected and quite correctable, so it is unclear whether positive switching costs can be introduced by any supplier. This paper describes why vertical standards are not immune to manipulation, and explores some conditions which may make the manipulation of purely abstract compatibility standards possible. A series of testable propositions are presented, and evidence that shows asymmetries exist to permit the introduction of positive switching costs is discussed. Further research in this area is discussed.

FPGA-Based Vibration Analyzer for Continuous CNC Machinery Monitoring With Fused FFT-DWT Signal Processing

The industry of machine tools keeps a constant progress that responds to the most demanding market requirements, such as production-time decreasing and zero-defect manufacturing. As part of this progress, sensors and monitoring instruments have been integrated on machine tools, improving computer numerical control (CNC) and monitoring during the manufacturing process. The vibrations are one of the most significant variables to be monitored on machine tools since they directly affect the end piece finishing, tool life expectancy, general machine-tool condition, current consumption, etc. Time domain, fast Fourier transform (FFT), and discrete wavelet transform (DWT) are techniques often used for vibration analysis, because they are computationally efficient for online implementation; unfortunately, it is difficult to find an instrument for vibration analysis that allows individually applying the time, FFT, and DWT techniques, and their fusion. Moreover, the lack of instruments with characteristics such as open architecture, low cost, parallel processing, and continuous online monitoring is remarkable. The contribution of this work consists of developing a vibration-analysis instrument based on the time, FFT, DWT, and DWT-FFT fusion techniques. The instrument is implemented into a low-cost field-programmable gate array with proprietary hardware signal-processing cores in parallel for achieving real-time and continuous online analysis. Experimentation is done to show the proposed methodology efficiency and the developed-instrument versatility, focusing on industrial control applications for CNC machine tools.

Studies on e-transaction using the technology of automatic eller machine by bank customers in north west geographical zone of Nigeria

E-transaction is becoming prominent in banking operations in Nigeria with more Banks adopting this technology, in order to provide the growing population of customers with fast, accessible reliable and quality services; this paper analyses the attitude of customers toward the deployment and usage of Automatic Teller Machines (ATMs) in Kano, Katsina and Jigawa States of Nigeria. Questionnaire survey was used to collect information from the respondents the data was analyzed using descriptive statistical techniques. The study revealed that the level of adoption of this technology is high among the middle aged respondents compared to the aged. By enhancing the deployment of proprietary hardware, software and communication protocol platform of adequate quality greater number of people might use ATMs because of the convenience and accessibility offered by the usage of this new technology.

Hardware quality vs. network size in the home video game industry

This paper analyzes competition between multiple proprietary and incompatible hardware systems when indirect network effects are present and software is provided competitively by third party developers. A discrete-choice demand structure is employed within a game theoretic setting to allow for a continuum of market share possibilities. Empirical evidence supports the claim that excess inertia is not a pervasive problem. Two data sets covering the life of the home video game industry (yearly from 1976 to 2003 and monthly January 1995 to October 2007) yield three main results: (1) market share is 11.4 times more sensitive to hardware quality than network size, (2) the number of available games is 3.69 times more sensitive to hardware quality than network size, and (3) hardware quality has a larger impact than network size on the probability of hardware success.

Open and Standardized Resources for Smart Transducer Networking

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> IEEE 1451 standard is intended to address the smart transducer interfacing problem in network environments. Usually, proprietary hardware and software are a very efficient solution for implementing the aforementioned normative, although they can become expensive and inflexible. In contrast, the use of open and standardized resources for implementing the IEEE 1451 smart transducer interface standards is proposed in this paper. Tools such as Java and Phyton programming languages, Linux, low-cost programmable logic devices, personal computer resources, and Ethernet architecture were integrated to construct a network node based on the IEEE 1451 standard. The node can be used in systems based on the client–server communication model. The evaluation of the employed tools and experimental results are presented. </para>

Using virtualization for high availability and disaster recovery

Traditional high-availability and disaster recovery solutions require proprietary hardware, complex configurations, application-specific logic, highly skilled personnel, and a rigorous and lengthy testing process. The resulting high costs have limited their adoption to environments with the most critical applications. However, high availability and disaster recovery are becoming increasingly important in many environments that cannot bear the complexity and the expense involved. In this paper, we show that virtualization can be used to develop solutions that meet this market demand. We describe the recently released Virtual Availability Manager (VAM) product offering, which provides simplified availability solutions using Xen®-based virtualization, and which is available as part of the IBM Systems Director product. We present key design principles of VAM, explain its architecture and current capabilities, and describe the way it is being extended to enable recovery in case of disaster.

Cell Breathing Techniques for Load Balancing in Wireless LANs

Maximizing network throughput while providing fairness is one of the key challenges in wireless LANs (WLANs). This goal is typically achieved when the load of access points (APs) is balanced. Recent studies on operational WLANs, however, have shown that AP load is often substantially uneven. To alleviate such imbalance of load, several load balancing schemes have been proposed. These schemes commonly require proprietary software or hardware at the user side for controlling the user-AP association. In this paper we present a new load balancing technique by controlling the size of WLAN cells (i.e., AP's coverage range), which is conceptually similar to cell breathing in cellular networks. The proposed scheme does not require any modification to the users neither the IEEE 802.11 standard. It only requires the ability of dynamically changing the transmission power of the AP beacon messages. We develop a set of polynomial time algorithms that find the optimal beacon power settings which minimize the load of the most congested AP. We also consider the problem of network-wide min-max load balancing. Simulation results show that the performance of the proposed method is comparable with or superior to the best existing association-based methods.

Real-time monitoring and diagnosing in wire-electro discharge machining

This paper presents the design and development of a real-time monitoring and diagnostic system for diagnosing the degraded behaviour in wire-electro discharge machining. The detection in advance of the degraded behaviour is crucial since this can lead to the breakage of the cutting tool (the wire), reducing the process productivity and the required accuracy (Ho et al., Tools Manuf 44:1247–1259, 2004). This work presents the design and development of a real-time monitoring system that alerts the degraded behaviour. It can detect different types of degraded behaviours that have been previously identified during the analysis phase. Unlike other works found in the literature review, which are focussed on proprietary hardware, the present paper proposes a flexible real-time platform based on a commercial data acquisition board that can be easily configured for different purposes. It has been applied to develop a real-time monitoring and diagnostic system that uses virtual sensors to diagnose the degradation of the process. The results of this work show a satisfactory performance of the presented approach.

A practical implementation of indoor location-based services using simple WiFi positioning

This work addresses the gap regarding existing indoor location-awareness support solutions and their integration in real-world smart spaces composed of commodity mobile/fixed devices. The work describes experiences and lessons learnt in designing and implementing support for indoor location-based services within the framework of our research about smart space application platforms. The extensive usage of web technologies in our smart space application platform enables easy creation and mash-up of location based services in both ad hoc settings and interconnected environments. As for the indoor location sensing, the solution relies on a novel technique that is suitable for easy large-scale deployments on top of existing IEEE 802.11 wireless network infrastructures. The technique, which is based on received signal strength (RSS), is suitable for RSS measurements and location calculation to take place at the mobile terminal with minimum setup work. In addition, it does not require any proprietary hardware devices to be installed in the target environment. Experimental results, referring to different categories of mobile devices (commercial smartphones, PDAs and laptops), show that the technique performs quite well on commodity mobile devices in terms of power consumption and time required to calculate the indoor location.