In this paper, existing damage evolution models in the literature for the solder layer in microelectronics have been reviewed. A 2-D approximate semi-analytic time integration damage indicator model for Sn3.5Ag material solder interconnect in the power electronic module has been proposed. The proposed time dependent damage model is dependent on the inelastic strain, the accumulated damage at the previous time step, and the temperature. The strains were approximated semi-analytically. A numerical modeling methodology combined with the data from public domain for crack initiation and crack propagation of the Sn3.5Ag solder layer has been adopted to extract the parameter values of the proposed damage model. The proposed model has advantages over fatigue lifetime models as it instantaneously predicts the damage over time for any loading history. The damage model was compared with Ansys FEA tool-based damage prediction using Coffin Manson and Paris law fatigue models. The predicted damage value by the model is slightly higher than those models. Furthermore, this damage model does not need a time consuming numerical simulation to evaluate the damage model variables, which is an advantage.