Properties Of Graphene Field-effect Transistors Research Articles

Hysteretic behavior of all CVD h-BN/graphene/h-BN heterostructure field-effect transistors by interfacial charge trap

Superior electrical transport properties of graphene field-effect transistors (FETs) can be achieved when graphene is supported by a high-quality hexagonal boron nitride (h-BN) layer. The h-BN layer can serve as a high-performance insulator for a graphene channel to achieve high carrier mobility and to minimize doping effects on graphene by screening out the interaction with a gate oxide substrate. However, chemical vapor deposition (CVD) grown h-BN can have surface defects and impurities unlike mechanically exfoliated h-BN layers, which can result in completely different electrical transport properties of graphene FETs. In this study, we fabricated all CVD h-BN/graphene/h-BN FETs to explore how surface defects and impurities on the supporting h-BN layer can influence electrical transport properties of graphene. The presence of surface defects and impurities on the supporting h-BN layer, as revealed by Raman spectroscopy analysis, resulted in significant p-doping and hysteresis in the h-BN/graphene/h-BN FETs. Hysteresis in the FETs was induced by charge carrier trapping at the surface defects and impurities of the h-BN layer, which can be controlled by modulating a back-gate voltage. Based on the charge trapping mechanism on the surface of the h-BN, electrical charge states in all CVD h-BN/graphene/h-BN can be modulated dynamically by realizing two different resistance states (‘trap’ vs. ‘release’ states), which can be utilized as memristive devices or sensors.

Simulation of the Electrical and Thermal Properties of a Graphene Field Effect Transistor

In this paper, the electrical and thermal properties of Graphene field effect transistor (GFET) has been simulated by varying the width of graphene channel. Here, the electrical characteristics, like electron density, hole density, I-V Characteristics and charge carrier velocity profile in the channel region has been studied for three different values of graphene channel width: 1 nm, 2 nm and 5 nm. To analyse the thermal properties of the GFET device, the temperature profile of the graphene channel has been simulated for 100, 300 and 500K. After analysing the simulation of this characteristics, it is concluded that, both electrical and thermal properties of GFET can be improved by fabricating the channel with larger width in the GFET device.

Control of Aryldiazonium Reactions on Graphene Field-Effect Transistors

Introduction: Graphene field-effect transistors (G-FETs) can be used as chemical sensors or biosensors, but functionalization of the graphene surface is usually necessary to ensure specificity in analyte capture. Covalent adducts are desirable to ensure stability of the functionalization during multiple flow cycles. Among functionalization strategies, aryldiazonium salts are often chosen for their high reactivity with carbon allotropes. In single-walled carbon nanotubes, many studies have demonstrated spontaneous functionalization reactions with this reagent leading to the formation of covalent bonds [1] [2]. Signatures of the covalent bonds could be observed, notably via a strong diminution of conductance in electrical measurements and increase of D/G ratio intensity in Raman spectroscopy. In graphene, signatures of such spontaneous grafting reactions have been far less consistent. The nature of the bond seems to vary between chemisorption (covalent) to physisorption (non-covalent) [3], and the experimental parameters controlling the reaction are yet to be established and fully understood [4]. Methods and Results: Here we analyze the effect of this chemistry on the electrical properties of graphene field-effect transistors. First, we conducted an extensive review of published experiments and developed a theoretical framework to compare data obtained in different conditions (channel dimensions, reagent concentration and incubation time). From the aggregated dataset, we found that the electronegativity of the para- group seems to have little impact on the electrical response, which contrasts with conclusions found in the literature. We also found that the type of graphene (exfoliated, CVD or RGO) seems to have a much more dominant impact, which could explain strong differences between previous studies. We also argue that device-to-device variations are significant, and we propose an experimental design based on multiple G-FETs arrays and statistical analysis to unambiguously characterize the effect of aryldiazonium functionalization on graphene transport properties. Second, we performed a systematic experimental study on the use of electrical gating to control the reactivity of graphene to arydiazonium reactions. We used 4-carboxylbenzene diazonium tetrafluoroborate to functionalize in G-FETs made of CVD-grown graphene and operated using an immersed electrode in saline buffer. We varied the potential applied on the immersed gate during the functionalization reaction and monitored the resulting effect of the chemistry through electrical measurements and hyperspectral Raman imaging. We report a strong variation in the rate and yield of formation of covalent adducts with gate potential, in particular between gate potentials above and below the Dirac point of the graphene. Conclusion and Significance: By incorporating past and recent experiments in a theoretical model, we were able to characterize the impact of key parameters on the formation of covalent adducts on graphene by aryldiazonium salts. We discuss a mechanism to explain the difference in graphene reactivity to the aryldiazonium chemistry with electrostatic potential, between graphene types, as well as between graphene and carbon nanotubes. These results will be instrumental for improving the functionalization of graphene FETs with stable covalent adducts for chemical and biological sensing applications.

Modelling of transport properties of graphene field-effect transistor for sensor application

Modelling of transport properties of graphene field-effect transistor for sensor application

Modelling of transport properties of graphene field-effect transistor for sensor application

A dual-gated ultra-thin graphene field effect transistor (GFET) suitable for electronic sensing application is modelled. The applied simulation approach reproduces accurately the transport properties of the GFET characteristics and enables investigation of the influence of the different physical, biological and chemical factors. The simulation readouts and additional charges in the system are interpreted in the form of current-voltage characteristics and shift in Dirac peaks. These features could be extracted to predict the sensing mechanism of the GFET.

The evolution of surface cleanness and electronic properties of graphene field-effect transistors during mechanical cleaning with atomic force microscopy

The evolution of surface cleanliness and the electronic properties-Dirac voltage(VDirac), hysteresis and mobility (μ) of a graphene field-effect transistor (GFET)—were monitored by measuring lateral force microscopy and drain current (ID) as a function of gate voltage (VG), after mechanically cleaning the surface, scan-by-scan, with contact-mode atomic force microscopy. Both the surface cleanliness and the electronic properties evolved, showing a sudden improvement and then saturation for a mobility of around 2200 cm2 V−1 s−1. We found that the mobility suppression of the as-fabricated GFET deviated from a randomly distributed impurities model, which predicted a greater mobility than obtained from the measured VDirac. Therefore, the substrate impurities are excluded from the origins of the extraordinary suppression of the mobility, and the possible origin will be discussed.

Simulation of the Electrical and Thermal Properties of Graphene Field Effect Transistor

In this research work, the electrical and thermal properties of Graphene field effect transistor (GFET) has been simulated by varying the width of graphene channel. Here, the electrical characteristics, like electron density, hole density, I-V Characteristics and charge carrier velocity profile in the channel region has been studied for three different values of graphene channel width- 1 nm, 2 nm and 3 nm. To analyze the thermal properties of the GFET device, the temperature profile of the graphene channel has been simulated for 1, 2 and 3 nm channel width. After analyzing the simulation of this characteristics, it is concluded that, both electrical and thermal properties of GFET can be improved by fabricating the channel with larger width in the GFET device.

Temperature and gate voltage dependent electrical properties of graphene field-effect transistors

Abstract Temperature (T) and gate voltage sweep range (VGmax) dependent electrical properties of graphene field-effect transistors were investigated in the ambient atmosphere. With the increase of T from 300 to 380 K, the charge neutrality point (CNP) in the transfer characteristic curve (ID–VG) was shifted negatively from the positive voltage to near zero, which might be mainly due to the desorption of water adsorbates from the graphene surface and other thermally activated processes at the graphene/SiO2 interface at high T. Accompanying the CNP shift is the semiconducting behavior of the temperature-dependent conductivity, observed not only in the low carrier density region near the CNP, but also in the high carrier density region. The variations in the position and magnitude of the CNP in the ID–VG hysteresis loops were linearly enhanced by increasing either T or VGmax, which are explained in terms of the trapping/detrapping process and the chemical redox reaction at the graphene–oxide interface, as well as the thermally activated mobile ions movement in the dielectric layer.

Tunable transport characteristics of p-type graphene field-effect transistors by poly(ethylene imine) overlayer

Tunable electrical transport properties of graphene field-effect transistors (GFETs) are achieved by spin-coating a poly(ethylene imine) (PEI) layer on graphene surface. The initially p-doped graphene recovers the ambipolar characteristics with the PEI overlayer. When increasing the PEI concentration in a methanol solvent, a systematic evolution of the transport properties of GFETs is observed. The carrier mobility of graphene is greatly improved by several tens of times and the hole/electron conductivity saturation is shown. The voltage of the neutrality point VDirac gets closer to 0V and the plateau width around the neutrality point ΔVDirac becomes much smaller. It is proposed that the long-range Coulomb scattering in graphene is suppressed due to the screening effect of PEI and the performances of GFETs are consequently improved. The hysteretic behaviors of the transfer characteristic curves of GFETs are also influenced by the PEI coating. The gradual reversion of the hysteresis direction is observed when increasing the concentration of PEI, which is probably due to the two competing mechanisms between the charge trapping at the graphene/SiO2 interface and the capacitive coupling of graphene and the PEI overlayer.

Rapid-thermal-annealing surface treatment for restoring the intrinsic properties of graphene field-effect transistors

Graphene field-effect transistors (GFETs) were fabricated by photolithography and lift-off processes, and subsequently heated in a rapid-thermal-annealing (RTA) apparatus at temperatures (TA) from 200 to 400 ° C for 10 min under nitrogen to eliminate the residues adsorbed on the graphene during the GFET fabrication processes. Raman-scattering, current–voltage (I–V), and sheet resistance measurements showed that, after annealing at 250 ° C, graphene in GFETs regained its intrinsic properties, such as very small intensity ratios of D to G and G to 2D Raman bands, a symmetric I–V curve with respect to ∼0 V, and very low sheet resistance. Atomic force microscopy images and height profiles also showed that the surface roughness of graphene was almost minimized at TA = 250 ° C. By annealing at 250 ° C, the electron and hole mobilities reached their maxima of 4587 and 4605 cm2 V−1 s−1, respectively, the highest ever reported for chemical-vapor-deposition-grown graphene. Annealing was also performed under vacuum or hydrogen, but this was not so effective as under nitrogen. These results suggest that the RTA technique is very useful for eliminating the surface residues of graphene in GFETs, in that it employs a relatively low thermal budget of 250 ° C and 10 min.

Work-Function Engineering of Graphene Electrodes by Self-Assembled Monolayers for High-Performance Organic Field-Effect Transistors.

We have devised a method to optimize the performance of organic field-effect transistors (OFETs) by controlling the work functions of graphene electrodes by functionalizing the surface of SiO2 substrates with self-assembled monolayers (SAMs). The electron-donating NH2-terminated SAMs induce strong n-doping in graphene, whereas the CH3-terminated SAMs neutralize the p-doping induced by SiO2 substrates, resulting in considerable changes in the work functions of graphene electrodes. This approach was successfully utilized to optimize electrical properties of graphene field-effect transistors and organic electronic devices using graphene electrodes. Considering the patternability and robustness of SAMs, this method would find numerous applications in graphene-based organic electronics and optoelectronic devices such as organic light-emitting diodes and organic photovoltaic devices.