Properties Of FET Research Articles

Biocompatible Hydrogel Modified Silicon Nanowire Field Transistor for Highly Sensitive pH Detection

In this work, a silicon nanowire field-effect transistor (SiNW FET) device was developed and applied to pH sensing. A hydrogel was synthesized by radical polymerization as the dielectric and functional layer of SiNW FET. The spin coating process of the hydrogel was defined through different rotating speed. The results revealed that the suitable glue mixing process was determined to be 500 rpm/min at low speed and 4500 rpm/min at high speed. We demonstrated the effect of pH solutions on the sensitivity of the SiNW FET sensor modified by hydrogel. The SiNW FET sensor was used to detect a solution pH ranging from 5 to 11, with the response current increasing stepwise as the pH value increased. Compared with SiNW FET, the hydrogel-coated SiNW FET had higher sensitivity and time response rate for pH sensing. The obtained results demonstrated that modification of hydrogels can significantly increase the pH sensing properties of SiNW FET.

Electronic transport properties of B/N/P co-doped armchair graphene nanoribbon field effect transistor

On the basis of the Density functional theory (DFT) combined with non-equilibrium Green's function (NEGF), we have investigated the application potential of the boron, nitrogen and phosphorus co-doped seven-atom-wide armchair graphene nanoribbons field effect transistor (7-AGNR-FET). The transfer characteristics indicate that the gate voltage (VG) can modulate the electronic transport properties of 7-AGNR FET, and the ION/IOFF ratio reaches 128.67. When a positive drain voltage (VD) is applied, the device exhibits appreciate working behavior with a saturation drain-source current (IDS) of 76.21 μA. Transmission pathways, transmission spectra and Molecular projection self-consistent Hamiltonian (MPSH) are calculated to explain the variations in current including negative differential resistance (NDR) effect under negative VD. The negative VG affects the height of the channel barrier and causes the rectifying effect. Moreover, band structures and projected density of states (PDOS) shows the performances of devices strongly depend on doping positions. This NPN-doped device simulates the structure of MOSFET as realistically as possible, and it possesses promising applications in memory device and rectifier of carbon-based integrated circuits.

Air stable and reversible n-type surface functionalization of MoS2 monolayer using Arg and Lys amino acids

Schematic and transfer properties of a MoS2 FET decorated with Arg or Lys amino acid, thus showing effective electron doping with air stability.

Static and Dynamic Piezopotential Modulation in Piezo-Electret Gated MoS2 Field-Effect Transistor.

The piezotronic effect links the mechanical stimuli with various semiconductor devices, promising for low-power-consuming electronic devices, sensitive sensors, and interactive control systems. The persistent requirement for external strains in piezotronic modulation may hinder its application in some circumstances (such as devices on rigid substrate or complicated synergistic piezoelectric modulation on multidevice). Here, we propose an efficient method to realize piezoelectric modulation of optical and electrical properties of MoS2 FET in both static and dynamic manner, expanding the application of piezotronics. Through capacitive coupling between piezo-electret and MoS2 FET, the remanent piezo-potential can efficiently tune the Fermi level of MoS2, programming the initial electrical property for subsequent fabrication of sophisticated devices. The external strain can induce enhanced piezo-potentials to further affect the energy band bending of MoS2 channel, giving rise to high-performance strain sensors (large gauge factor ∼4800, fast response time ∼0.15 s, and good durability >1000 s). The proposed static and dynamic piezopotential tuned MoS2 FET is easy to extend to devices based on other materials, which is highly desired in tunable sensory systems, active flexible electronics, and human-machine interface.

Gas adsorbates are Coulomb scatterers, rather than neutral ones, in a monolayer MoS2 field effect transistor

Direct current (DC) and low-frequency (LF) noise analyses of a chemical vapor deposition (CVD)-grown monolayer MoS2 field effect transistor (FET) indicate that time-varying carrier perturbations originate from gas adsorbates. The LF noise analysis supports that the natural desorption of physisorbed gas molecules, water and oxygen, largely reduces the interface trap density (NST) under vacuum conditions (∼10-8 Torr) for 2 weeks. After a longer period of 8 months under vacuum, the carrier scattering mechanism alters, in particular for the low carrier density (Nacc) region. A decrease of both NST and the scattering parameter αSC with desorption of surface adsorbates from MoS2, explains the enhanced carrier mobility and the early turn-on of the device. The stabilized carrier behavior is verified with γ = 0.5 in the formula αSC ∝ Nacc-γ, as in Si-MOSFETs. Our results support that the gas adsorbates work as charged impurities, rather than neutral ones.

The Influence of Atmosphere on Electrical Transport Properties in Bilayer Graphene FET by CVD Methods

The desorption process for ambient atmosphere on electrical transport properties of bilayer graphene FET grown by CVD methods on SiO2/Si substrate was investigated in room temperature. With increasing the vacuum time of the device underwent, we found that the voltage of Dirac point decreased, the mobility of hole (electron) increased and the charged impurity density decreased. The results suggest that the atmospheric adsorbates (mainly oxygen and water molecules) are strongly influence the electrical transport properties of graphene FET.

Novel poly-silicon nanowire field effect transistor for biosensing application

A simple and low-cost method to fabricate poly-silicon nanowire field effect transistor (poly-Si NW FET) for biosensing application was demonstrated. The poly-silicon nanowire (poly-Si NW) channel was fabricated by employing the poly-silicon (poly-Si) sidewall spacer technique, which approach was comparable with current commercial semiconductor process and forsaken expensive E-beam lithography tools. The electronic properties of the poly-Si NW FET in aqueous solution were found to be similar to those of single-crystal silicon nanowire field effect transistors reported in the literature. A model biotin and avidin/streptavidin sensing system was used to demonstrate the biosensing capacity of poly-Si NW FET. The changes of I D– V G curves were consistent with an n-type FET affected by a nearby negatively (streptavidin) and positively (avidin) charged molecules, respectively. Specific electric changes were observed for streptavidin and avidin sensing when nanowire surface of poly-Si NW FET was modified with biotin and streptavidin at sub pM to nM range could be distinguished. With its excellent electric properties and the potential for mass commercial production, poly-Si NW FET can be a very useful transducer for a variety of biosensing applications.

Electrical Properties of CuPc FET with Different Substrate Temperature

Electrical Properties of CuPc FET with Different Substrate Temperature

Ultrahigh Frequency Carbon Nanotube Transistor Based on a Single Nanotube

Single-walled carbon nanotube field-effect transistors (CNT FETs) are predicted to have intrinsic cutoff frequencies approaching the THz range. Here ldquointrinsicrdquo means that the parasitic capacitance due to fringing fields is negligible compared to the gate-source capacitance required to modulate the conductance. In practice, although there are strategies proposed to mitigate this based on parallel arrays of CNT FETs, this parasitic capacitance dominates most geometries (even aligned arrays to date). In this work we show nanotube transistor performance with maximum stable gain above 1 GHz (even including the parasitics) by combining ldquoon-chiprdquo the electrical properties of 100 CNT FETs fabricated on one long nanotube. This also solves the problem of impedance matching by boosting the on current to a large (mA) value, and at the same time allows one to extract properties of each individual CNT FET, since they are identical in electrical characteristics as they are made out of the same CNT. This strategy opens the door to applications of carbon nanotube devices in the RF and microwave frequency range, a technologically relevant portion of the spectrum for both wired and wireless electronics, that has been (until now) incompatible with nanotube device technology.

Control of the nano electrostatic phenomena at a pentacene/metal interface for improvement of the organic FET devices

The effect of the UV/ozone treatment of substrate on transistor properties of the bottom contact pentacene FET is discussed in the context of the carrier accumulation around the source-drain electrode. Significant change of the threshold voltage, i.e., the decrease of the V th, by a UV/ozone treatment of the substrate was observed, and can be reasonably assigned to accumulated charges around source-drain electrode. In addition, to investigate the channel formation process on this FET, capacitance–voltage ( C– V) characteristics were measured, and significant difference between UV/ozone-treated and untreated FET was observed. Only a small change of a capacitance was observed for untreated sample with applied voltage, whereas drastic increase of the capacitance was observed for UV/ozone-treated FET. The capacitance increase corresponds to the accumulation of carriers at the interfacial region of pentacene, and this behavior was in good agreement with the result of the FET measurement. Finally, these C– V characteristics were successfully reproduced by Maxwell–Wagner model.

Metal–oxide–semiconductor field-effect transistor-structured Si field emitter array with a built-in ring gate lens

We propose a metal–oxide–semiconductor field-effect transistor (MOSFET)-structured Si field emitter array (FEA) with a ring gate FET. A ring-shaped MOSFET gate electrode surrounds the Si FEA and this electrode plays two roles. The first is to control the emission current, and the other is to focus the electron beam emitted from the FEA. The emission current can be controlled by the voltage of the ring gate. We evaluated focusing properties of the ring gate FET structured Si FEA by observing the emission patterns on an anode phosphor screen. The detailed electron trajectory simulation qualitatively agreed with the experimental results. The simulation revealed that the new device has better focusing properties than a conventional FEA with an in-plane lens electrode.

A room temperature HSGFET ammonia sensor based on iridium oxide thin film

Gas-sensing properties of hybrid suspended gate FET (HSGFET) sensor containing iridium oxide as sensitive layer are reported in this paper. The sensor response to NH 3 and H 2 was measured. We obtained a non-amplified signal of 70 mV for 50 ppm of ammonia and no signal to hydrogen even for 10,000 ppm. Further, the gas-sensing properties of thin film of iridium oxide has been studied using Kelvin probe (KP) setup. Sensitivity of these films to gases like CO, H 2, SO 2, Cl 2, NO 2 under dry and humid conditions were examined by measuring contact potential difference (CPD) resulting from work function change of the film due to exposure to test gases. The results suggest that iridium oxide-based HSGFET is selectively sensitive to ammonia with negligible signal to all other gases. Iridium oxide films of 20 nm thickness used in this study were prepared by dc sputter deposition at 300 °C followed by sintering at 600 °C in oxygen. The films were characterized using Rutherford backscattering spectroscopy (RBS), X-ray diffraction (XRD) analysis, scanning electron microscopy (SEM), and atomic force microscopy (AFM) to determine their composition, phase and surface morphology.

Fabrication of Ferroelectric Fet with Metal/PZT/SiO2/Si Structure

AbstractWe have fabricated a new ferroelectric memory FET, which consists of the Au/Pb(Zr0.52Ti0.48)O3/SiO2/Si gate structure. Ferroelectric PZT thin film with a thickness of 250~400 nm was prepared by using Excimer Laser Ablation Deposition. Silicon oxide successfully served as a buffer layer between ferroelectric and Si substrate to suppress the charge injection and prevent Pb interdiffusion. Electrical properties of the ferroelectric FET have been characterized through both the Capacitance vs. Voltage(C-V) and Current vs. Voltage(I-V) measurements, showing a typical memory characteristics of FET devices, i.e., the ON state and OFF state were nonvolatile for about thirty minutes and several hours, respectively.

Functionality of the ferroelectric/oxide semiconductor interface

There are several techniques for fabricating transistor devices using a ferroelectric material as the gate electrode. A most promising technique being developed at Radiant involves the fabrication of a thin ferroelectric film transistor using PZT as the gate oxide and a semiconducting oxide in place of the usual amorphous silicon. It is now possible using this technique to fabricate fully integrated devices that can be placed in CMOS IC's. The functionality of the thin ferroelectric film FETs produced in this manner acts like a Junction FET in operation. A depletion region forms in the semiconductor, the depth of which provides the conduction modulation of the transistor. Since the device represents both a ferroelectric capacitor and a field effect transistor, specialized test procedures must be used to measure and understand all of the properties of a ferroelectric FET.

Transistor performance and electron transport properties of high performance InAs quantum-well FET's

A novel field-effect transistor based on a pseudomorphic InAs quantum well in a doped InGaAs/InAlAs double heterostructure is reported. Low-field mobility, electron peak velocity, and transistor performance are studied as functions of InAs quantum well thickness, where the InAs layer is in the center of a 300-/spl Aring/ uniformly doped InGaAs/InAlAs quantum well lattice matched to InP. Electron transport-both at low and high fields-along with transistor transconductance are optimal for structures with a 30-/spl Aring/ InAs quantum well. Transistors based on the InAs quantum well structures with 0.5-μm gate lengths yielded room temperature extrinsic transconductances of 708 mS/mm, more than a 100% increase over those with no InAs.

Distributed channel model for HEMT signal and noise parameters

A new simple model for the signal and noise properties of a microwave FET or HEMT avoids the need for any explicit correlation between gate and drain noise sources by distributing the drain-to-gate capacitance and the drain noise source along the conducting channel. The new model applied to a commercial HEMT chip demonstrates a very good fit to measured scattering and noise parameter data.

The electrical and optical properties of a four-terminal top back gate FET

A novel four-terminal device, the top back gate FET (TBGFET) grown by MBE is fabricated. A n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> Sn-doped GaAs buried-contact layer is grown on Cr-doped SI first, and an undoped Al <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.4</inf> - Ga <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.6</inf> As insulating layer and Sn-doped GaAs channel are grown subsequently. Nonselective mesa etch is used for device isolation and selective etch is adopted to open the back-gate contact window. TBGFET Works as a MESFET and MISFET with a common channel, but can be separately controlled by the top gate and the back gate. We can adjust the transconductance and current level at room temperature as we wish by properly applying negative bias to the back gate or top gate. The top-gate threshold voltag <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V_{t} = -1.6</tex> V and back-gate threshold voltage V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">bt</inf> from -0.5 to -10 V are obtained under different insulator thickness and trap density. If a proper criterion is satisfied, either top-gate threshold voltage V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> or back-gate threshold voltage V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">bt</inf> can be independently chosen without influencing each other. The decoupling of V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> and V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">bt</inf> are well explained by the Lampert's law of the trap-fill-limited carrier injection in semi-insulator. The device interaction with light is also investigated. It is foUnd that the back-gate threshold voltage shift as well as the conduction current enhancement is caused principally by photon-induced detrapping in the semi-insulated AlGaAs layer. Photon generated e-h pairs in the device channel play a minor role either in current enhancement or in back-gate threshold voltage shift. Both <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">\Delta V_{bt}</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">\Delta I_{ds}</tex> are increased with the light intensity and tend to saturate at some fixed values. Based on the above properties, a number of applications of TBGFET in digital and microwave circuit are proposed.

Principles of operation of short-channel gallium arsenide field-effect transistor determined by Monte Carlo method

The electrical properties of a GaAs FET having a practical doping density and having a quarter-micrometer source-drain distance and a quarter-micrometer gate length have been studied by two-dimensional Monte Carlo particle simulation. I_{ds} = 3.3 mA/20µm, g_{m} = 600 mS/mm, and f_{T} = 160 GHz are predicted. The reasons for the high performances are discussed in terms of the electron dynamics in the device. The current saturation mechanism and the current control mechanism of the FET are made clear.

Electrical Properties of GaAs Ballistic FET

Electrical Properties of GaAs Ballistic FET

Switching Characteristics of Nonlinear Field-Effect Transistors: Gallium-Arsenide Versus Silicon

A study of the switching properties of GaAs FET's and other nonlinear elements whose high field velocity saturates without negative differential mobility demonstrates that the high-bias swiching times of GaAs are determined by velocity saturation. Silicon switches are also studied, and situations where GaAs and Si switching properties may be similar are discussed.