Programmable Current Mirror Research Articles

Wide-Bandwidth Electronically Programmable CMOS Instrumentation Amplifier for Bioimpedance Spectroscopy

An instrumentation amplifier (IA) with continuous tuning of the voltage gain, suitable for operation over a wide frequency range, and aimed to electrical bioimpedance spectroscopy, is proposed. The operation principle of the IA is based on indirect current feedback (ICF), which leads to an almost-constant bandwidth regardless of the value of the programmed voltage gain. The use of improved voltage followers in the transconductors required in the ICF technique allows achieving a compact implementation with a bandwidth compatible with bioimpedance spectroscopy applications. The tuning strategy relies on a continuously programmable current mirror that can be electronically adjusted by means of a control current. The IA has been designed and fabricated in 180 nm CMOS technology to operate with a 1.8-V single supply. The experimental characterization of the silicon prototypes showed a gain programmability range higher than 45 dB, between –4.6 dB and 41.2 dB, a BW around 3 MHz, and a maximum CMRR at DC higher than 86 dB, all this with a minimum current consumption of 144.8 μA and an area occupation of 0.0196 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

Design of low power, programmable low-Gm OTAs and Gm-C filters for biomedical applications

In this paper, two programmable operational transconductance amplifiers (POTAs)—one using bulk driven attenuator (BDA) and another using programmable current mirror (PCM) are proposed in order to achieve low-Gm and high dynamic range. These OTAs are denoted as BDA-POTA and PCM-OTA respectively and are realized using composite transistors operated in the subthreshold region. The pseudo resistor is used for achieving programmability in the former and for improving the linearity and dynamic range in the latter. The proposed OTAs and two 4th order programmable Butterworth low pass filters (LPF) are designed and implemented in CMOS 180 nm technology with a supply voltage of 0.9 V. Their performances are evaluated through post-layout simulations and are found to be superior compared to those of POTAs reported in the literature for biomedical applications. The power consumption, transconductance, dynamic range and input-referred noise of BDA-POTA and PCM-OTA are [25.2 nW, (7.89–15.61 nS), (77.54–74.89 dB), (39.86–51.19 µVrms)] and [72.81 nW, (5.49–174.5 nS), (91.20–84.39 dB), (17.19–34.92 µVrms)] respectively. The power dissipation and cut off frequency range of the LPF using BDA-POTA and PCM-OTA are [197.8 nW, (30–100 Hz)] and [209.8 nW, (16–971 Hz)] respectively. The latter achieves 13.6 times wider programmability with only 5% increase in power dissipation. The proposed LPFs have better FOM compared to those reported in the literature.

VLSI architecture for analog radix-4 DFT front-end in QAM–OFDM receiver

Design of low power receiver of orthogonal frequency division multiplexing (OFDM) systems in small low power battery operated wireless devices can be tackled with analog DFT front-end. The radix-2 fast Fourier transform algorithm has not been very efficient with device level non-idealities. Analog DFT with higher radix such as radix-4 claimed to offer better performances while device level non-idealities are concerned. But its circuit level performance in OFDM receiver is yet to be explored. This work presents complete VLSI architecture of the DFT front-end in QAM–OFDM receiver. The DFT processor consists of MOS current mirror. Geometrical variations of transistor sizes result in significant error during coefficient multiplication. This issue has been addressed using gain programmable current mirror with drain switches. Analysis of non-ideal effects are also observed on the QAM–OFDM system performance. All the circuit level simulations are carried out using SPICE with 65 nm CMOS process and demaping of QAM symbols were done using behavioral QAM demapper designed in MATLAB.

Novel AM/FM/ASK/FSK/PSK/QAM Signal Generator Based on a Digitally Programmable CDTA

In this paper, a novel $$\pm $$±0.8V current differencing transconductance amplifier (CDTA) with programmable and tunable ability is proposed and analyzed. The digitally programmable CDTA is built around a lot of programmable current mirror arrays and three linear tunable transconductors, which contains separate analog and digital tuning feature. Moreover, a CDTA-based general sinusoidal signal generator circuit with two fixed-value capacitors and two grounded resistors is presented here. The generator circuit can be configured to perform the following signal modulation techniques: amplitude modulation, frequency modulation, amplitude shift keying, frequency shift keying, phase shift keying, and quadrature amplitude modulation. Cadence Virtuoso Analog Design Environment using GlobalFoundries' 0.18 um CMOS process is used to develop the generator circuit and verify the theory by the post-layout simulations.

Circuit implementation of a fully programmable and continuously slope tunable triangular/trapezoidal membership function generator

In this article, a fully programmable membership function generator (MFG) is proposed. This MFG is capable of generating triangular, trapezoidal as well as both S-shaped and Z-shaped membership functions simultaneously. Utilizing a differential pair as an analog switch leads to relax the design of fuzzy systems control part. This MFG has the ability of adapting itself with various fuzzy controllers which produce different control voltage ranges. Unlike the available reported literatures, this MFG uses a new analog programmable current mirror (APCM) instead of digitally programmable current mirrors to adjust the slopes of membership functions. Extensive time domain simulations have been carried out using Hspice by level 49 parameters (BSIM3v3) in standard CMOS technology to validate the effective performance of the proposed MFG.

Gain programmable current mirrors based on current steering

A new and compact scheme for a programmable current mirror is introduced. It features linear gain continuously adjustable in a wide range. In such a scheme differential pairs are used as current steering elements in order to provide gain programmability. All mirror transistors operate in strong inversion. Implementation of a linear OTA/multiplier is discussed. Experimental verification of the proposed scheme is provided.

Amorphous silicon thin film transistor circuit integration for organic LED displays on glass and plastic

This paper presents design considerations along with measurement results pertinent to hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT) drive circuits for active matrix organic light emitting diode (AMOLED) displays. We describe both pixel architectures and TFT circuit topologies that are amenable for vertically integrated, high aperture ratio pixels. Here, the OLED layer is integrated directly above the TFT circuit layer, to provide an active pixel area that is at least 90% of the total pixel area with an aperture ratio that remains virtually independent of scaling. Both voltage-programmed and current-programmed drive circuits are considered. The latter provides compensation for shifts in device characteristics due to metastable shifts in the threshold voltage of the TFT. Various drive circuits on glass and plastic were fabricated and tested. Integration of on-panel gate drivers is also discussed where we present the architecture of an a-Si:H based gate de-multiplexer that is threshold voltage shift invariant. In addition, a programmable current mirror with good linearity and stability is presented. Programmable current sources are an essential requirement in the design of source driver output stages.

A high-linear wide-tunable CMOS transconductor for video frequency applications

In this paper a new CMOS transconductor structure based on a g m-boosted degenerated differential pair is presented for applications in the video frequency range. The proposed circuit combines two techniques, a switchable array of source degenerating MOS resistors and a programmable output current mirror, in order to widen the G m tuning range while maintaining linearity. Degeneration MOS resistors are made common-mode voltage independent thanks to a simple control circuit. Post-layout simulation results from a 0.35 μm design supplied at 3.3 V show a wide tuning range (10–100 MHz), good linearity (−58.4 dB for an output signal voltage of 1.1 V p–p) and low excess phase (<0.5° over the whole tuning range).

Amorphous Silicon Back-Plane Electronics for OLED Displays

This paper reviews design considerations along with measurement results pertinent to amorphous silicon (a-Si:H) thin-film transistor (TFT) drive circuits for active matrix organic light-emitting diode displays, and follows from work presented earlier (A. Nathan et al., 2002), (A. Nathan et al., 2003). We describe both pixel architectures and TFT circuit topologies that are amenable for vertically integrated, high aperture ratio pixels. Here, the organic light-emitting diode layer is integrated directly above the TFT circuit layer to provide an active pixel area that is at least 90% of the total pixel area with an aperture ratio that remains virtually independent of scaling. Both voltage-programmed and current-programmed drive circuits are considered. The latter provides compensation for shifts in device characteristics due to metastable shifts in the threshold voltage of the TFT. Integration of on-panel gate drivers is also discussed, where we present the architecture of an a-Si:H-based gate demultiplexer that is threshold voltage shift invariant. In addition, a programmable current mirror with good linearity and stability is presented. Programmable current sources are an essential requirement in the design of source driver output stages.

Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL

A self-biased phase-locked loop (PLL) uses a sampled feedforward filter network and a multistage inverse-linear programmable current mirror for constant loop dynamics that scale with reference frequency and are independent of multiplication factor, output frequency, process, voltage, and temperature. The PLL achieves a multiplication range of 1-4096 with less than 1.7% output jitter. Fabricated in 0.13-μm CMOS, the area is 0.182mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the supply is 1.5 V.

A programmable current mirror for analog trimming using single poly floating-gate devices in standard CMOS technology

This paper describes a programmable current mirror comprised of single-poly floating-gate devices. By programming the threshold voltage of the floating-gate devices, a current mirror's input-output current mismatch can be trimmed at a desired current level. This programmability allows accurate drain current matching to be achieved without using large gate area devices. A prototype of the programmable current mirror fabricated in a 0.5-micron digital CMOS technology achieves 0.04% input-output current matching.

An automatic offset compensation scheme with ping-pong control for CMOS operational amplifiers

An automatic offset compensation scheme for CMOS operational amplifiers is presented. Offset is reduced by digitally adjusting the bias voltage of a programmable current mirror which is used as the load of the differential input stage. A 100% operating duty cycle is obtained by using a ping-pong structure. The offset compensation scheme is inherently time and temperature stable since the offset compensation is periodically performed with the ping-pong control. The proposed circuit has been fabricated using a 1.0 /spl mu/m n-well CMOS process. The measured offset voltages of the test circuits are less than 400 /spl mu/V in magnitude.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>