Topology optimization methods have shown promise in enhancing the heat transfer performance of microchannel structures. However, the thermal-electrical-force multi-field coupling effects in three-dimensional integrated chips present a complex heat generation scenario that necessitates their consideration in the design of embedded microchannel structures. Here, we perform topology optimization of embedded microchannels specifically tailored for three-dimensional integrated chip, with a specific focus on the multi-field coupling effects of through-silicon-via structures within the topology optimization process. A new and improved 2D microchannel structure that exhibits superior heat transfer performance was obtained by analyzing the effects of pressure drop constraints within the channel, as well as fixing the microfin diameter and local heat flux of through-silicon-via. Furthermore, the obtained topology optimization results were validated through rigorous three-dimensional numerical simulations. The findings demonstrate that the new microchannel structure, when compared to the original microfin model, yields a significant improvement in the comprehensive heat transfer performance coefficient, achieving a remarkable enhancement factor of 1.43. Furthermore, under identical flow conditions, the structural stress within the chip experiences a substantial reduction of 43.9%. These outcomes underscore the efficacy of the topology optimization approach in effectively addressing the thermal management challenges associated with three-dimensional integrated chip.
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