Precision Voltage Reference Research Articles

A 1-V, 16.9 ppm/$^{\circ}$C, 250 nA Switched-Capacitor CMOS Voltage Reference

An ultra low-power, precise voltage reference using a switched-capacitor technique in 0.35-μm CMOS is presented in this paper. The temperature dependence of the carrier mobility and channel length modulation effect can be effectively minimized by using 3.3 and 5 V N-type transistors to operate in the saturation and subthreshold regions, respectively. In place of resistors, a precise reference voltage with flexible trimming capability is achieved by using capacitors. When the supply voltage is 1 V and the temperature is 80°C, the supply current is 250 nA. The line sensitivity is 0.76%/V; the PSRR is -41 dB at 100 Hz and -17 dB at 10 MHz. Moreover, the occupied die area is 0.049 mm2.

A programmable voltage reference optimized for power management applications

A 3-bits programmable, low drift, high PSRR and high precision voltage reference, optimized for Power Management (PM) applications, is presented. The topology is based on a high-performance bandgap voltage reference that presents a PSRR of up to 80 dB, which is required in PM applications, because they employ mixed-signal circuits, where high frequency switching noise is present. The proposed approach was successfully verified in a standard 0.35 μm CMOS process. The experimental results confirmed that, for power supply between 3.0 and 3.3 V, and temperatures in ?20°C to 80°C range, the programmable output voltage V REF exhibits a worst case precision of ±3%.

A Comparison of the Effects of X-Ray and Proton Irradiation on the Performance of SiGe Precision Voltage References

A comprehensive investigation of the performance dependencies of irradiated SiGe precision voltage reference circuits on (1) total ionizing dose (TID), (2) circuit topology, and (3) radiation source is presented. Two different bandgap voltage references were designed using a first-generation (50-GHz) SiGe BiCMOS technology platform, and subsequently exposed to X-rays at doses of 1080 krad(SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) and 5400 krad(SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ). The degradation in circuit performance following X-ray irradiation depends on both the TID level and the chosen circuit topology. Measurement results show that large TID levels can significantly shift the magnitude of the output voltage. Explanations for the observed shifts are provided by utilizing detailed analyses of the two circuit topologies and considering device-to-circuit interactions. The primary factor responsible for the difference in the circuit response before and after irradiation can be attributed to the excess base leakage current in the SiGe HBT. To investigate the impact of radiation source, the circuit topology showing the worst-case degradation from the X-ray experiment was independently exposed to 63-MeV protons at the same effective TID level. A clear source dependence in the circuit response was observed, and possible origins of this behavior are identified.

Proton Tolerance of SiGe Precision Voltage References for Extreme Temperature Range Electronics

A comprehensive investigation of the effects of proton irradiation on the performance of SiGe BiCMOS precision voltage references intended for extreme environment operational conditions is presented. The voltage reference circuits were designed in two distinct SiGe BiCMOS technology platforms (first generation (50 GHz) and third generation (200 GHz)) in order to investigate the effect of technology scaling. The circuits were irradiated at both room temperature and at 77 K. Measurement results from the experiments indicate that the proton-induced changes in the SiGe bandgap references are minor, even down to cryogenic temperatures, clearly good news for the potential application of SiGe mixed-signal circuits in emerging extreme environments

A very high precision 500-nA CMOS floating-gate analog voltage reference

A floating gate with stored charge technique has been used to implement a precision voltage reference achieving a temperature coefficient (TC) <1 ppm//spl deg/C in CMOS technology. A Fowler-Nordheim tunnel device used as a switch and a poly-poly capacitor form the basis in this reference. Differential dual floating gate architecture helps in achieving extremely low temperature coefficients, and improving power supply rejection. The reference is factory programmed to any value without any trim circuits to within 200 /spl mu/V of its specified value. The floating-gate analog voltage reference (FGAREF) shows a long-term drift of less than 10 ppm//spl radic/1000 h. This circuit is ideal for portable and handheld applications with a total current of only 500 nA. This is done by biasing the buffer amplifier in the subthreshold region of operation. It is fabricated using a 25-V 1.5-/spl mu/m E/sup 2/PROM CMOS technology.

Manufacturing capability information for multiple product quality characteristics: a case study to precision voltage reference

Chen et al. [5] proposed a process capability analysis chart (PCAC) based on process capability indices Cpk, Cpl, and Cpu to evaluate the integrated process capability for the entire product with the nominal-the-best, the larger-the-better, and the smaller-the better characteristics. The PCAC conveys critical information of multiple characteristics of the entire product regarding accuracy, precision, and the process capability zones from one single chart, which is an effective tool for evaluating product quality/reliability. However, from a practical perspective, the PCAC chart is never considered sampling errors hence the capability information provided from this chart is often unreliable and misleading. In this paper, a manufacturing application involving multiple characteristics of precision voltage reference (PVR) is investigated. We consider the sample error by obtaining the lower confidence bounds (LCBs) of Cpk, Ca, Cpl, and Cpu. The lower confidence bound presents the minimum true capability information of the process, which is essential to product reliability assurance. We employ the lower confidence bounds to PCAC to provide more reasonably reliable capability information for the product with multiple characteristics.

C pm MPPAC for manufacturing quality control applied to precision voltage reference process

A multiprocess performance analysis chart (MPPAC), based on the process capability index Cpm, called Cpm MPPAC, is developed to analyse the manufacturing quality of a group of processes in a multiple process environment. The Cpm MPPAC conveys critical information about multiple processes regarding the departure of the process and process variability on one single chart. Existing research on MPPAC has been restricted to obtaining quality information from one single sample of each process, ignoring sampling errors. The information provided from the existing MPPAC chart, therefore, is unreliable and misleading, resulting in incorrect decisions. In this paper, the natural estimator of Cpmis considered based on multiple samples. Based on the natural estimator of Cpm, sampling errors are considered by providing an explicit formula with Matlab to obtain the estimation accuracy of the Cpm. The sampling accuracy of Cpmis tablulated for sample size determination so that engineers/practitioners can use it for in-plant applications. An example of multiple PVR processes is presented to illustrate the applicability of Cpm MPPAC for manufacturing quality control.

C pm MPPAC for manufacturing quality control applied to the precision voltage reference process

C pm MPPAC for manufacturing quality control applied to the precision voltage reference process

Parameter optimization of an on-chip voltage reference circuit using evolutionary programming

This paper presents an application of evolutionary programming to parameter optimization in the design of a voltage reference circuit. Designing circuits consists of two steps: topological design and parameter determination. After designing a topology suitable for the circuit, the designer selects an appropriate value for each circuit element from a circuit analysis and his experience. This step is difficult and time consuming because the designer must consider many factors simultaneously. As more precise circuits are required, parameter optimization becomes more complex. The voltage reference circuit, which requires a precise reference voltage independent of power fluctuation and temperature change, is such an example. In this paper, evolutionary programming is used as an effective method of finding good parameter values for the elements of the voltage reference circuit. Simulation results show that this method provides good performance and can be used as an effective method for circuit design.

The influence of Ge grading on the bias and temperature characteristics of SiGe HBTs for precision analog circuits

This paper analyzes the effects of Ge profile shape on the bias and temperature characteristics of advanced UHV/CVD SiGe heterojunction bipolar transistors (HBTs). The widely used bandgap reference (BGR) design equation and a more general analytical expression incorporating Ge grading developed in this work are used to compare silicon devices to their SiGe counterparts. Theory, device measurements, and SPICE simulations are used to investigate the impact of Ge grading on SiGe HBT precision voltage references. It is concluded that conventional SPICE can be used to account for Ge grading effects in SiGe HBT modeling. Sufficient Ge grading can have a significant impact on the accuracy of precision voltage references, particularly at reduced temperatures, and thus warrants attention.

On-chip voltage down converter for low-power digital system

An on-chip differential-amplifier-based DC-to-DC voltage down converter (VDC) is proposed. The converter is a negative feedback-type voltage follower with precise internal reference voltage generator and high current drive capability. VDC converts 5 V to lower voltage so that the internal circuits of the chip are used. In this paper, 3 V is used as a test vehicle. The proposed VDC has characteristics such as output voltage remains 3 V over a large load current range (0-100 mA) and temperature dependency of 3.2 mV//spl deg/C. The VDC chip was fabricated in a 0.8 /spl mu/m single-poly-double-metal CMOS process and layout size is 690/spl times/210 /spl mu/m/sup 2/. The output voltage is stabilized within /spl plusmn/2.8% for supply voltage with /spl plusmn/10% variation achieved.

The Impact of Ge Grading on the Bias and Temperature Characteristics of SiGe HBT Precision Voltage References

We analyze the effects that the Ge profile shape has upon the bias and temperature characteristics of SiGe HBT's. The widely used bandgap reference (BGR) design equation and a more general analytical expression we developed incorporating Ge grading are used to compare silicon devices to their SiGe counterparts. Measurement and simulation show that although the Ge-ramp effect is negligible in the -55 to 85 °C range, it can become important as the temperature drops, perhaps affecting the operation of SiGe circuits in the 77 K regime.

A monolithic CMOS 16 channel, 12 bit, 10 microsecond analog to digital converter integrated circuit

A monolithic CMOS 16-channel, 12-b, 10- mu s analog-to-digital converter has been designed and tested. The circuit converts 16 channels in parallel via a single slope ramp and Gray code counter algorithm. When biased for 10.0 mu s conversions of a 2-V input range into 4050 voltage bins, and ohmically connected to a computer, initial testing shows that typical performance is a noise level of 0.3 bins rms, an integral nonlinearity of 4 bins, adjacent channel crosstalk effects of less than 1 bin, and a total chip power consumption of 110 mW. The chip contains 16 sample and hold circuits, out of range logic, a Gray-to-binary converter, and tri-state data outputs for microprocessor compatibility. The die size is 4.4 by 1.5 mm in a 2 polysilicon, 1.2- mu m feature size CMOS process, and has 52 bonding pads. Off-chip requirements are a single power supply, a single high speed clock, a precision voltage reference, three biasing resistors, and supply filtering capacitors. This custom circuit has advantages of lower power dissipation and less PC board area than competitive approaches, and is designed for further monolithic system integration. Design details and test results are presented. >

Industry news

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Rapid Annealing of Temperature-Compensated, Precision Voltage References Following Fast Neutron Irradiation

Substantial, short-term voltage variations have been observed during the rapid annealing of twin-junction, temperature-compensated, precision voltage references (TC PVRs) immediately following exposure to fast-neutron bursts of up to 4 × 1014 n/cm2. The short term recovery has been found to be dominated by minority carrier lifetime reduction in the forward biased junction of this composite junction device. The annealing response has been measured and found to be roughly independent of neutron fluence in the range from 1 - 4 × 1014 n/cm2.

Charge redistribution codec

A charge redistribution codec fabricated by NMOS technology is presented which uses only one capacitor array, thereby resulting in improved accuracy, speed, and chip area utilization. The realization of this scheme requires precision voltage references which are described. A description of a codec complete with logic to interface a full duplex PCM link is included. The chip has provision for asynchronous transmit/receive, direct and microcomputer control and internal power down. The introduction of an improved method for offset correction eliminates the need for off-chip autozero circuitry.

A precision, continuous voltage reference for industrial recorders

A new precision voltage reference for use in industrial null-balancing recorders is described. The reference employs a Zener diode as the voltage element and replaces the conventional dry cell, standard cell, and standardizing mechanism used in most recorders. The reference is currently being supplied as standard equipment in the new General Electric strip chart recorder.

Characteristics of Silicon Junction Diodes as Precision Voltage Reference Devices

Characteristics of Silicon Junction Diodes as Precision Voltage Reference Devices

An Amplitude Comparison Circuit

An electronic circuit for measuring and comparing the amplitude of a plurality of out of phase signals. The amplitude measurements are accomplished by converting the signals to direct current voltages which equal the peak-to-peak amplitude of the signals. These direct current voltages are then compared electronically to a precision reference voltage which equals the peak-to-peak amplitude of a referenced signal. Direct measurements are then taken of the attenuation of the tested signals by reading the direct current voltages. Additional circuity is provided to make a pass-fail decision automatically where certain limits have been established for the attenuation of the signals to be tested.