Precedence Constrained Task Graphs Research Articles

Energy-Aware Real-Time Scheduling of Multiple Periodic DAGs on Heterogeneous Systems

Many of today’s complex Cyber-Physical Systems (CPSs) are represented as a set of independent co-executing real-time control applications, where each such application is represented as a precedence-constrained task graph. The applications execute in infinite loops, periodically acquiring data from the environment through sensors at a particular frequency, processing the same, and then producing processed data via actuators. These CPSs often execute under stringent resource constraints (such as limited energy budgets) in distributed networked environments and may be heterogeneous to be able to satisfactorily meet stipulated performance specifications. This work presents a list-based energy-aware scheduler called DPMRS for a set of real-time control applications co-executing in a heterogeneous distributed environment. DPMRS introduces a novel approach for the integrated behavioural representation of a set of co-executing real-time DAG-structured applications. Each task in this integrated representation is then scheduled by determining its relative execution start time on a particular processor, which operates at an appropriately chosen frequency when the task runs on this processor. The overall objective of DPMRS is to minimize aggregate energy consumed in the execution of all tasks. The efficacy of the proposed scheduler has been exhibited through extensive simulation experiments using benchmark task graphs from different application domains. Additionally, a case study on automotive control systems has been included to show the applicability of the proposed work in real world settings.

Resource-Optimal Fault-Tolerant Scheduler Design for Task Graphs Using Supervisory Control

Real-time control applications are highly parallelizable and can be used to effectively harness the capacity of a given computing platform when appropriately scheduled. Given a multicore platform for executing a set of parallelizable applications, it is necessary to ensure proper functioning of the system even in the presence of transient processor faults. However, most existing scheduling approaches for parallel applications have been heuristic schemes which are often based only on the satisfaction of a set of sufficiency conditions and cannot take into consideration of all necessary schedulability requirements. Consequently, such schemes lead to suboptimal usage of resources resulting in higher design costs. Formal model-based safe design methodologies such as supervisory control are often desirable in the design of correct-by-construction fault-tolerant schedulers. This article proposes a supervisory control-based fault-tolerant scheduler synthesis scheme for real-time tasks modeled as precedence-constrained task graphs, executing on multicores. Further, we devise search strategies to obtain schedules that 1) maximize fault-tolerance and 2) minimize peak-power (MPP) dissipation. Conducted experiments using real-world benchmarks reveal the efficacy of our scheme.

An efficient greedy task scheduling algorithm for heterogeneous inter-dependent tasks on computational grids

Designing a task scheduling algorithm for precedence constrained task graphs is still a challenge due to its complexity (NP-complete). Hence the majority of the research in this area is devoted to designing optimal scheduler based on a plethora of techniques such as heuristic, greedy, genetic, game theory, bio-inspired, machine learning etc. for fully dependent or independent task graphs. Motivated by these works, we propose an efficient greedy task scheduling algorithm for precedence constrained task graphs with varied dependencies (no, partial and fully) on computational grids. Performance of the proposed task scheduling algorithm is compared with respect to Turn Around Time (TAT) and grid utilisation against Hungarian, Partial Precedence Constrained (P_PCS) and AND scheduling algorithms. Simulation results shows that the performance of the proposed scheduling algorithm is on a par with Hungarian, P_PCS and AND scheduling algorithms and the running time of proposed algorithm is better than Hungarian and is on a par with P_PCS algorithm.

Contention-aware optimal scheduling of real-time precedence-constrained task graphs on heterogeneous distributed systems

Abstract Real-time applications in today’s distributed cyber-physical control systems are often represented as Precedence-constrained Task Graphs (PTGs) and increasingly implemented on heterogeneous platforms to cater to their high performance demands. Optimal scheduling solutions for such systems can provide advantages in terms of performance, reliability, cost etc. However, existing research works dealing with the optimal scheduling of PTGs, typically assume platforms consisting of homogeneous processing elements which interact through a fully connected network of homogeneous communication channels. In this work, we propose an Integer Linear Programming based optimal solution strategy for scheduling PTGs executing on a distributed platform composed of heterogeneous processing elements and inter-connected through a set of heterogeneous shared buses. Through the real-world case study of an automotive cruise controller, we generate an optimal schedule using our proposed scheme in order to demonstrate its generic applicability. Conducted experiments on benchmark PTGs reveal the practical efficacy of our scheme.

Genetic algorithms for task scheduling problem

The scheduling and mapping of the precedence-constrained task graph to processors is considered to be the most crucial NP-complete problem in parallel and distributed computing systems. Several genetic algorithms have been developed to solve this problem. A common feature in most of them has been the use of chromosomal representation for a schedule. However, these algorithms are monolithic, as they attempt to scan the entire solution space without considering how to reduce the complexity of the optimization process. In this paper, two genetic algorithms have been developed and implemented. Our developed algorithms are genetic algorithms with some heuristic principles that have been added to improve the performance. According to the first developed genetic algorithm, two fitness functions have been applied one after the other. The first fitness function is concerned with minimizing the total execution time (schedule length), and the second one is concerned with the load balance satisfaction. The second developed genetic algorithm is based on a task duplication technique to overcome the communication overhead. Our proposed algorithms have been implemented and evaluated using benchmarks. According to the evolved results, it has been found that our algorithms always outperform the traditional algorithms.

Dealing with heterogeneity through limited duplication for scheduling precedence constrained task graphs

Scheduling is one of the vital design issues for heterogeneous computing systems. The work available in literature, by and large, focuses on the scheduling of ‘metatasks’ (set of independent tasks with only few data dependent subtasks) in such an environment. A majority of complex scientific / engineering applications, however, fall in the category of precedence-constrained task graphs. Scheduling of such graphs is generally limited to list-based techniques. Further, diverse performance metrics and heterogeneity models, as adopted by various researchers, make the comparison process quite inconclusive. We have made an attempt to categorize heterogeneity models and performance metrics so as to have better understanding and to facilitate a more uniform platform for developing and comparing such algorithms. Further, a generic scheduling strategy is presented, which improves the performance of list-based heuristics with the addition of limited duplication. A comparison of state-of-the-art scheduling algorithms is next performed using an A-Cube performance model that has been suggested to study the behavior of an algorithm, application and architecture in the presence of heterogeneity. Depending upon the type and extent of heterogeneity, performance of an algorithm is found to degrade with heterogeneity as the penalty imposed for any injudicious move on the part of heuristic tends to be more severe for heterogeneous computing environment in comparison to its homogeneous counterpart. However, the proposed heterogeneous limited duplication algorithm, having its roots in our earlier suggested SD algorithm, succeeds substantially in overcoming these ‘stresses’ and ‘strains; of heterogeneity, and retains the best features of duplication without compromising much on the complexity front.

An improved duplication strategy for scheduling precedence constrained graphs in multiprocessor systems

Scheduling precedence constrained task graphs, with or without duplication, is one of the most challenging NP-complete problems in parallel and distributed computing systems. Duplication heuristics are more effective, in general, for fine grain task graphs and for networks with high communication latencies. However, most of the available duplication algorithms are designed under the assumption of unbounded availability of fully connected processors, and lie in a high complexity range. Low complexity optimal duplication algorithms work under restricted cost and/or shape parameters for the task graphs. Further, the required number of processors grows in proportion to the task-graph size significantly. An improved duplication strategy is proposed that works for arbitrary task graphs, with a limited number of interconnection-constrained processors. Unlike most other algorithms that replicate all possible parents/ancestors of a given task, the proposed algorithm tends to avoid redundant duplications and duplicates the nodes selectively, only if it helps in improving the performance. This results in lower duplications and also lower time and space complexity. Simulation results are presented for clique and an interconnection-constrained network topology with random and regular benchmark task graph suites, representing a variety of parallel numerical applications. Performance, in terms of normalized schedule length and efficiency, is compared with some of the well-known and recently proposed algorithms. The suggested algorithm turns out to be most efficient, as it generates better or comparable schedules with remarkably less processor consumption.

Scheduling precedence constrained task graphs with non-negligible intertask communication onto multiprocessors

The multiprocessor scheduling problem is the problem of scheduling the tasks of a precedence constrained task graph (representing a parallel program) onto the processors of a multiprocessor in a way that minimizes the completion time. Since this problem is known to be NP-hard in the strong sense in all but a few very restricted eases, heuristic algorithms are being developed which obtain near optimal schedules in a reasonable amount of computation time. We present an efficient heuristic algorithm for scheduling precedence constrained task graphs with nonnegligible intertask communication onto multiprocessors taking contention in the communication channels into consideration. Our algorithm for obtaining satisfactory suboptimal schedules is based on the classical list scheduling strategy. It simultaneously exploits the schedule-holes generated in the processors and in the communication channels during the scheduling process in order to produce better schedules. We demonstrate the effectiveness of our algorithm by comparing with two competing heuristic algorithms available in the literature. >

A list scheduling anomaly

In the design of multiprocessor systems, the scheduling of tasks of a precedence-constrained task graph (representing a parallel program) onto the processors has a critical impact on overall system performance. The multiprocessor scheduling problem is known to be NP-hard in all but a few restricted cases. In this paper, we consider list scheduling heuristic algorithms for the multiprocessor scheduling problem. We show that these algorithms, while scheduling certain task graphs with non-negligible intertask communication, exhibit an anomaly which we call the list scheduling anomaly where the completion time of a task graph on a multiprocessor is more than its completion time on a single processor. Finally, we experimentally characterize the class of task graphs for which the list scheduling anomaly is more prominent.

Scheduling of precedence-constrained parallel program tasks on multiprocessors

The classical multiprocessor scheduling problem is the problem of scheduling the tasks of a precedence-constrained task graph (representing a parallel program) onto the processors of a multiprocessor in a way that minimizes the completion time. This problem has proven difficult both in theory and in practice. In this paper we present a heuristic algorithm for the multiprocessor scheduling problem considering non-negligible inter-task (inter-processor) communication. The algorithm incorporates a better ‘tie-resolution’ and considers contention in the communication channels of the multiprocessor system, thereby producing realistic schedules. Our performance studies of the algorithm show that it displays promising results. Finally, we propose a simple and novel idea of ‘reverse scheduling’ and demonstrate its effectiveness.

Scheduling parallel program tasks onto arbitrary target machines

We extend previous results for optimally scheduling parallel program tasks on a finite number of parallel processors. We introduce a new scheduling heuristic (MH) that schedules program modules represented as nodes in a precedence task graph with communication onto arbitrary machine topology taking contention into consideration. The results for scheduling simulated task graphs on ring, star, mesh, hypercube, and fully connected networks are also introduced. We also present Task Grapher, a tool for studying optimal parallel program task scheduling on arbitrarily interconnected parallel processors. Given a parallel program represented as a precedence-constrained task graph, and an interconnect topology of a target machine, Task Grapher uses one or more of its seven scheduling heuristics to produce the following displays: (1) Gantt Chart Schedule, (2) Speedup Line Graph, (3) Critical Path in Task Graph, (4) Processor Utilization Chart, (5) Processor Efficiency Chart, and (6) Dynamic Activity Display.