Power Supply Domains Research Articles

Feature Selection for Airbone LiDAR Point Cloud Classification

The classification of airborne LiDAR data is a prerequisite for many spatial data elaborations and analysis. In the domain of power supply networks, it is of utmost importance to be able to discern at least five classes for further processing—ground, buildings, vegetation, poles, and catenaries. This process is mainly performed manually by domain experts with the use of advanced point cloud manipulation software. The goal of this paper is to find a set of features which would divide space well enough to achieve accurate automatic classification on all relevant classes within the domain, thus reducing manual labor. To tackle this problem, we propose a single multi-class approach to classify all four basic classes (excluding ground) in a power supply domain with single pass-through, using one network. The proposed solution implements random forests and gradient boosting to create a feature-based per-point classifier which achieved an accuracy and F1 score of over 99% on all tested cases, with the maximum of 99.7% for accuracy and 99.5% for F1 score. Moreover, we achieved a maximum of 81.7% F1 score for the most sparse class. The results show that the proposed set of features for the LiDAR data cloud is effective in power supply line classification.

Emergency Operation in the Power Supply Domain According to ISO 26262

The automotive industry is currently driven by the megatrends electrification, automated driving, and connectivity. To cope with these trends, new functionalities and electric and/or electronic systems must be developed, which require a safe power supply by the power supply system. This leads to increased functional safety requirements for the power supply system, particularly regarding availability. Fault tolerance measures can be implemented to address a safety goal specifying a safety-related availability requirement. In this case, emergency operation (EO) may be necessary to reach a defined safe state. The definitions and examples provided in ISO 26262 focus on cold redundancy, whereby the backup system is not engaged during nominal operation. The objective of this paper is to evaluate EO in the context of ISO 26262 in detail and map the results to an exemplary power supply system architecture implementing cold redundancy. In general, the EO is considered to be free from unreasonable risk even though the actual automotive safety integrity level (ASIL) capability of the item is lower than the initially specified ASIL rating for the hazard due to its timing restrictions. To determine the maximum permissible duration of EO, not just random hardware faults shall be considered; additionally, systematic effects shall be considered. Furthermore, an EO may be entered due to transient faults potentially causing temporary EOs – introducing the necessity of an EO recording, e.g. by accumulating the time of all temporary EOs.

Safety-Related Availability in the Power Supply Domain

The automotive industry is currently driven by the megatrends electrification, automated driving and connectivity. To cope with these trends, new functionalities and electrical and/or electronic (E/E) systems need to be developed and deployed. Independent of the implementation of E/E systems, their power input shall be ensured by the power supply system as a shared resource – leading to increased functional safety requirements for power supply systems. If the loss of an item’s functionality can lead to a hazardous event, a safety goal (SG) specifying a safety-related availability (SaRA) requirement is derived. Thereby, switching to passive mode typically cannot be considered a safe state. To address an SG specifying a SaRA requirement, fault avoidance, fault forecasting and/or fault tolerance measures can be applied. In the case of fault tolerance measures implemented by redundancy, which leads to fail-active behavior, the performance of the backup system during nominal operation and after the first fault can be further refined. In this study, SaRA in the context of ISO 26262 is evaluated in detail and mapped to an example of the power supply domain.

Emergency Operation in the Power Supply Domain Focusing on Warm Redundancy

To cope with the megatrends electrification, automated driving, and connectivity, new functionalities and E/E systems must be developed, which require a safe power supply. This leads to increased functional safety requirements for the power supply system, particularly regarding availability. Fault tolerance measures can be implemented to comply with an SG specifying a SaRA requirement. In this case, EO may be necessary to reach a defined safe state. However, there is some ambiguity in ISO 26262 regarding the necessary integrity with which the EO shall be implemented – this becomes in particular obvious in the case of warm redundancy. According to ISO 26262, the EO is entered once the failure of an element is controlled by an explicit fault handling, i.e., prevented from violating an SG, and the remaining ASIL capability of the item after the failure is lower than the required ASIL capability for the allowed VOS. However, in the context of warm redundancy, the EO can be automatically entered in the case of an element failure without an explicit fault handling. The objective of this paper is to transfer the concept of EO, as defined in ISO 26262, to warm redundancy use cases because warm-redundant power supply systems have a high level of market penetration. Besides a detailed evaluation of time dependencies, new guidelines concerning the required systematic integrity for SMs implementing EO are provided.

Voltage and Current Selector-Based Biasing Topology for Multiple Supply Voltage Circuits

In systems-on-chip there are multiple supply voltage (MSV) designs in which a module is powered by several supply rails. For example, these rails are at 40, 5, and 3.3 V. A safe biasing scheme is needed to ensure no tri-stated biasing conditions can exist, which can result in unintended activation of the power stages or output drivers leading to high currents. It is shown here a safe biasing scheme can be implemented under any power sequencing scheme in MSV designs by exploiting the voltage and current selector topologies. This circuit was implemented in a 40-V, 0.35- $ \mu {\mathrm m}$ , BiCMOS process on a four-channel airbag squib driver IC. The fabricated circuit’s quiescent current is less than 5 mA even if the on chip junction temperature is 175 °C and for various fault conditions that can occur in a multiple power supply domain.

Low energy/delay overhead level shifter for wide‐range voltage conversion

SummaryMulti‐supply voltage systems on chip have been widely explored for energy‐efficient elaborations. A main challenge of multi‐supply voltage designs is the interfacing of digital signals coming from ultra‐low‐voltage core logics to higher power supply domains and/or to input/output circuits. In this work, we propose an energy/delay‐efficient level shifter architecture that is capable of converting extremely low levels of input voltages to the nominal voltage domain. In order to limit static power, the proposed circuit is based on the single‐stage differential cascode voltage switch scheme. To improve switching speed and dynamic energy consumption, our design dynamically adapts the current sourced by the pull‐up network on the basis of the occurring transition. A test chip was fabricated in 180 nm complementary metal–oxide–semiconductor technology to verify the proposed technique. Measurement results show that our design is capable of converting 100 mV of input voltages to 1.8 V, while assuring an average propagation delay of about 26 ns, an average static power of 100 pW, and an energy per transition of 140 fJ for the target voltage‐level conversion from 0.4 to 1.8 V. Copyright © 2016 John Wiley & Sons, Ltd.

Charged Device Model Reliability of Three-Dimensional Integrated Circuits

The interdie signal interfaces in a three-dimensional (3-D) integrated circuit are vulnerable to overvoltage stress induced by charged device model (CDM) ESD, although they do not necessarily lie on any of the main ESD current paths. Circuit simulation shows that the magnitude of the stress is highly sensitive to the design of the ground distribution network on both the die and package levels. The placement of TSVs also impacts the stress generated at the interdie interfaces. If excessive, the voltage stress can be mitigated by placing a small ESD clamp at the interdie signal interface. A power supply domain may span multiple dies in a 3-D stack; this work investigates whether it is possible to remove the clamps from some of the dies in the stack to save silicon area without severely impacting the CDM reliability of the interdie interface circuits.

A CMOS 10-gb/s SONET transceiver

This paper presents a single-chip SONET OC-192 transceiver (transmitter and receiver) fabricated in a 90-nm mixed-signal CMOS process. The transmitter consists of a 10-GHz clock multiplier unit (CMU), 16:1 multiplexer, and 10-Gb/s output buffer. The receiver consists of a 10-Gb/s limiting input amplifier, clock and data recovery circuit (CDR), 1:16 demultiplexer, and drivers for low-voltage differential signal (LVDS) outputs. Both transmit and receive phase-locked loops employ a 10-GHz on-chip LC voltage-controlled oscillator (VCO). This transceiver exceeds all SONET OC-192 specifications with ample margin. Jitter generation at 10.66-Gb/s data rate is 18 mUI/sub pp/ (unit interval, peak-to-peak) and jitter tolerance is 0.6 UI/sub pp/ at 4-MHz jitter frequency. This transceiver requires 1.2V for the core logic and 1.8 V for input/output LVDS buffers. Multiple power supply domains are implemented here to mitigate crosstalk between receiver and transmitter. The overall power dissipation of this chip is 1.65 W.