Power Stage Design Research Articles

Three-Phase 75 kW Brushless Direct Current Motor for Electric Vehicles: Different Power Stage Design, Calculation of Losses, Cooling Techniques, and Comparison

Three-Phase 75 kW Brushless Direct Current Motor for Electric Vehicles: Different Power Stage Design, Calculation of Losses, Cooling Techniques, and Comparison

DC Series Arc Fault Detection and Self- Extinguishing Method With Power Stage Design of Module Level Power Electronics

DC Series Arc Fault Detection and Self- Extinguishing Method With Power Stage Design of Module Level Power Electronics

Thermal design and performance evaluation of GaN power stage in a 4-level totem-pole PFC

Low voltage Gallium Nitride (GaN) power devices are enabling the development of single-phase multi-level power factor correction (PFC) converters for high power density designs due to their superior figure-of-merit. However, despite their lower power losses compared to Si MOSFETs, it is still challenging to remove a few watts of power loss from small packages, which presents a barrier for using GaN in high power converters. To address this issue, this study establishes a 3-D thermal model for chip-scale package GaN devices, and analyses various heat sinking methods for a power stage of a single-phase 4-level PFC structure using the finite element method. The thermal performances of GaN devices with different layouts, board types, and thermal via patterns have been analyzed and verified experimentally on a power stage of a 4-level GaN PFC rated for 3.7 kW, where each of the six GaN devices dissipates 2.3 W.

Non-Isolated Current-Fed Series Resonant Converter with Hybrid Control Algorithms for DC Microgrid

Module-level power electronics can optimize the power generation of photovoltaic panels, which requires a simple topology structure, high power conversion efficiency, and wide voltage gain, corresponding to irradiance variations. This paper proposes a non-isolated current-fed L-C series resonant converter and its control algorithms. The proposed converter can obtain a buck–boost voltage gain with the hybrid control algorithm utilizing the switching frequency modulation and asymmetric pulse width modulation. The proper power stage design can guarantee the soft-switching capability for the entire operating range. Also, the control strategy is designed to obtain a small rms current. The operational principle of proposed converter is analyzed in order to design the resonant tank and control strategy. The performance of designed converter can be verified with the experimental results with a 500 W prototype converter.

Confluence of Integrated Magnetics and TCM for a ZVS Based Higher Order Differential-Mode Rectifier

Two driving performance metrics in modern power-electronic systems are power density and efficiency: usually, improvement in one result in sacrificing the other. In this paper, triangular conduction mode (TCM) is used alongside integrated magnetics to achieve both performance metrics simultaneously. TCM is implemented by extending the switch current high enough to reverse direction and provide enough energy at the onset of the deadtime to discharge the parasitic capacitance of the SiC MOSFET. The elevated current ripple is alleviated by distributing the rectifier low-frequency current among parallel interleaved sub-modules. Taking advantage of the symmetrical topology of the differential mode Ćuk rectifier (DMCR), an integrated interleaved magnetic (IIM) structure is proposed to house all the inductors in a module. In doing so flux cancellation technique is used between the Ac-and Dc-side inductors to reduce the losses and size while using a custom core structure to control the flux coupling between the interleaved windings. A step by step design algorithm is presented to manage the different types of coupling within IIM. Challenges in design, fabrication, and testing of the system are analyzed and appropriate solutions are presented in each section. The solutions are supported by mathematical analysis to optimize the power stage design and validated by circuit as well as finite element simulations. An experimental setup is assembled to test this concept and multiple time-domain and parametric results are presented for proof of the concept in rectifier mode and single module mode.

Analysis of Doherty Power Amplifier Matching Assisted by Physics-Based Device Modelling

The Doherty Power Amplifier represents one of the most promising solutions for the design of high-efficiency power stages. In the widely adopted ABC scheme, the Doherty Amplifier design critically depends on the accuracy of the device model in different operating conditions, ranging from class AB to class C. For the class C case, library models are often inaccurate, while experimental characterization is difficult since it must be carried out in large signal conditions and with varying gate bias. In this paper, we propose an alternative approach, based on physics-based Technological CAD (TCAD) simulations of the complete Doherty amplifier along with the analysis of its individual MAIN (class AB) and AUXILIARY (class C) stages. TCAD simulations seamlessly provide an accurate modelling of the device behavior in all operation classes, including the device turn-on and the nonlinear capacitances, and easily account for the cross-loading effects of the MAIN and AUXILIARY devices through the output network and the effect of the device feedback (gate-drain) capacitance on the input matching. Analyzing a GaAs Doherty stage at 12 GHz, we show that the input phase of the auxiliary stage can be exploited for the Doherty power amplifier optimization in terms of gain, linearity and efficiency, showing a 9 dB gain with less than 1 dB gain variation from back-off to peak power with a power-added efficiency exceeding 45% over a Doherty region extending to a more than 6 dB output power back-off.

Steady-State Analysis of Series-Resonator Buck Converter

The series-capacitor buck converter doubles the duty ratio and equalizes the current between two phases. A series-resonator buck (SRB) converter is realized by adding a resonant tank in series with the series-capacitor <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C_s</i> . All switches turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> at zero voltage, and the low-side switches turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> at zero current. This article focuses on modeling the steady-state operation of the SRB converter. The steady-state model calculates voltage gain, component peak voltages, and resonant inductor peak current. The understanding of the relationships between the voltage gain, regulating variable, and state variables help to optimize the power stage design. The expectations were validated by a 2-MHz converter with a peak efficiency of 98.5%, 48 V at the input and 7 V, 20 A at the output.

Design of Switched-Inductor Charging Regulator for Resistive On-Chip Thermoelectric Generators

On-chip thermoelectric generators (TEGs), unlike bulky off-chip TEGs, are easy to integrate and tiny. A CMOS switched-inductor charging regulator (SLCR) both harvests TEG power & draws battery power to supply Internet-of-Things (IoT) wireless microsensors. However, on-chip TEGs output millivolts, carry <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{M}\boldsymbol{\Omega }$ </tex-math></inline-formula> source resistance R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</sub> , and produce nW power, which demand SLCR to boost low voltage, manage leakage, & maintain high efficiency. Design of such CMOS SLCR power stage often needs prolonged exhaustive tweaking & trial-and-error process. To tackle these challenges, this brief proposes a fundamental theory on the design of nW CMOS SLCR for low-voltage high-R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</sub> applications. With closed-form equations, this theory predicts the optimal power switch, optimal inductor, and optimal current profile, such that SLCR can harvest from the lowest voltage with highest efficiency. This brief provides experimental results with a 180-nm CMOS SLCR power stage prototype. With the theory, an optimal CMOS SLCR power stage can be designed with closed-form equations, without extensive trial-and-error efforts.

In depth mathematical-analysis and experimentation of high-power SiC-FET based single-stage three-phase differential-based flyback inverter with practical design issues for grid-tied applications

This paper presents a detailed mathematical loss-modelling, design, hardware implementation issues, and experimental verification of high-power isolated single-stage three-phase differential-based flyback inverter (DBFI) for grid-tied photovoltaic applications. In addition, this paper studies the loss-modelling analysis of the DBFI components in terms of time and system parameters, which describes the power loss distribution over the circuit components for efficiency enhancement possibility. Also, it studies the practical design issues of DBFI; power stage design, HFT-based F3CC Nano-Crystalline C-Core design, passive elements selection effects on harmonics compensation of grid current waveforms, and the input DC current ripple for PV applications propriety. In addition, the input DC-voltage variation impact on the grid-current THD, system efficiency, and operational power factor are investigated. Also, continuous modulation scheme (CMS) is used to control the proposed DBFI for low-order harmonic components mitigation. The system is simulated by PSIM computer-aided simulator. Then, the proposed system is verified experimentally using a laboratory prototype controlled by TMS320C6713 DSP controller.

High voltage power supply controller for Electrostatic precipitators

Gaseous exhausts from various industries pollute the environment with fly-ash generally filtered by electrostatic precipitators (ESPs) before being released to the atmosphere. This paper presents the development of a controller for ESP power supply. The controller maintains the voltage applied to ESP at its maximum average value by duty cycle control that results in an improvement in dust collection-efficiency. The limiting factor for the output voltage is the breakdown of gas (spark/arc) in the electrode gap of ESP. During a spark/arc condition, the duty cycle limit imposed by the controller causes a reduction in output voltage that leads to the prevention of spark/arc. The present design has a response faster than line frequency power supply controllers. The control circuit is simpler, easy to implement and uses a standard PWM controller IC. The design of power stage uses a flyback current-fed push-pull DC-DC converter with multiple secondary circuits, which has the advantages of instantaneous current limit and less voltage stress on rectifier-diodes. Simulation is performed to obtain a 1 kV, 100 W output from a 24VDC source. The results are compared with experimental values to validate the controller’s ability to achieve good load regulation during normal operation and a reduction in output voltage during spark/arc condition.

Reliable Conversion

P-DUKE Technology presents a new approach to power stage design for supply interruption and change-over in rolling stock applications

Study on 20 V LDMOS With Stepped-Gate-Oxide Structure for PMIC Applications: Design, Fabrication, and Characterization

In this brief, a 20 V laterally diffused metal-oxide-semiconductor (LDMOS) device with the concept of stepped-gate-oxide (SGO) was fabricated with standard 0.15 μm BCD technology. Compared with the conventional shallow-trench-isolation LDMOS (STI-LDMOS), the SGO structure features a straight conduction path on a silicon surface, based on our past development experience, and therefore, an ON-resistance reduction of about 20% can be obtained. This brief demonstrated the LDMOS from a power-switching perspective, considering both optimization design and characterization aspects. The optimum device was demonstrated with R <formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex>$_{ON,sp}$</tex> </formula> of 4.92 mΩ ·mm², breakdown voltage (BV) of 23.8 V, and device figure of merit (FOM) of 20 mΩ -nC. By combining with optimum power stage design, the buck converter efficiency showed 93.88% at low load condition and 93.98% at high load condition, achieving an outstanding dc-dc converting performance.

Design and Control of a Battery Charger/Discharger Based on the Flyback Topology

Devices connected to microgrids require safe conditions during their connection, disconnection and operation. The required safety is achieved through the design and control of the converters that interface elements with the microgrid. Therefore, the design of both power and control stages of a battery charger/discharger based on a flyback is proposed in this paper. First, the structure of a battery charger/discharger is proposed, including the battery, the flyback, the DC bus, and the control scheme. Then, three models to represent the battery charger/discharger are developed in this work; a switched model, an averaged model, and a steady-state model, which are used to obtain the static and dynamic behavior of the system, and also to obtain the design equations. Based on those models, a sliding-mode controller is designed, which includes the adaptive calculation of one parameter. Subsequently, a procedure to select the flyback HFT, the output capacitor, and the Kv parameter based on operation requirements of the battery charger/discharger is presented in detail. Five tests developed in PSIM demonstrate the global stability of the system, the correct design of the circuit and controller parameters, the satisfactory regulation of the bus voltage, and the correct operation of the system for charge, discharge and stand-by conditions. Furthermore, a contrast with a classical PI structure confirms the performance of the proposed sliding-mode controller.

(Invited) 75 kVA 1kV DC 50 kHz Air-Cooled Inverter with 1.7 Kv SiC Mosfet and 3D-Printed Novel Modular Packaging Structure

In recent years, some air-cooled inverters have been developed and demonstrated for grid applications using SiC power modules. All of these SiC power modules utilize the conventional single-side wire-bonding packaging structure, i.e. only one side of the power module is attached to heat sinks. The potential of silicon carbide (SiC) devices, such as high power density, high frequency and high temperature operation, have not been fully explored yet. To deal with this issue, several research efforts have focused on the development of SiC power modules with double sided-cooling capability, utilizing planar packaging structure . These power modules are able to achieve a comprehensive improvement in overall volume / size, parasitic parameters, as well as thermal impedance. However, some key aspects limit the real application of planar packaging structures. One main reason is that double-side solderable SiC devices are generally not commercially available. Other challenges include interconnection alignment issue, limited choices for die-attach material, complicated fabrication process, etc With the goal of exploring SiC device potential without complicated packaging, an all-SiC air-cooled wire-bonding power module and inverter is developed for grid applications based on 3D printing technology enabling: new packaging structure, optimized heat sink, and more-compact system integration.This paper presents the design and development of an 75 kVA, 50 kHz, 1kV air-cooled Silicon Carbide inverter using advance packaging and additive manufacturing technology. Specifically, an air-cooled power module with a new packaging structure is design, aiming at reduced thermal resistance for high temperature and high-power density operation. The detailed research work involves the design of a new packaging structure, wire-bond SiC power module design and fabrication, as well as associated power stage and control circuit design. The total volume of the power module for the prototype is 99725 mm3 a 48% volume reduction volume compared to previous work reported by the authors. The air-cooled module assembly incorporates three major parts: SiC MOSFET phase leg module with split high side and low side switches, a gate driver with cross-talk and short circuit protection functions, and 3D printed module package. In addition , the thermal performance of the inverter is also evaluated and the results show the maximum junction temperature of the bare die is 103C. Based on the air cool module, a 50-kW three phase inverter is developed and tested to further verify the superior thermal performance of the proposed packaging structure. The experimental results show that the peak efficiency is 99.1% at 1kV,50 KHz switching and 50 kW operating condition. Figure 1

1kW Bidirectional 48V-12V DCDC Converter Design Based on Full Bridge CLLC Topology and FDP Controlling Method for Electric Vehicles Application

Present electric vehicles market calls for 1kW bidirectional 48V-12V DCDC converters with high performances. The requirements that isolation and soft switching determine the power stage topology choosing range. Based on previous research results and actual requirements of this application, full-bridge CLLC topology is chosen for further analyses and designs. By properly choosing resonant devices, operating frequency (F), phase shift (P) between power side and load side, and duty (D) of power side, the power system achieves high efficiency with soft switching. Soft switching comes from a small extra time per period with no power transfer. The FPD has respective influences on the performances of the power system. For each one of FDP, there is a balance and two important performances that are conversion efficiency and output voltage accuracy which are listed for illustrating influences of F P D and choosing a best FPD for the whole system. The whole system includes power stage design on PCB and controlling stage design on integrated circuits. FPD can be designed self-adapting respectively and a simple control loop is proposed with adjustable D and settled F P. A proper FPD can achieve over 98.9% efficiency and control loop can be verified workable for load variation.

A fourth‐order bidirectional DC–DC converter for interfacing battery in a solar ‐photovoltaic‐fed low‐voltage residential DC nano‐grid: Design and analysis

SummaryIn this paper, a non‐isolated fourth‐order bidirectional DC–DC converter (FoBiDC) which exhibits continuous input and output current together with minimum‐phase response, both during buck and boost modes, is proposed and analyzed. It is then used to interface a battery in a solar photovoltaic (SPV) fed low‐voltage low‐power residential DC nano‐grid (LVRDNG). The design equations for the converter are derived by performing steady‐state and time‐domain analysis. The small‐signal models are developed and used for designing voltage‐mode controller to regulate the DC bus voltage of LVRDNG and perform stability analysis. The small‐signal analysis reveals the possibility of right‐half plane (RHP) zero and formation of an up–down glitch in the frequency response of converter transfer functions which results in slower dynamic response and increased sub‐system interactions. Therefore, an optimized power stage design methodology, using particle swarm optimization (PSO), is adopted for optimal parameter selection with the aim to shift RHP zero to left‐half plane (LHP) and to mitigate the effect of up–down glitch. The effect of sub‐system interactions, arising due to interfacing of FoBiDC, on other coherently operating converter in the LVRDNG is also analyzed by formulating an integrated small‐signal model of LVRDNG. The scaled down laboratory prototype of FoBiDC and LVRDNG is developed to experimentally validate the steady‐state and dynamic performance. The theoretical and experimental results are found to be in close correlation with each other.

Practical Design Methodology of IH and IPT Dual-Functional Apparatus

A domestic induction heating (IH) apparatus uses series resonance to transfer the electric energy to the IH vessel. Similarly, an inductive power transfer (IPT) utilizes the resonance to transfer power to the secondary side. Therefore, the IPT function can be integrated into the IH apparatus by sharing the IH power stage as the primary side of the IPT. In this article, a practical design methodology of the IH and IPT (IH-IPT) dual-functional apparatus is proposed. The design considerations of the IPT mode are discussed, such as the power stage design limitation and practical implementation to increase the compatibility to the IH apparatus. Moreover, the design methodology of the IPT mode is provided based on the design considerations. The validity of the proposed design methodology is evaluated through experimental results with an IH-IPT prototype.

A Comprehensive Overview in Control Algorithms for High Switching-Frequency LLC Resonant Converter

An LLC resonant converter has been widely used in various industrial applications because of its high cost-effectiveness, high power conversion efficiency, simple design methodology, and simple control algorithms using a pulse frequency modulation (PFM). In addition, the soft switching capability of the LLC resonant converter is good to obtain high switching frequency operations, which can get the high-power density of the power converter. Over the past years, several studies have been conducted to improve the performance of a high switching frequency LLC resonant converter with resonant tank design, optimal power stage design, and enhanced control algorithms. This paper is the review paper in terms of the control algorithms for the LLC resonant converter. It focuses on the overview of the high switching-frequency LLC resonant converter in terms of the control algorithms. The advanced control algorithm can improve power conversion efficiency, dynamic performance, tight output voltage regulation, and small electro-magnetic interference. The operational principles of the control algorithms are briefly explained to show their own characteristics and advantages. Thereafter, the research issues for the future works will be discussed in the conclusion.

A 50-kW Air-Cooled SiC Inverter With 3-D Printing Enabled Power Module Packaging Structure and Genetic Algorithm Optimized Heatsinks

This article presents a systematic power stage design approach for a high-power density air-cooled inverter, which involves the utilization of emerging 1.7 kV silicon carbide (SiC) mosfet bare die engineering samples, heatsinks optimized with genetic algorithm, and built using three-dimensional printing technology and integrated power modules with a novel packaging structure. The developed air-cooled inverter assembly is mainly composed of the SiC mosfet phase leg modules with split high-side and low-side switch submodules, which are attached to two separate heatsinks for increased heat dissipation area and reduced thermal resistance. The heatsink is designed using a co-simulation environment with finite element analysis in COMSOL and genetic algorithm in MATLAB. The primary design procedure, including bare die device characterization, loss calculation, thermal evaluation, and power module development, is elaborated. The proposed design approach is verified and validated through experiments at each stage of development. The experimental results show that the inverter California Energy Commission efficiency is 98.4%, and a power density of 75 W/in3 is achieved with a sufficient junction temperature margin for semiconductor long-term reliability.

Dual-Input Isolated DC-DC Converter with Ultra-High Step-Up Ability Based on Sheppard Taylor Circuit

A dual-input high step-up isolated converter (DHSIC) is proposed in this paper, which incorporates Sheppard Taylor circuit into power stage design so as to step up voltage gain. In addition, the main circuit adopts boosting capacitors and switched capacitors, based on which the converter voltage gain can further be improved significantly. Since the proposed converter possesses an inherently ultra-high step-up feature, it is capable of processing low input voltages. The DHSIC also has the important features of leakage energy recycling, switch voltage clamping, and continuous input-current obtaining. These characteristics advantage converter efficiency and benefit the DHSIC for high power applications. The structure of the proposed converter is concise. That is, it can lower cost and simplifies control approach. The operation principle and theoretical derivation of the proposed converter are discussed thoroughly in this paper. Simulations and hardware implementation are carried out to verify the correctness of theoretical analysis and to validate feasibility of the converter as well.