Power Losses In Devices Research Articles

Analysis of Power Losses and Experimental Method for Determining Resistance in Electric Elevators

To be able to carry out a high-quality analysis of the operation and design of elevator systems with a driving pulley, it is necessary to determine the size of the losses that occur in the drive mechanism and elevator guide rails. The paper defines an experimental procedure for determining the losses and the efficiency coefficient of elevator facilities depending on the relative load of the cabin in operational conditions. The experiment was carried out on a passenger elevator with a rated load of 320 kg and a lifting height of 28 m. An analysis of the resistance, i.e., the source of power losses in vertical lifting devices, was performed, the most significant of which occur and are especially pronounced in worm gear reducers and on the guiding system of the cabin and counterweight, where the type of guiding elements also has an influence. A particular problem is expressed due to the changing state of the contact surfaces (between the guide rails and the guide shoes) during exploitation and the eccentric loading of the cabin. Also, the paper analysed the obtained measurement results to determine the dependence of the efficiency coefficient of the facility concerning the relative load of the cabin.

Switching figure-of-merit, optimal design, and power loss limit of (ultra-) wide bandgap power devices: A perspective

Power semiconductor devices are utilized as solid-state switches in power electronics systems, and their overarching design target is to minimize the conduction and switching losses. However, the unipolar figure-of-merit (FOM) commonly used for power device optimization does not directly capture the switching loss. In this Perspective paper, we explore three interdependent open questions for unipolar power devices based on a variety of wide bandgap (WBG) and ultra-wide bandgap (UWBG) materials: (1) What is the appropriate switching FOM for device benchmarking and optimization? (2) What is the optimal drift layer design for the total loss minimization? (3) How does the device power loss compare between WBG and UWBG materials? This paper starts from an overview of switching FOMs proposed in the literature. We then dive into the drift region optimization in 1D vertical devices based on a hard-switching FOM. The punch-through design is found to be optimal for minimizing the hard-switching FOM, with reduced doping concentration and thickness compared to the conventional designs optimized for static FOM. Moreover, we analyze the minimal power loss density for target voltage and frequency, which provides an essential reference for developing device- and package-level thermal management. Overall, this paper underscores the importance of considering switching performance early in power device optimization and emphasizes the inevitable higher density of power loss in WBG and UWBG devices despite their superior performance. Knowledge gaps and research opportunities in the relevant field are also discussed.

Comparative analysis of control strategies impact on power losses in IGBT power modules with a multiphysics‐circuit coupling method

AbstractPower losses in semiconductor devices present a significant impediment to advancing power electronics systems for achieving higher frequencies, improved efficiency, and greater integration. A major challenge lies in directly coupling power losses with various control strategies, considering the variations in manufacturers, packaging, and process structures within the power electronics field. This paper introduces a field‐circuit coupling simulation methodology of the insulated gate bipolar transistor (IGBT) within the Simulink/COMSOL environment, using a conventional three‐phase six‐switch voltage source inverter (VSI) IGBT module as a case study. A composite transfer function interconnects the electrical and thermal aspects, enabling bidirectional coupling between IGBT temperature and losses. This study aims to comprehensively compare the effects of various control strategies, namely, single‐vector, dual‐vector, and three‐vector current model predictive control (CMPC) and space vector pulse width modulation (SVPWM), on the losses and temperature of IGBT power modules. The findings emphasize that losses are significantly influenced by the selection of weighting factor coefficients and power factor settings under the same CMPC control strategy with a fixed switching frequency. Additionally, the selection of control strategies, such as CMPC and SVPWM, substantially impacts power losses in power electronic devices.

Minimisation of AC Grid Side Input Power Factor Angle for Three-phase AC to Three-phase AC Matrix Converter under Varying Load

Abstract Minimisation of AC grid side input power factor angle for a ‘matrix converter (MC)’ improves the efficiency of the grid. Input volt-ampere requirement is minimum if the current drawn by the ‘MC’ is sinusoidal and input displacement power factor (IDPF) is unity. A MC is inherently capable of maintaining a unity displacement power factor (UDPF) angle at its input terminals. However, the input currents drawn from the grid are not sinusoidal. The high-frequency ripples are suppressed by input current filters (ICFs).These filters additionally introduce a leading phase angle for the current which varies with the loading. This phase lead can be compensated by adjusting the angle between the input current space vector and the input voltage space vector of the MC. The computation of this adjustment angle depends on the estimation of power losses in the switching devices. A simple method is proposed in this paper to estimate the switching losses without measuring device voltages and currents using the perturbation technique. The perturbation logic depends on input current, instantaneous active and reactive power computed at regular intervals of time. The proposed method effectively minimises the IDPF angle very close to zero. The experimental results are included for validation,

Development of Various Types of Independent Phase Based Pulsewidth Modulation Techniques for Three-Phase Voltage Source Inverters

Discontinuous pulse-width-modulation (DPWM) methods have been extensively used in the industrial area to reduce overall losses, which decreases the corresponding thermal stress on the power switches of converters. However, local thermal overload can arise due to different aging conditions of semiconductor devices or failure in the cooling system. This leads to reduced reliability of the converter system due to the low expected lifespan of the most aged switches or phase legs. In this paper, the modified DPWM strategies for independent control of per-phase switching loss are introduced to deal with this matter. The proposed per-phase DPWM techniques are generated by modifying the conventional three-phase DPWM methods for reducing the switching loss in a specific leg, whereas the output performance is not degraded. This paper reports on output performance, including output current total harmonic distortion (THD) and power loss of switching devices, analysis for the various modified DPWM strategies for independent control of per-phase switching loss, which is applicable in 2-level 3-phase voltage source inverters (2L3P VSIs). The results are compared to the corresponding continuous PWM technique to verify and analyze the effectiveness and accuracy of the modified DPWM strategies for independent control of per-phase switching loss.

Active Optimization Method for Power Loss Distribution in T-Type Three-Level Converter Under Half-Wave Symmetry SHEPWM

For high-power converters, it is an important task to optimize the power loss in switching devices. The total power loss affects the efficiency and cooling design of converters, and the uneven power loss distribution causes the switching devices with the highest power loss to age prematurely and shorten the lifespan. Although some low switching frequency modulation strategies can decrease the total power loss, they are not able to balance the power loss distribution. On the contrary, some approaches can balance the power loss distribution by the software and hardware redundancy states of converters only under a high switching frequency. It results in an inability to reduce the total power loss. Therefore, this article proposes an active optimization method for T-type three-level converters to deal with the uneven power loss distribution under a relatively low switching frequency. By analyzing the inner connection between the power loss distribution and 3-order component, the constraint equations of half-wave symmetry selective harmonic elimination pulse width modulation (SHEPWM) are actively redesigned. Thus, both optimization objectives of the power loss can be achieved simultaneously under the proposed SHEPWM. Some numerical analysis and experimental results are given to demonstrate the correctness and feasibility of the proposed method.

An Analytical Model of Dynamic Power Losses in eGaN HEMT Power Devices.

In this work, we present an analytical model of dynamic power losses for enhancement-mode AlGaN/GaN high-electron-mobility transistor power devices (eGaN HEMTs). To build this new model, the dynamic on-resistance (Rdson) is first accurately extracted via our extraction circuit based on a double-diode isolation (DDI) method using a high operating frequency of up to 1 MHz and a large drain voltage of up to 600 V; thus, the unique problem of an increase in the dynamic Rdson is presented. Then, the impact of the current operation mode on the on/off transition time is evaluated via a dual-pulse-current-mode test (DPCT), including a discontinuous conduction mode (DCM) and a continuous conduction mode (CCM); thus, the transition time is revised for different current modes. Afterward, the discrepancy between the drain current and the real channel current is qualitative investigated using an external shunt capacitance (ESC) method; thus, the losses due to device parasitic capacitance are also taken into account. After these improvements, the dynamic model will be more compatible for eGaN HEMTs. Finally, the dynamic power losses calculated via this model are found to be in good agreement with the experimental results. Based on this model, we propose a superior solution with a quasi-resonant mode (QRM) to achieve lossless switching and accelerated switching speeds.

Improved electrical contact property of Si-doped GaN thin films deposited by PEALD with various growth cycle ratio of SiNx and GaN

Gallium Nitride (GaN) is becoming increasingly attractive due to its advantages in efficiency, switching speed, and high temperature operation. Although the performance of GaN in light-emitting devices and power electronics has been significantly improved, the need to reduce the power loss of GaN-based devices still exists. In this paper, Si derived from the SiNx sub-cycle in plasma-enhanced atomic layer deposition (PEALD) was used as a dopant to improve the ohmic contact resistance of GaN. The doping concentration of Si ranging from 0% to 33 at% were obtained by varying the SiNx sub-cycle ratio from 0% to 50%. A 13.56 at% Si-doped GaN film with moderate SiN bonding deposited at a SiNx sub-cycle ratio of 20% exhibits the highest carrier concentration of 1.29 × 1018 cm−3 and the lowest resistivity of 0.78 Ω·cm. The transmission line model (TLM) measurements show that the as-deposited Si-doped GaN has a specific contact resistance of 4.77 × 101 Ω·cm2, which decreases to 8.15 × 10−4 Ω·cm2 after annealing at 500 °C.

Three-level ANPC rectifier loss calculation and balance control method

Traditional three-level neutral-point clamped converter has the problem of the uneven loss distribution, which restricts the increase of converter capacity. Three-level active neutral-point clamped (3L-ANPC) converter can reduce the imbalance of power device loss distribution. At present, three traditional SPWM modulation strategies are used in single-phase three-level ANPC modulation. Considering the loss distribution, it is generally required to input the current and voltage sampling values in real-time and calculate the temperature of the switching device online for control or collect the temperature of the switching device in real-time for feedback control, which is more complicated to realize. This paper proposes a modulation scheme based on two carrier cycles, combined with traditional SPWM1 and 2, to analyze the switching conditions and loss characteristics of each switching device in this scheme. The simulation of a single-phase three-level ANPC rectifier was built, and the experiment was carried out on the Yuankuan HIL semi-physical platform. The results show that this scheme is simple, easy to implement, and can effectively reduce the loss distribution imbalance.

Reliability evaluation of carrier‐based pulse width modulated three‐level F‐type neutral point clamped inverter with power loss analysis

AbstractAn improved carrier‐based pulse‐width‐modulation (CBPWM) technique for a three‐level (3L) F‐type neutral point‐clamped (FNPC) inverter is presented in this paper. By using the proposed modulation scheme, the DC‐link capacitor voltage at the neutral point is balanced. For manufacturers, reliability is one of the major concerns for all power electronics devices and parts. This paper proposes an extensive reliability analysis of the 3L‐FNPC inverter. Considering the mean time to failure (MTTF) of each device, the reliability of the 3L‐FNPC inverter is analyzed in this present work by using two different methods, which are the approximate method and the exact method. To compute the failure rate of the equipment, only the number of components is considered in the approximate method. Alternatively, exact methods are utilized to evaluate the reliability of a system by knowing the different stress levels and various operating environments of a specific system. Because of the strong correlation between device failure and temperature stress factors, power loss analysis is used in the exact method. The MATLAB Simulink environment is used to determine the power loss of the switching devices. A solar off‐grid photovoltaic (PV) system is considered for reliability testing. Experimental mission profile data are used to estimate the lifetime of the 3L‐FNPC inverter by applying the rainflow counting algorithm, the Coffin‐Manson model, and Miner's rule. The competitiveness, effectiveness, and reliability of the 3L‐FNPC inverter with the proposed modulation technique are validated using a hardware prototype.

Loss Evaluation of Magnetic Devices Used in Power Converters

Along with the commercialization of SiC‐MOSFETs and progress in the development of GaN power devices, high‐speed, high‐frequency switching and reduction in conduction loss of power devices are expected. Hence reduction of the size and increase of conversion efficiency of power electronics equipment is greatly expected. On the other hand, even if power devices are switched at high speed and high frequency, the loss of passive devices such as transformers, inductors, and capacitors used in power converters increases, making it difficult to make the power converters smaller than expected. In other words, there is a demand for performance improvements of passive devices from various viewpoints, including miniaturization and low loss, which are compatible with high‐speed, high‐frequency switching operations of power devices. This paper introduces recent research results on loss evaluation methods considering the operating state of passive devices used in small‐to‐medium‐capacity power converters those perform high‐frequency switching operations. © 2023 Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.

Variable Sampling Frequency-Based SM Power Loss Balancing Control for MMCs With Bypassed Faulty SMs

The modular multilevel converter (MMC) is one of the most appropriate topologies for high power applications due to its high modularity and low harmonic distortion. As faulty submodules (SMs) are bypassed, the capacitor voltage and switching frequency of healthy SMs in faulty arm will rise, which causes unbalanced power losses distribution among the arms of MMCs and affects the reliability of MMCs. This paper proposes a variable sampling frequency based power losses balancing control (VSF-PLBC), which can balance power losses distribution among the arms of MMCs through adjusting sampling frequency for arm inserted SM number to modify switching losses in power devices in the MMC with bypassed SMs. The proposed VSF-PLBC can effectively improve the reliability of the MMC with the balanced power losses distribution among the arms in the MMC with bypassed SMs. The proposed VSF-PLBC is simulated with the professional tool PSCAD/EMTDC and is validated on a down-scale MMC prototype. The simulation and experimental results confirm the effectiveness of the proposed VSF-PLBC.

불연속 전압 변조 방법 적용 범위에 따른 태양광 NPC 인버터의 DC-link 커패시터 신뢰성 분석

The voltage modulation method has a significant effect on the performance of 3-level neutral-point clamped (NPC) inverters such as efficiency and output quality. Discontinuous pulse width modulation (DPWM) has been proposed to improve efficiency by reducing the switching loss of power devices. In previous research, the output quality, power loss, and reliability of the power device were considered when the DPWM method was applied. However, the influence of the DPWM on the reliability of DC-link capacitors, one of the reliability-critical components, has not been investigated. In this paper, the effect of DPWM on the reliability of DC-link capacitors is studied in the NPC inverter. Considering the mission profile of the photovoltaic (PV) system, the accumulated damage of DC-link capacitors is analyzed at the component level first under different applied angles of DPWM. The reliability of DC-link capacitors is then evaluated at the system level by considering all capacitors of the NPC inverter. In addition, the current of the DC-link capacitor is analyzed through the experiment to validate the negative effect of the DPWM on the reliability of the DC-link capacitor.

A Performance Optimized CSTBT with Low Switching Loss.

A novel Performance Optimized Carrier Stored Trench Gate Bipolar Transistor (CSTBT) with Low Switching Loss has been proposed. By applying a positive DC voltage to the shield gate, the carrier storage effect is enhanced, the hole blocking capability is improved and the conduction loss is reduced. The DC biased shield gate naturally forms inverse conduction channel to speed up turn-on period. Excess holes are conducted away from the device through the hole path to reduce turn-off loss (Eoff). In addition, other parameters including ON-state voltage (Von), blocking characteristic and short circuit performance are also improved. Simulation results demonstrate that our device exhibits a 35.1% and 35.9% decrease in Eoff and turn-on loss (Eon), respectively, in comparison with the conventional shield CSTBT (Con-SGCSTBT). Additionally, our device achieves a short-circuit duration time that is 2.48 times longer. In high-frequency switching applications, device power loss can be reduced by 35%. It should be noted that the additional DC voltage bias is equivalent to the output voltage of the driving circuit, enabling an effective and feasible approach towards high-performance power electronics applications.

Clamping Modulation Technique for Balancing Power Losses of Dual Inverter With Isolated DC Bus

This paper proposes a clamping modulation technique to reduce and balance power losses in a dual inverter with an isolated DC bus. To drive an open-end winding permanent magnet synchronous motor (OEW-PMSM), dual inverter consisting of six legs has twelve switching actions, twice as many as a two-level voltage source inverter (VSI) per switching period. However, many switching actions cause power losses in switching devices, reducing the efficiency of the system. In this paper, a four-leg clamping modulation technique is presented to reduce the switching actions by analyzing the relationship between two reference voltage vectors of primary and secondary inverters on a space vector plane. To clamp four of the six legs overall, the switching states are determined by combining active and zero vectors during the switching period. The selected vector combinations differ according to 18 sectors divided by the magnitude and angle of the reference voltage vector. The zero vectors required for 18 sectors are then distributed to balance the power losses in upper and lower switching devices of each leg. This technique is implemented with carrier-based pulse width modulation (PWM) by calculating each three-phase reference voltage from two reference voltage vectors composed of the vector combinations. Balancing of the power loss between the upper and lower switching devices is achieved by adding offset voltages corresponding to the zero vector of each sector. The validity of the proposed technique is verified experimentally.

Intelligent Prediction Method for Heat Dissipation State of Converter Heatsink

Currently, the offline manual periodic detection method is a well-established practice in detecting the thermal state of the converter heatsink. This method, however, is huge in maintenance costs. To lower maintenance costs and improve maintenance efficiency in detecting the thermal dissipation state, this paper proposes an intelligent online prediction scheme based on Gauss-Newton iteration method. Firstly, the power loss model of the power module is established according to the characteristics of IGBT and FWD. The power loss of the power device is then calculated in real time with the voltage and current parameters of the converter. Next, the transient thermal model of the heatsink is established based on thermodynamics theory. And the calculation method of steady thermal resistance of heatsink based on Gauss-Newton iteration method is proposed according to the model. The transient thermal impedance data allow for timely prediction of thermal resistance of the heatsink and characterize the thermal state of the heatsink. Finally, with the help of DSP28377D, an experimental platform is built to verify the scheme. Results show that this method can realize intelligent prediction of thermal state online.

A Novel Full-Bridge Step Density Modulation for Wireless Power Transfer Systems

Aiming for wireless power transfer (WPT) systems with high efficiency demands inverters under zero-voltage switching (ZVS) conditions. This letter presents a novel full-bridge step density modulation (FB-SDM) for WPT systems based on the step density averaging principle, which can achieve full-range ZVS operation. Compared with existing ZVS modulation schemes, such as pulse density modulation and hybrid frequency pacing, the proposed modulation scheme has the ability of balancing power device losses and the minimum low frequency output fluctuation. Simulation and experimental results prove that FB-SDM is one of the most potential ZVS modulation schemes for WPT systems.

Efficacy of STC in High Frequency Full-Bridge DC–DC Converter

In full-bridge dc–dc converter, the transformer is used to provide requisite voltage translation and safety isolation. For control of secondary-side variable(s) the control-actuation takes place at its primary. Converter's thermal deign presumes that the average flux in core in an integral switching-cycle is zero and the magnetizing current is negligible to ensure optimum core loss and, particularly, power loss in primary switching devices at turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> would be optimally small. The choice of control function should not disturb this basic precondition. Though, proportional plus integral control is mostly used, complex super twisting control (STC) is being rigorously tried as an apt alternate. The selection of its two gains is based on worst-case dynamic process behavior. This article addresses that such process-behavior-based gain-selection may not work well, particularly, when the actuation is through a transformer having nonlinear excitation characteristics. Using practical approach, this article elaborates that an optimally designed transformer, driven by high-gain STC, introduces dc bias in core leading to higher switching losses, poor operating duty-cycle of the system and the worst is, it could drive the transformer to saturation inviting reliability issues. The article further details with practical results an alternate high-gain control function for a high-frequency full-bridge dc–dc converter that generates superior effectiveness.

Transformer Based 25-Level T-Type MLI for Renewable Energy Integration

The primary challenge with cascaded H-bridge multilevel inverters (MLI) is the need of a large number of switching components and distinct dc-sources for integration of renewable energy to medium voltage grid. As a result, in these types of systems, component minimization is crucial. With the advent of transformer cascaded multilevel inverters (TCMIs), multiple dc sources in cascaded H-Bridge (CHBs) are no longer required for operation. According to the findings of this research, a novel transformer cascaded MLI with 25 levels and 12 switches can be implemented using a single dc source. The proposed MLI is comprised of two different rated isolated transformers. The proposed MLI topology offers the structural advantage of fewer semiconductor components, provides self-galvanic isolation, and generates uniform voltage levels for all turn's ratio. Furthermore, the MLI employs a switching mechanism known as nearest level control, which reduces device power loss and, hence, enhances the systems overall efficiency. To assess the performance of the proposed TCMLI, a laboratory prototype was built and simulations in the MATLAB/Simulink environment were run. In addition, a study of the systems power loss analysis has been presented. A comparison of the proposed topology to other recent topologies of a similar nature is also provided.

Multi-Objective Optimal Dispatching and Operation Control of a Grid Connected Microgrid Considering Power Loss of Conversion Devices

Multi-Objective Optimal Dispatching and Operation Control of a Grid Connected Microgrid Considering Power Loss of Conversion Devices