Power Factor Correction Topology Research Articles

Performance Analysis of Meta-Heuristic Algorithms for Optimal PI Tuning of PFC

The popularity of the average current mode (ACM) controlled boost type power factor correction (PFC) topologies is increasing due to their suitability for power quality problems. Proportional-Integral (PI) controller method is generally used in ACM controlled boost PFC circuits which include two controllers. However, the most important complexity of ACM controlled PFC circuits is tuning the coefficients of the PI controllers optimally. Therefore, this paper proposes the optimal tuning of PI coefficients used in ACM controlled boost PFC circuits using different meta-heuristics algorithms. First, the proposed ACM controller-based boost PFC topology is analyzed in MATLAB/Simulink software by using variable loads. Then the simulation results of the Cuckoo Optimization Algorithm (COA) based ACM controlled boost PFC converter are compared with the results determined via Ziegler-Nichols (ZN), Genetic Algorithm (GA), Particle Swarm Optimization (PSO), Imperialistic Competitive Algorithm (ICA), and Invasive Weed Optimization (IWO). Finally, the experimental verification of the topology has been done using a 600 W prototype and eZdsp F28335. As COA showed better results among other evolutionary algorithms used in this paper, we used COA parameters to observe the performance of the proposed tuning method. The experimental studies have been done under different load variations similar to the simulation studies.

State-of-the-art power factor correction in EV charger

With the vigorous development of the automobile industry, the exploitation of oil resources has gradually deepened, which has led to the gradual depletion of oil resources. In this situation, electricity has come to replace oil resources in the automobile industry. However, in the charging process of electric vehicles, the use of the efficiency of electric energy is particularly important. If the efficiency is low, then a lot of power is lost in the power transmission line or alternating magnetic field conversion. And an important factor affecting efficiency is the power factor. The traditional AC-DC converter with a full bridge has low power utilization and efficiency, existing studies combine full-wave bridge with other circuits with different functions to form power factor correction (PFC) topologies. And these fundamental topologies continue to develop, derived from the bridgeless, interleaved PFC topologies, etc. This paper reviews the fundamental full-wave bridge PFC topologies and some derived bridgeless PFC topologies and interleaved parallel PFC topologies, including showing their circuit diagrams, explaining the operation principle of these circuits and comparing the advantages and disadvantages of each PFC topology.

Design and Control of Two Stage Battery Charger for Low Voltage Electric Vehicles Using High Gain Buck-Boost PFC AC-DC Converter

The design and control of a two-stage onboard battery charger (OBC) for the low-voltage electric vehicle (LVEVs) are presented in this study. The presented charger operates over a wide range of AC input voltage at high power factor. The presented charger utilizes a bridgeless high gain high power factor AC-DC converter with continuous input current characteristics at its front end. At the back end of the charger, an isolated Cuk DC-DC converter is employed to control and implement different battery charging modes, viz. constant current (CC) and constant voltage (CV) charging profiles. The presented AC-DC converter operates under discontinuous current mode (DCM) operation and achieves minimum control complexity at the AC-DC stage. The DCM design and high voltage conversion ratio allow it to function reliably over a comprehensive range of input and intermediate DC link voltage. This study covers the charger's design for a power rating of 650 W and output battery voltage of 24 to 72 V. The overall operational analysis and effectiveness of the design are verified through both simulations and experimental implementation and the performance is compared with other contemporary power factor correction (PFC) topologies on various parameters.

Bridgeless Modified High-Step-Up Gain SEPIC PFC Converter Based Charger for Light EVs Battery

This study presents a two-stage on-board charger for light electric vehicles (LEVs) with low voltage battery (24-72V). The front-end of the charger has characteristics of high voltage conversion ratio and unity power factor operation achieved by a bridgeless high gain modified SEPIC converter. The high voltage conversion ratio enables the front-end to operate over a wide range of input voltages. At the back-end of the charger, an isolated positive output Luo DC-DC converter is employed to regulate the charging profile of the LEV battery under constant current (CC) and constant voltage (CV) charging modes. The presented charger operates in discontinuous conduction mode (DCM), which has dual advantages of having inherent feature of power factor correction (PFC) at the supply end along with significantly reducing the complexity of control mechanism, thereby reducing the cost and effort of control implementation. The operational analysis and design of the presented charger in DCM are covered in detail in this study and the same are further validated by means of simulations. A 650 W test bench setup is developed to authenticate the theoretical performance by means of experimental results. The experimental performance of the front-end is finally compared with other PFC topologies to highlight the merits and demerits of the presented charger.

Fractional fuzzy PI controller using particle swarm optimization to improve power factor by boost converter

The power circuit of AC voltage controller capable of operating at a leading, lagging, and unity power factor is studied by a lot of researchers in the literature. Circuits working with high switching frequency are known as power factor correctors (PFCs). The single-phase boost converter has become the most popular topology for power factor correction (PFC) in general purpose power supplies. Power factor correction circuit provides conventional benefits to electric power systems. The benefits are the reduction of power factor penalty and utility bill and power loss. Therefore, a boost converter power factor correction scheme is presented in this paper. A PI, fuzzy logic PI and fractional order PI (FOPI) controllers are used to fix an active shaping of input current of the circuit and to improve the power factor. The controller parameters (coefficients) are optimized using the Particle Swarm Optimization (PSO) algorithm. Average current mode control (ACMC) method is used in the circuit. The converter circuit consists of a single-phase bridge rectifier, boost converter, transformer and load. A mathematical model of the plant is required to design the PI controller. A model for power factor correction circuit is formed in MATLAB/Simulink toolbox and a filter is designed to reduce THD value. The proposed model is simulated using a combination of PI, fuzzy logic and FOPI controllers. The control scheme is applied to 600 Watt PFC boost converter to get 400 Volt DC output voltage and 0.99 power factor. The input voltage is 230 VRMS with 50 Hz. The combination of FOPI and PI controller has the best solution to control the power factor according to PI and fuzzy controllers.

Implementation of a strategy to improve the efficiency of battery chargers with double conversion topology, high power factor, and low THDi

This paper presents a comparison between different Power Factor Correction topologies (PFC), highlighting the main advantages and disadvantages of the implementation requirements for a battery charger. Subsequently, the cascade connection of boost and buck converters is selected, for which a detailed loss analysis is performed, whose results are used to develop an operating strategy that allows the controller to act on a range of combinations of duty cycles to maximize the efficiency of the converters, maintaining adequate levels of voltage and current regulation, efficient regulation of battery recharge, high power factor, and low THDi. Finally, this converter is implemented with the mentioned operating strategy to perform constant power battery recharging, and the experimental results are presented with special emphasis on efficiency, power factor, and THDi, the latter being compared with the IEC 61000-3-2 standard.

A Unified Differential Mode Noise Estimation Method and Filter Size Comparison in Single-Phase Multileg and Multilevel Totem-Pole PFC Converters

Wide band-gap power devices have enabled single-phase totem-pole (TP) power factor correction (PFC) converter designs to be switched at several tens of kHz under hard-switching and hundreds of kHz under soft-switching. It is straight-forward to analyze and compare the volume of boost inductor for TP PFC converters having multi-leg and multi-level configurations operating under continuous-conduction-mode (CCM) and critical-conduction-mode (CrM) at various switching frequencies; however, the impact of topology and switching frequency selections remains unchallenged for generated differential mode (DM) noise. This paper proposes a unified and generalized DM noise estimation method for multi-leg, and multi-level TP PFC converters operated under both CCM and CrM operation modes. The method has been verified with simulation results obtained from various TP PFC topologies, as well as experimental results obtained from single-leg CCM and 4-Level CCM TP PFC converters. The empirically determined boxed sizes of DM filters have been compared among various TP PFC topologies, and the best switching frequency for each topology has been determined with the integration of boost inductor volume comparison.

Magnetic Components Reduction in a Three-Phase PFC Converter by Using a Reconfigurable LCL Filter

Three-phase power factor correction (PFC) converters are the front-end stage of the power conversion that are required to be connected to the grid with a proper filter to meet international standards. A high-order <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LCL</i> filter is a widely used solution to reduce the component size of the filter although it requires six inductors. In this article, a novel reconfigurable <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LCL</i> filter that consists of only three inductors is proposed. The principle of the reconfigurable filter is to fully utilize the converter-side inductors by changing their position from the converter side to the grid side and vice versa. The filter is reconfigured by using three low-frequency (LF) bidirectional switches. The ultimate goal of the proposed topology is to reduce the magnetic components by half and achieve comparable grid current quality as the conventional topology. The proposed PFC topology is verified by a 1-kW experimental prototype. All the experimental results agree with the theoretical concepts and prove that the grid current quality of the proposed topology is comparable with the conventional topology.

Non-Isolated Power Factor Corrected AC/DC Converter with High Step-Down Voltage Ratio for Low-Power Applications

This paper proposes a high step-down ratio AC-DC converter employing a quadratic buck converter with power factor correction. Conventional active power factor correction topologies employ boost-based correction schemes for unity power factor operation. This will require a steeper step-down ratio and higher switch voltage stress apart from complexity in the control scheme with sensors. The structure of the proposed topology is developed by combining the power factor correction stage with a high step-down stage. The passive input filter is split up into two for the purpose of reducing the thermal heating apart from offering a higher power factor. A single switch operation reduces the complexity of the control scheme. In addition, the number of conducting devices during the current path is also the same as the conventional buck converter due to cascading and hence offers lower conduction losses. The need for the converter to operate at an extremely low duty cycle is reduced due to the quadratic stage structure. The proposed converter operates at a moderate duty cycle, offering higher step-down voltage apart from reducing filtering requirements. MATLAB R2020b is used for carrying out simulation studies. Xilinx FPGA-based controller using system generator is implemented for the generation of pulses of appropriate duty cycle. Simulation and experimental results for a 150 W prototype are presented. An investigation and comparative evaluation of the conventional bridgeless buck system with the quadratic buck converter are carried out. The proposed structure offers the benefit of a higher step-down voltage ratio incorporating an inherent power factor correction stage along with the AC/DC stage.

A High-Efficiency Isolated PFC AC–DC Topology With Reduced Number of Semiconductor Devices

A new three-level isolated ac–dc power factor correction (PFC) topology with a minimum number of semiconductor devices is the focus of this article. This topology provides a high input power factor (PF), soft-switching, and higher efficiency than existing isolated ac–dc converters. Furthermore, the proposed circuit has lower voltage rating requirements for the secondary side devices, which leads to a lower total cost and minimizes total converter losses. This article presents a theoretical analysis describing the complete characterization of this new topology, and experimental results on a 1-kW prototype showing high PF and efficiency throughout the operating range.

Power Factor Correction Using a Series Active Filter

Abstract: Power factor correction (PFC) for single-phase diode rectifiers utilising a series active filter is demonstrated in this project at a minimal cost. When compared to the typical PFC, the suggested PFC has reduced power device ratings requirements, which results in cheaper costs and improved efficiency. It can also eliminate the requirement for a large inductor in the typical PFC, making it more compact. This study examines the proposed PFC's topology, operating principle, and application concerns. The control approach and simulation results are presented in detail. Prototypes of 1-kW are made and the experimental findings are shown to verify the theoretical analysis. Index Terms: Harmonic resonance, hybrid active filter, industrial power system.

A comprehensive review on advanced charging topologies and methodologies for electric vehicle battery

The rise of greenhouse gas levels in the atmosphere is a severe climate change concern. A significant part, such as CO2 emission, comes from internal combustion engine-driven vehicles, incited the automotive sector to focus more on the sustainable electric transportation system. However, electric vehicles face significant charging time, charging methods, and range anxiety challenges. To overcome these challenges, charging technologies for electric vehicle batteries play an essential role. Many types of electric vehicle charging topologies have been discussed in the literature and implemented in many practical applications. This paper presents a state of art criticism of advanced converter topologies and charging methodology for electric vehicle applications. Apart from the conventional topologies, this manuscript has covered the comparative criticism of the recently proposed EV charging technologies regarding charging methods, control strategies, and power levels. Further, this paper discussed the different onboard chargers with their power factor correction topologies, drawbacks, and required corrections. This manuscript provides the research directions for the academic and industrial communities.

Review on State-of-the-Art Unidirectional Non-Isolated Power Factor Correction Converters for Short-/Long-Distance Electric Vehicles

Electrification of the transportation sector has originated a worldwide demand towards green-based refueling infrastructure modernization. Global researches and efforts have been pondered to promote optimal Electric Vehicle (EV) charging stations. The EV power electronic systems can be classified into three main divisions: power charging station configuration (e.g., Level 1 (i.e., slow-speed charger), Level 2 (i.e., fast-speed charger), and Level 3 (i.e., ultra-fast speed charger)), the electric drive system, and the auxiliary EV loads. This paper emphasizes the recent development in Power Factor Correction (PFC) converters in the on-board charger system for short-distance EVs (e.g., e-bikes, e-trikes, e-rickshaw, and golf carts) and long-distance EVs (passenger e-cars, e-trucks, and e-buses). The EV battery voltage mainly ranges between 36 V and 900 V based on the EV application. The on-board battery charger consists of either a single-stage converter (a PFC converter that meets the demands of both the supply-side and the battery-side) or a two-stage converter (a PFC converter that meets the supply-side requirements and a DC-DC converter that meets the battery-side requirements). This paper focuses on the single-phase unidirectional non-isolated PFC converters for on-board battery chargers (i.e., Level 1 and Level 2 charging infrastructure). A comprehensive classification is provided for the PFC converters with two main categories: (1) the fundamental PFC topologies (i.e., Buck, Boost, Buck-Boost, SEPIC, Ćuk, and Zeta converters) and (2) the modified PFC topologies (i.e., improved power quality PFC converters derived from the fundamental topologies). This paper provides a review of up-to-date publications for PFC converters in short-/long-distance EV applications.

Design and Implementation of a Single-Stage PFC Active-Clamp Flyback Converter with Dual Transformers

This paper proposes an AC/DC single-stage structure by integrating a boost topology and an active clamp flyback (ACF) circuit with power-factor-correction (PFC) function. The PFC function can be achieved by controlling a boost PFC topology operated in the discontinuous conduction mode. With the coordination of active clamping components, a resonant technique is obtained and zero-voltage-switching (ZVS) can be achieved. The proposed converter is combined with the advantages of: (1) compared with two-stage circuit, a single stage circuit decreases the component of the main circuit and reduces the complexity of the control circuit; (2) a boost topology with PFC function operated in discontinuous conduction mode can be accomplished without adding any current detecting technique or detecting input signal; (3) by using the inductor from the PFC stage, ZVS function can be achieved without any additional inductor; (4) the increment of switching frequency facilitates the optimization of power density; (5) the conducting loss at the secondary side can be reduced by adding the synchronous rectification; (6) in this proposed scheme, the dual transformers with series-parallel connection are utilized, the current at the secondary side can be shared for lowering the conduction loss of the synchronous transistors. Finally, a prototype converter with AC 110 V input and DC 19 V/6.32 A (120 W) output under 300 kHz switching frequency is implemented. The efficiency of the proposed converter reaches 88.20% and 0.984 power factor in full load condition.

Optimal Design Analysis with Simulation and Experimental Performance Investigation of High-Power Density Telecom PFC Converters

The spread of the 5G technology in the telecom power applications increased the need to supply high power density with higher efficiency and higher power factor. Thus, in this paper, the performance of the different power factor correction ( PFC ) topologies implemented to work with high power density telecom power applications are investigated. Two topologies, namely the conventional and the bridge interleaved continues-current-conduction mode (CCM) PFC boost converters are designed. Selection methodology of the switching elements, the manufacturing of the boost inductors, and the optimal design for the voltage and current control circuits based on the proposed small signal stability modeling are presented. The printed circuit board (PCB) for the two different PFC topologies with a power rating of 2 kW were designed. PSIM simulation and the experiments are used to show the supply current total harmonic distortions (THD), voltage ripples, power efficiency, and the power factor for the different topologies with different loading conditions.

A Review on Quadratic Boost Topology-Based PFC Techniques

Electronic devices require DC voltage for their operation so rectification (AC to DC conversion) is needed to convert AC voltage from the mains to DC. During this conversion, harmonics are generated in the system as well as power factor (PF) gets poor hence degrading power quality. Power factor correction (PFC) converters are being commonly used to increase PF and reduce harmonics. Boost PFC Converter is the mostly used topology for active power factor correction because of several benefits like series input inductor, high PF, but its voltage gain is not that good and it has output voltage ripple. Quadratic Boost PFC Converter can be used to overcome these two drawbacks by providing high voltage gain and less outputvoltage ripples. This paper represents applications and topologies of Quadratic Boost Converter, latest control techniques to achieve high voltage gain, regulated output and, high PF. Also, comparison is made between Boost Converter and Quadratic Boost PFC Converter. Finally, conclusion is made of this survey

Evaluation of the Perspective Power Transistor Structures on Efficiency Performance of PFC Circuit

The aim of this work is to investigate the influence of circuit elements on the properties of the selected power factor correction (PFC) topology. Active or passive PFC serves to increase the power factor (PF) and reduce the total harmonic distortion (THD) of the mains current. As a result, the distribution network is lightened due to its interference caused by connected electronic devices. An important indicator of all electronic converters is efficiency. Therefore, the work deals with the analysis of possible efficiency improvements in conjunction with the use of technologically new active components. Detailed experimental analyses and optimization procedures are performed in terms of the influence of transistor structures (SiC and GaN) on the qualitative indicators of the proposed PFC converter for a wide operating spectrum. The synthesis of the obtained results is given, together with recommendations for optimal selection and optimal design of PFC main circuit elements with regard to achieving peak efficiency values.

Unbalance characteristics of fundamental and harmonic currents of three‐phase electric vehicle battery chargers

Three-phase electric vehicle (EV) battery chargers are expected to not impact the unbalance of distribution networks; moreover, using active power factor correction topologies they are expected to behave like resistive loads not affecting the system harmonic distortion. In this study, unexpected unbalance characteristics of fundamental and harmonic currents of three-phase EV battery chargers are analysed by means of experimental tests performed on two EV cars of different technology. In order to quantify unbalance and harmonic distortion, proper comprehensive indices, in part developed in this study with specific reference to currents, are utilised. The unbalanced current absorbed even under ideal voltage balanced supply conditions by one of the two EV tested is shown and quantified constituting a real-life case study of endogenous unbalance. Then, the influence of voltage unbalance supply conditions on fundamental and harmonic currents is evaluated by means of a proposed testing procedure, obtaining case studies of exogenous unbalance. The experimental results obtained for the two EVs should be extended to a larger set of cars; anyway, they show the need, before moving forward to full grid EV connection, for utilities and for designers to improve the current standard certification process and the control performances of three-phase battery chargers.

Bridgeless PFC Topology Simplification and Design for Performance Benchmarking

Compared with conventional power factor correction topologies, although dual-converter cell-based bridgeless topologies usually have higher efficiency, most of them suffer from high component counts. Thus, this article proposes general topology simplification methods for these topologies. Besides, several selected converter cells are exemplified to show the specific topology simplification processes, and the performance of the resultant simplified topologies is reviewed. Meanwhile, based on the same design specifications, in order to provide an unbiased quantitative topology comparison in terms of power loss, cost, and volume, this article introduces a consistent component database-based design procedure with electrical, thermal, and cost models. As case studies, the conventional and two selected bridgeless buck–boost-type topologies are compared by following the design procedure. The comparison results are analyzed to provide a reference for topology selection. Three prototypes are built and tested to verify the theoretical analysis.

Single-Phase Bridgeless PFC Topology Derivation and Performance Benchmarking

This article introduces two general ways to derive single-phase bridgeless power factor correction (PFC) topologies and then, 15 accessible bridgeless topologies are derived based on the configuration of different basic types of dc–dc converter cells. Although the majority of the topologies have been previously proposed, other possible research points are reviewed. Besides, a consistent component sizing procedure with electric, thermal, and cost models is applied to conduct the performance benchmarking of these PFC topologies in terms of power loss, volume, and cost. Three boost-type PFC topologies are chosen as examples to demonstrate the procedure and the corresponding benchmarking results with both theoretical analyses and experimental verification. Finally, mission profiles of one specific application are introduced to show the material cost payback period of adopting one modified bridgeless boost topology instead of conventional one in different scenarios.