Abstract

This article introduces two general ways to derive single-phase bridgeless power factor correction (PFC) topologies and then, 15 accessible bridgeless topologies are derived based on the configuration of different basic types of dc–dc converter cells. Although the majority of the topologies have been previously proposed, other possible research points are reviewed. Besides, a consistent component sizing procedure with electric, thermal, and cost models is applied to conduct the performance benchmarking of these PFC topologies in terms of power loss, volume, and cost. Three boost-type PFC topologies are chosen as examples to demonstrate the procedure and the corresponding benchmarking results with both theoretical analyses and experimental verification. Finally, mission profiles of one specific application are introduced to show the material cost payback period of adopting one modified bridgeless boost topology instead of conventional one in different scenarios.

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