Power Factor Correction Rectifier Research Articles

A new bridgeless buck PFC rectifier

SummaryIn this study, a new bridgeless buck power factor correction (PFC) rectifier is presented. The proposed buck PFC rectifier is designed to operate in the discontinuous conduction mode (DCM). Because of the DCM operation, the control scheme of the proposed buck PFC rectifier is simple and easy, and the reverse recovery problem of the diodes can be alleviated. Because the input current follows the input voltage naturally, the current loop circuit is not required. Thus, only the traditional voltage‐mode control is employed to sense the output voltage, and a suitable control effort for the proposed buck PFC rectifier is generated to drive the power switches. Consequently, the output voltage of the proposed buck PFC rectifier can be kept at a desired value. Finally, the mathematical deductions and experimental results are provided to verify the effectiveness of the proposed bridgeless buck PFC rectifier. Copyright © 2016 John Wiley & Sons, Ltd.

A Multimode 1-MHz PFC Front End With Digital Peak Current Modulation

This work presents a novel mixed-signal control scheme for a boost power factor correction (PFC) rectifier. The digital controller modulates the inductor peak current to produce a low-distortion ac line current in discontinuous conduction mode (DCM) and continuous conduction mode (CCM), without the need for average current sensing. A lookup table (LUT) optimizes efficiency at low input currents, by allowing operation at 125–500-kHz DCM based on calculated thresholds. At high input currents, the converter operates at 1-MHz CCM for reduced inductor footprint. An analog off-time generator with a digital frequency locked loop facilitates CCM operation, eliminating the need for slope compensation in the current loop and reduces frequency variations. The LUT is programmed with an adaptive output voltage of 250/450 V for low/high mains line voltage (85–265 Vrms) to optimize efficiency over a broad range of conditions. The 150-W PFC prototype operates up to 1 MHz with a peak efficiency of 95% and a total harmonic distortion of 5%.

A Three-Phase Multilevel Hybrid Switched-Capacitor PWM PFC Rectifier for High-Voltage-Gain Applications

In this paper, a three-phase multilevel power factor correction rectifier using the hybrid switched-capacitor concept is proposed. The converter is suitable for high-voltage-gain applications from conventional three-phase low-voltage sources. The three-level voltage operation reduces the weight and bulk of the magnetic devices. The main advantages of the proposed converter are low number of active switches, high voltage gain, sinusoidal currents, low voltage stress across all components, and simple control. Both steady-state and dynamic analyses are investigated. Experimental results for a 7500-W/220-V-to-1600-V laboratory prototype with maximum efficiency of 97.78% are presented and discussed.

Zero‐voltage‐transition bridgeless power factor correction rectifier with soft‐switched auxiliary circuit

This study presents a zero-voltage-transition (ZVT) bridgeless power factor correction (PFC) rectifier, which uses an auxiliary circuit with a transformer to achieve soft-switching for the main power switches. With the auxiliary circuit, the main switches can be ZVT turned-on without any additional voltage or current stresses. In addition, the auxiliary switch is turned-off with zero-current switching. Therefore, the switching loss of all power switches is reduced, and the overall rectifier efficiency is improved. The circuit topology, operation analysis and the components selection of the proposed rectifier are described in detail. Finally, a laboratory prototype of 700 W is implemented and tested to verify the performance of the proposed PFC rectifier.

Performance Comparison of PI and P Compensation in DSP-Based Average-Current-Controlled Three-Phase Six-Switch Boost PFC Rectifier

In this paper, it is shown that in the three-phase six-switch boost power factor correction rectifier with average-current control with mismatched input-voltage and input-current sensing gains as well as offset errors in input-voltage and input-current sensing, the current controller with proportional (P) compensation exhibits lower total harmonic distortion (THD) and higher power factor compared with that of proportional and integral compensation. It is also shown that P compensation with input-voltage feedforward is effective in improving output-voltage transient response with respect to input-voltage changes only if duty-cycle feedforward is also implemented. Finally, it is shown that zero-sequence-signal injection, in addition to enabling the output-voltage regulation in a wider input-voltage range, also improves the THD of the input currents.

A Series Arc Fault Detection Strategy for Single-Phase Boost PFC Rectifiers

This paper proposes a series arc fault detection algorithm which incorporates peak voltage and harmonic current detectors for single-phase boost power factor correction (PFC) rectifiers. The series arc fault model is also proposed to analyze the phenomenon of the arc fault and detection algorithm. For arc detection, the virtual dq transformation is utilized to detect the peak input voltage. In addition, multiple combinations of low- and high-pass filters are applied to extract the specific harmonic components which show the characteristics of the series arc fault conditions. The proposed model and the arc detection method are experimentally verified through a boost PFC rectifier prototype operating under the grid-tied condition with an artificial arc generator manufactured under the guidelines for the Underwriters Laboratories (UL) 1699 standard.

A Gallium Nitride-Based Power Module for Totem-Pole Bridgeless Power Factor Correction Rectifier

The totem-pole bridgeless power factor correction (PFC) rectifier has recently gained popularity for ac-dc power conversion. The emerging gallium nitride (GaN) high-electron-mobility transistor (HEMT), having a small body diode reverse recovery effect and low switching loss, is a promising device for use in the totem-pole approach. The design, fabrication, and thermal analysis of a GaN-based full-bridge multi-chip module (MCM) for totem-pole bridgeless PFC rectifier are introduced in this work. Four cascode GaN devices using the same pair of high-voltage GaN HEMT and low-voltage silicon (Si) power metal-oxide-semiconductor field-effect transistor (MOSFET) chips, as used in the discrete TO-220 package, were integrated onto one aluminum nitride direct-bonded-copper (AlN-DBC) substrate in a newly designed MCM. This integrated power module achieves the same function as four discrete devices mounted on the circuit board. In this module design, the Si and GaN bare die were arranged in a stack-die format for each cascode device to eliminate the critical common source inductance, and thus to reduce parasitic ringing at turn-off transients. In addition, an extra capacitor was added in parallel with the drain-source terminals of the Si MOSFET in each cascode GaN device to compensate for the mismatched junction capacitance between the Si MOSFET and GaN HEMT, which could accomplish the internal zero-voltage switching of the GaN device and reduce its turn-on loss. The AlN-DBC substrate and the flip-chip format were also applied in the module design. This GaN-based MCM shows an improved heat dissipation capability based on the thermal analysis and comparison with the discrete GaN device. The totem-pole bridgeless PFC rectifier built using this integrated power module is expected to have a peak efficiency of higher than 99% with a projected power density greater than 400 W/in3.

A Novel Control Scheme for Power Factor Improvement in Modified Bridgeless Boost Converter

In Green Energy technologies like wind energy conversion systems and Domestic applications like SMPS and UPS systems, the input voltage amplitude and input frequency are time varying in nature. Fast-Escalating and extremely challenging high efficiency requirements for AC-DC power supplies for notebooks, desktop computers are to minimize the power losses (Conduction losses). In the conventional rectifiers power losses are more and power factor is poor resulting in loss of efficiency. Normally, the bridgeless topologies, also referred to as dual boost power factor correction (PFC) rectifiers, may reduce the conduction losses by reducing the number of semi-conductor components in the line current path. Power supply units have to make the load compatible with the source. The presence of non-linear load results in poor power factor operation and produces harmonic components in the line. So PFC techniques are necessary to meet harmonic regulations and standards such as IEC 61000-3-2 and IEEE 519. A modified bridgeless topology may be used for such applications. A novel switching controller is developed that regulates the input resistance to a desired value. Hence input power factor is unity and also the total harmonic distortion is controlled to a tolerable limit. In the proposed model, the modified bridgeless boost converter is activated in to a pure resistance mode. Finally the performance of the modified bridgeless boost converter is compared with the existing basic bridgeless boost converter.

Simulation and Practical Analysis on Power Factor Correction Techniques for Welding Applications

The most of the industrial welding applications involving of electronic circuits such as AC-DC, and DC-AC and AC-DC converters. The input power factor of such a system is reduced due to the presence of more harmonics due to the non-linear devices within the converters which leads to creates more adverse effects. There by a need of suitable AC-DC converter with power factor correction technique to condition the supply current. The power factor correction rectifier that requires best current control from i) Peak current control ii) Average current control and iii) Hysteresis current control. This paper presents a comparative analysis from above mentioned power factor correction control topologies. The simulation of these control techniques are carried out using “Plecs” with “MATLAB/SIMULINK”. The simulation results shows that Hysteresis control has low THD, good DC link voltage regulation and better performance than other control techniques. The same control technique is implemented in TMS320F2812 DSP and results are proved.

Startup Procedure for DSP-Controlled Three-Phase Six-Switch Boost PFC Rectifier

In three-phase applications, the six-switch boost power factor correction rectifier is the most widely employed topology because of its good performance and cost effectiveness. A vast amount of literature that deals with this circuit is exclusively focused on various control schemes aimed at optimizing different aspects of its steady-state and/or transient performance. However, almost no literature is available on its startup procedure, which is an indispensable part of control design of any practical circuit. To fill this gap, in this paper, a detailed startup procedure is described. This three-step startup procedure ensures that the inrush currents stay below a specified level and that the output voltage increases monotonically to its reference value, i.e., it does not exhibit any overshoot. The proposed startup procedure is illustrated with MATLAB/Simulink simulation waveforms and also experimentally verified.

Thermal analysis and improvement of cascode GaN device package for totem-pole bridgeless PFC rectifier

The totem-pole bridgeless power factor correction (PFC) rectifier has a simpler topology and higher efficiency than other boost-type bridgeless PFC rectifiers. Its promising performance is enabled by using high-voltage gallium nitride (GaN) high-electron-mobility transistors, which have considerably better figures of merit (e.g., lower reverse recovery charges and less switching losses) than the state-of-the-art silicon metal-oxide-semiconductor field-effect transistors. Cascode GaN devices in traditional packages, i.e., the TO-220 and power quad flat no-lead, are used in the totem-pole PFC boost rectifier. But the parasitic inductances induced by the traditional packages not only significantly deteriorate the switching characteristics of the discrete GaN device but also adversely affect the performance of the built PFC rectifier. A new stack-die packaging structure with an embedded capacitor has been introduced and proven to be efficient in reducing parasitic ringing at the turn-off transition and achieving true zero-voltage-switching turn-on. However, the thermal dissipation capability of the device packaged in this configuration becomes a limitation on further pushing the operating frequency and the output current level for high-efficiency power conversion. This paper focuses on the thermal analysis of the cascode GaN devices in different packages and the GaN-based multichip module used in a two-phase totem-pole bridgeless PFC boost rectifier. A series of thermal models are built based on the actual structures and materials of the packaged devices to evaluate their thermal performance. Finite element analysis (FEA) simulation results of the cascode GaN device in a flip-chip format demonstrate the possibility of increasing the device switching speed while maintaining the peak temperature of the device below 125 °C. Thermal analysis of the GaN-based power module in a very similar structure is also conducted using the FEA method. Experimental data measured using the fabricated devices and modules validate the simulation results. The developed new package in a flip-chip configuration enhances the thermal dissipation capability of the cascode GaN device in the stack-die format. The GaN-based power module built using the same packaging structure also demonstrates desirable thermal performance.

Implementation of Bridgeless Cuk Power Factor Corrector With Positive Output Voltage

A single-phase bridgeless Cuk ac/dc power factor correction (PFC) rectifier with positive output voltage is proposed in this paper. For low output voltage product applications, the rectifier is designed to convert high input voltage to low output voltage. Due to no bridge diodes required and thus decreased input conduction losses, the proposed rectifier efficiency can be improved. The proposed rectifier operates in discontinuous conduction mode, and the current-loop circuit is hence not needed. In addition, only a single switch is used in the rectifier to simplify the control circuit design. A simple translation method to have the positive output voltage in the Cuk converter is presented in the rectifier to reduce the component counts and the cost. The operational principles, steady-state analysis, and design procedure of the proposed rectifier are addressed in detail in this paper. Simulation and experimental results obtained from a 150-W rated prototype circuit with input of 90-130 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> , 60 Hz, and output of 48 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> have verified the validity of the proposed rectifier.

Closed Loop Analysis of Bridgeless SEPIC Converter for Drive Application

In this paper closed loop analysis of Single phase AC-DC Bridgeless Single Ended Primary Inductance Converter (SEPIC) for Power Factor Correction (PFC) rectifier is analyzed. In this topology the absence of an input diode bridge and the due to presence of two semiconductor switches in the current flowing path during each switching cycle which will results in lesser conduction losses and improved thermal management compared to the conventional converters. In this paper the operational principles, Frequency analysis, and design equations of the proposed converter are described in detail. Performance of the proposed SEPIC PFC rectifier are carried out using Matlab Simulink software and results are presented.

An FPGA-based Fully Digital Controller for Boost PFC Converter

This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

Three-Phase Multilevel PFC Rectifier Based on Multistate Switching Cells

This paper presents a three-phase multilevel power factor correction (PFC) rectifier employing multistate switching cells. A generalized converter structure is presented based on the connection of switching networks of Vienna-type rectifier topologies through multiinterphase transformers (MIPTs). The resulting rectifier presents the intrinsic benefits to the employed building blocks and the ones added by a modular construction that enables the reduction of passive components and overall losses. The operation of the PFC rectifier is described, including appropriate modulation and control strategies. Design guidelines for the magnetic components are derived for the MIPTs, boost inductors, and power semiconductor devices. Finally, a lab prototype is used to present experimental results. This prototype is rated at 7.5 kW and uses a modular structure to assemble a four legs per phase rectifier. Efficiency above 98% from 40% load and IEC61000-3-2 requirements are observed.

Single-Phase Bridgeless Zeta PFC Converter with Reduced Conduction Losses

This paper presents a new single phase front-end ac-dc bridgeless power factor correction (PFC) rectifier topology. The proposed converter achieves a high efficiency over a wide range of input and output voltages, a high power factor, low line current harmonics and both step up and step down voltage conversions. This topology is based on a non-inverting buck-boost (Zeta) converter. In this approach, the input diode bridge is removed and a maximum of one diode conducts in a complete switching period. This reduces the conduction losses and the thermal stresses on the switches when compare to existing PFC topologies. Inherent power factor correction is achieved by operating the converter in the discontinuous conduction mode (DCM) which leads to a simplified control circuit. The characteristics of the proposed design, principles of operation, steady state operation analysis, and control structure are described in this paper. An experimental prototype has been built to demonstrate the feasibility of the new converter. Simulation and experimental results are provided to verify the improved power quality at the AC mains and the lower conduction losses of the converter.

Low-Volume PFC Rectifier Based on Nonsymmetric Multilevel Boost Converter

This paper introduces a digitally controlled single-phase rectifier with power factor correction (PFC) based on a modified three-level boost converter topology. In comparison with the conventional boost-based systems, the new PFC rectifier has about three times smaller inductor and significantly lower switching losses. The improvements are achieved by replacing the output capacitor of the boost converter with a nonsymmetric active capacitive divider, with a 3:1 division ratio, and by utilizing the downstream converter stage for the capacitive divider's center-tap voltage regulation. The nonsymmetric voltage divider and applied switching sequence effectively provide four-level converter behavior using the same number of components as three-level converters. As a result, a 66% reduction of the inductor compared to the conventional boost-based PFC and a 33% compared to the standard three-level solutions operating at the same effective switching frequencies are also achieved. Experimental results obtained with a 400 W, 200 kHz, universal input voltage (85 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> -265 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> ) PFC prototype demonstrate three times smaller inductor current ripple than that of the conventional boost converter allowing for the same inductor reduction. Efficiency improvements of up to a 6% are also demonstrated.

Three-Level NPC Inverter Based SVM-VCIMD with Feed-forward Active PFC Rectifier for Enhanced AC Mains Power Quality

This paper presents a Scott-transformer-based power factor correction (PFC) rectifier for a three-level neutral-point-clamped (NPC) inverter-fed induction motor drive (IMD) for enhanced power quality at ac mains. Here, the Scott-transformer-based PFC rectifier is digitally controlled by a current feedforward control. The torque component of the stator current is added to the output of the dc-bus voltage proportional plus integral (PI) controller as a feedforward term, which enhances the dynamic performance of the dc-bus voltage regulation. The three-level NPC inverter is controlled by a space vector-modulated (SVM) indirect vector control scheme. The performance of the proposed dc-bus voltage loop with feedforward control is compared with the conventional one and found to offer faster response with less overshoot and undershoot. The proposed IMD system is simulated using MATLAB/Simulink and the same is validated experimentally. The proposed drive system is analyzed for a wide variation in reference speed and load torques demonstrating significant improvement in the performance indices.

An Approach of Power Factor Correction in BLDC Motor Drives Using Cuk Derived Converters

This paper deals with a comparative analysis of various converter topologies for Power Factor Correction (PFC) in BLDC motor drives. A power factor corrected converter is required for improving power quality at the AC mains of an inverter fed BLDC motor drive. Conventionally, the BLDC motor is fed by a diode bridge rectifier (DBR) which results in highly distorted supply current and a poor power factor. A new bridgeless single-phase ac–dc Cuk derived topology has been introduced for power factor correction. This bridgeless topology uses minimum number of switches and thus reduces the less conduction losses compared with the conventional PFC rectifier. There are three cuk derived configurations for power factor correction. In this paper, all the cuk derived topologies are investigated and compared. The best topology is identified and recommended for PFC in BLDC motor drive.

High Switches Utilization Single-Phase PWM Boost-Type PFC Rectifier Topologies Multiplying the Switching Frequency

Decades of research have seen single-phase boost-type pulse-width modulation converters be employed as front-end power factor correction (PFC) rectifiers in commercial power supplies. The benefits of employing this technology to comply with power quality standards while assuring high efficiency, low volume, and weight have been observed. However, this paper shows that further efforts can be driven toward new topologies. In this context, novel single-phase rectifier circuits are introduced. These are able to double or triple the ripple frequency present at the input components. Furthermore, a high utilization of the switches is observed during both positive and negative grid half-cycles. The theoretical analysis of the proposed topologies as well as their operation in PFC applications are presented and different operation modes are proposed and a comparison with a state-of-the-art PFC rectifier is presented. Finally, experimental verification of a PFC rectifier doubling the switching frequency is presented in a 1-kW prototype employing a current self-control strategy.