Three different groups of metal-oxide-semiconductor devices were manufactured of bond-and-etchback silicon-on-insulator wafers where the buried oxide functioned as the gate dielectric. The groups differed in the procedure used to clean the surfaces prior to bonding and in the location of the bonded interface. The surfaces were cleaned using either the standard RCA cleaning procedure without HF dip or by rinsing in de-ionized water only. The location of the bonded interface was in the buried oxide or at its interface toward a silicon wafer. The RCA-cleaned devices with the bonded interface within the buried oxide were found to degrade severely under bias temperature stress. This degradation was evident from both oxide charging and an increase in the density of states at the Si/SiO2 interface for negative gate biases. For positive biases the most prominent effect was lateral nonuniform charging of the oxide. The lateral nonuniformities might be connected to voids formed by ammonia desorption during postbonding annealing. Devices rinsed in de-ionized water prior to bonding and devices with a homogeneous oxide showed only slight degradation after bias temperature stress. Electron injection by internal photoemission showed that the buried oxides contained electron traps with capture cross sections corresponding to Coulomb attractive traps. The different processing conditions did not affect the trap cross section but influenced the trap density Nt. Devices with the bonded interface within the buried oxide had Nt≊1×1011 cm−2 in the case of RCA cleaning and Nt≊4×1010 cm−2 for de-ionized water rinsing. The devices with a homogeneous oxide had Nt≊4×109 cm−2. Electron trapping in the Coulomb attractive traps was accompanied by a corresponding increase in the density of states at the thermally grown Si/SiO2 interface for devices with a bonded buried oxide. SIMS investigations revealed a correlation between the degradation upon stress and hydrogen concentration in the devices with bonded oxides.