post-CMOS Micromachining Research Articles

A Miniaturized CMOS-MEMS Amperometric Gas Sensor for Rapid Ethanol Detection

This study presents the design and implementation of a chip-scale amperometric ethanol sensor using the standard commercially available complementary metal oxide semiconductor (CMOS) process together with the post-CMOS micromachining processes. The presented amperometric sensor consists of a suspended plate with a microhole structure as the working electrode, a fully anchored plate with a microhole structure as the counter electrode, and a microcavity as the electrolyte reservoir. The metal and dielectric layers inherent in the standard CMOS process are exploited to realize these structures. The electrode with a microhole structure could enhance its surface area to improve the sensitivity of the sensor. The suspended working electrode covered a thinner Nafion <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\text {R}}$ </tex-math></inline-formula> layer could facilitate gas diffusion to shorten the response time of the sensor. To characterize the ethanol sensing, a Ni film is deposited on the working electrode. Measurements indicate the presented sensor has a sensing range of ppm (20–1000 ppm) at room temperature. Moreover, its sensitivity and response time are, respectively, 0.01 nA/ppm and 6 s. The presented design shows the CMOS-MEMS is a promising approach to realize the amperometric ethanol sensor.

CMOS-MEMS technologies for the applications of environment sensors and environment sensing hubs

The booming growth in environmental conditions sensing and monitoring pushes the need of inexpensive environment sensors with small size and low power consumption. The outbreak of COVID-19 further increases the need for fast monitoring of environment conditions. The micro-electrical-mechanical-systems (MEMS) technologies are considered as promising solutions to realize the required environment sensors. The mature complementary metal-oxide-semiconductor (CMOS) process platforms available in many foundries can be extended to fabricate MEMS sensors to offer the advantage of relatively easier commercialization. Moreover, by leveraging the characteristics of CMOS process platforms, the integration of multiple sensors and sensing circuits to form a compact sensing system can also be achieved. This review paper will focus on introducing the miniaturized environmental sensing devices implemented and integrated using the CMOS-MEMS technologies. In general, the CMOS chips for environment sensing are firstly fabricated using the foundry-available CMOS processes, and then the post-CMOS micromachining processes are performed to implement the CMOS-MEMS environment sensors. This paper respectively reviews five different environment sensors (including the infrared, pressure (barometer), humidity/temperature, and gas sensors) using the CMOS-based MEMS technologies. The advantages and design concerns of sensors fabricated by different CMOS and post-CMOS processes are introduced and discussed. Moreover, the CMOS-MEMS environment sensing hub implemented through the monolithic integration of multiple environment sensors is also introduced.

Non-initial overlap bulk silicon comb-drive actuator with low-voltage and large-displacement

Two different kinds of bulk-Si comb-drive actuators are designed in this work: initial overlap comb-drive actuator and non-initial overlap comb-drive actuator. They are fabricated by a simple post-CMOS bulk micromachining process. A cascade folded beam is designed to achieve large displacement at low driving voltages. And non-initial overlap and unequal wide comb fingers are used to reduce the side instability and improve the pull-in voltage. The measurement results show that the non-initial overlap comb-drive actuator improves the pull-in voltage by 73.3% than the initial overlap comb-drive actuator, and the maximum displacement of the non-initial overlap actuator is larger by 78.9% than that of the initial overlap actuator.

Post micromachining of MPW based CMOS–MEMS comb resonator and its mechanical and thermal characterization

In recent years micro electro mechanical system (MEMS) based micro resonant sensors have been given a lot of attention due to their potential as a platform for the development of many novel physical, chemical, and biological sensors. That is why this paper covers post processing of the structures fabricated through Multi-Project-Wafer using 0.35 µm MIMOS CMOS technology with particular focus on dry etching of Si and SiO2 from the front side of CMOS---MEMS chip that is optimized using aluminum coated carrier wafer and achieved results are debris free as compared to photoresist coated carrier wafer. The device is etched through from the front side to avoid parasitic capacitances and squeeze film damping by keeping minimum size of the die. The etching of SiO2 as well as deep Si etch-through using the same plasma etcher (SS110A Tegal) is successfully demonstrated in this work. Finally, after the successful post CMOS micromachining of the device, resonance frequency i.e. 8164 Hz and quality factor i.e. 51.34, is determined. The joule heating effect due to the passing of current through the central shuttle of the device is characterized. The maximum temperature close to the anchors of the comb resonator where the piezoresistors are located is determined through temperature coefficient of resistance measurement using PE-4RF type probe station and it is found to be 37.62 °C.

Fabrication and Characterization of a CMOS-MEMS Humidity Sensor.

This paper reports on the fabrication and characterization of a Complementary Metal Oxide Semiconductor-Microelectromechanical System (CMOS-MEMS) device with embedded microheater operated at relatively elevated temperatures (40 °C to 80 °C) for the purpose of relative humidity measurement. The sensing principle is based on the change in amplitude of the device due to adsorption or desorption of humidity on the active material layer of titanium dioxide (TiO2) nanoparticles deposited on the moving plate, which results in changes in the mass of the device. The sensor has been designed and fabricated through a standard 0.35 µm CMOS process technology and post-CMOS micromachining technique has been successfully implemented to release the MEMS structures. The sensor is operated in the dynamic mode using electrothermal actuation and the output signal measured using a piezoresistive (PZR) sensor connected in a Wheatstone bridge circuit. The output voltage of the humidity sensor increases from 0.585 mV to 30.580 mV as the humidity increases from 35% RH to 95% RH. The output voltage is found to be linear from 0.585 mV to 3.250 mV as the humidity increased from 35% RH to 60% RH, with sensitivity of 0.107 mV/% RH; and again linear from 3.250 mV to 30.580 mV as the humidity level increases from 60% RH to 95% RH, with higher sensitivity of 0.781 mV/% RH. On the other hand, the sensitivity of the humidity sensor increases linearly from 0.102 mV/% RH to 0.501 mV/% RH with increase in the temperature from 40 °C to 80 °C and a maximum hysteresis of 0.87% RH is found at a relative humidity of 80%. The sensitivity is also frequency dependent, increasing from 0.500 mV/% RH at 2 Hz to reach a maximum value of 1.634 mV/% RH at a frequency of 12 Hz, then decreasing to 1.110 mV/% RH at a frequency of 20 Hz. Finally, the CMOS-MEMS humidity sensor showed comparable response, recovery, and repeatability of measurements in three cycles as compared to a standard sensor that directly measures humidity in % RH.

Post-CMOS compatible high-throughput fabrication of AlN-based piezoelectric microcantilevers

A post-complementary metal oxide semiconductor (CMOS) compatible microfabrication process of piezoelectric cantilevers has been developed. The fabrication process is suitable for standard silicon technology and provides low-cost and high-throughput manufacturing. This work reports design, fabrication and characterization of piezoelectric cantilevers based on aluminum nitride (AlN) thin films synthesized at room temperature. The proposed microcantilever system is a sandwich structure composed of chromium (Cr) electrodes and a sputtered AlN film. The key issue for cantilever fabrication is the growth at room temperature of the AlN layer by reactive sputtering, making possible the innovative compatibility of piezoelectric MEMS devices with CMOS circuits already processed. AlN and Cr have been etched by inductively coupled plasma (ICP) dry etching using a BCl3–Cl2–Ar plasma chemistry. As part of the novelty of the post-CMOS micromachining process presented here, a silicon Si (1 0 0) wafer has been used as substrate as well as the sacrificial layer used to release the microcantilevers. In order to achieve this, the Si surface underneath the structure has been wet etched using an HNA (hydrofluoric acid + nitric acid + acetic acid) based solution. X-ray diffraction (XRD) characterization indicated the high crystalline quality of the AlN film. An atomic force microscope (AFM) has been used to determine the Cr electrode surface roughness. The morphology of the fabricated devices has been studied by scanning electron microscope (SEM). The cantilevers have been piezoelectrically actuated and their out-of-plane vibration modes were detected by vibrometry.

A V-Band Three-State Phase Shifter in CMOS-MEMS Technology

A V-band CMOS-MEMS switchable phase shifter based on reflection-type topology is presented in this work. The phase shifter is fabricated in 0.18- $\mu{\rm m}$ CMOS process with a chip size of 1.04 ${\rm mm}^{2}$ , wherein the suspended MEMS structure is released through the post-CMOS micromachining. Three discrete phase states, including 0 $^{\circ}$ , 89 $^{\circ}$ , 144 $^{\circ}$ at 65 GHz, can be achieved by the bi-directional fishbone actuators under 46-V actuation voltage. The measured insertion loss is $2.2\pm 1~{\rm dB}$ and the return loss is better than 14 dB over the 55–65 GHz frequency range, demonstrating a great potential in many applications.

Integration of solid-state nanopores in a 0.5 μm CMOS foundry process

High-bandwidth and low-noise nanopore sensor and detection electronics are crucial in achieving single-DNA-base resolution. A potential way to accomplish this goal is to integrate solid-state nanopores within a CMOS platform, in close proximity to the biasing electrodes and custom-designed amplifier electronics. Here we report the integration of solid-state nanopore devices in a commercial complementary metal–oxide–semiconductor (CMOS) potentiostat chip implemented in On-Semiconductor’s 0.5 μm technology. Nanopore membranes incorporating electrodes are fabricated by post-CMOS micromachining utilizing the n+ polysilicon/SiO2/n+ polysilicon capacitor structure available in the aforementioned process. Nanopores are created in the CMOS process by drilling in a transmission electron microscope and shrinking by atomic layer deposition. We also describe a batch fabrication method to process a large of number of electrode-embedded nanopores with sub-10 nm diameter across CMOS-compatible wafers by electron beam lithography and atomic layer deposition. The CMOS-compatibility of our fabrication process is verified by testing the electrical functionality of on-chip circuitry. We observe high current leakage with the CMOS nanopore devices due to the ionic diffusion through the SiO2 membrane. To prevent this leakage, we coat the membrane with Al2O3, which acts as an efficient diffusion barrier against alkali ions. The resulting nanopore devices also exhibit higher robustness and lower 1/f noise as compared to SiO2 and SiNx. Furthermore, we propose a theoretical model for our low-capacitance CMOS nanopore devices, showing good agreement with the experimental value. In addition, experiments and theoretical models of translocation studies are presented using 48.5 kbp λ-DNA in order to prove the functionality of on-chip pores coated with Al2O3.

Integration, processing and performance of low power thermally tunable CMOS-SOI WDM resonators

Ring waveguide resonating structures with high quality factors represent a key component in silicon photonic links. We demonstrate experimentally and validate numerically spectral tuning with a high efficiency of photonic ring structures when manufactured in a commercial 130 nm SOI CMOS technology with localized removal of back-side substrate using silicon micromachining methods. A comprehensive analysis is reported on the thermal tuning efficiency of tunable ring devices as a function of the ring’s size, type of thermal tuner and amount of back- and front-side post-CMOS micromachining. We further propose a path to maintain a high tuning efficiency of photonic devices with partially or completely removed SOI silicon substrate upon their hybridization to electronic driver chips. Such a platform opens up additional options for increased on-chip system functionality and dense integration in 3-D.

Localized Growth of Carbon Nanotubes on CMOS Substrate at Room Temperature Using Maskless Post-CMOS Processing

Carbon nanotubes (CNTs) have been successfully synthesized on foundry CMOS substrate using maskless post-CMOS surface micromachining and localized heating techniques. The integrated heater is directly made of gate polysilicon and suspended over a micromachined cavity for thermal isolation. The synthesized CNTs are connected to CMOS interconnect metal layers without the need of any metal deposition. It is experimentally verified that the electrical properties of the neighboring CMOS transistors are unchanged after CNT growth.

Design of millimeter-wave MEMS-based reconfigurable front-end circuits using the standard CMOS technology

This paper describes the designs of three reconfigurable CMOS-MEMS front-end components for V-/W-band applications. The suspended MEMS structure is released through post-CMOS micromachining. To achieve circuit reconfigurability, dual-state and multi-state fishbone-beam-drive actuators are proposed herein. The reconfigurable bandstop is fabricated in a 0.35 µm CMOS process with the chip size of 0.765 × 0.98 mm2, showing that the stop-band frequency can be switched from 60 to 50 GHz with 40 V actuation voltage. The measured isolation is better than 38 dB at 60 GHz and 34 dB at 50 GHz, respectively. The bandpass filter-integrated single-pole single-throw switch, using the 0.18 µm CMOS process, demonstrates that insertion loss and return loss are better than 6.2 and 15 dB from 88 to 100 GHz in the on-state, and isolation is better than 21 dB in the off-state with an actuation voltage of 51 V. The chip size is 0.7 × 1.04 mm2. The third component is a reconfigurable slot antenna fabricated in a 0.18 µm CMOS process with the chip size of 1.2 × 1.2 mm2. By utilizing the multi-state actuators, the frequencies of this antenna can be switched to 43, 47, 50.5, 54, 57.5 GHz with return loss better than 20 dB. Those circuits demonstrate good RF performance and are relatively compact by employing several size miniaturizing techniques, thereby enabling a great potential for the future single-chip transceiver.

Two-Dimensional Multi-Channel Neural Probes With Electronic Depth Control

This paper presents multi-electrode arrays for in vivo neural recording applications incorporating the principle of electronic depth control (EDC), i.e., the electronic selection of recording sites along slender probe shafts independently for multiple channels. Two-dimensional (2D) arrays were realized using a commercial 0.5- μm complementary-metal-oxide-semiconductor (CMOS) process for the EDC circuits combined with post-CMOS micromachining to pattern the comb-like probes and the corresponding electrode metallization. A dedicated CMOS integrated front-end circuit was developed for pre-amplification and multiplexing of the neural signals recorded using these probes.

Implementation of the CMOS MEMS Condenser Microphone with Corrugated Metal Diaphragm and Silicon Back-Plate

This study reports a CMOS-MEMS condenser microphone implemented using the standard thin film stacking of 0.35 μm UMC CMOS 3.3/5.0 V logic process, and followed by post-CMOS micromachining steps without introducing any special materials. The corrugated diaphragm for the microphone is designed and implemented using the metal layer to reduce the influence of thin film residual stresses. Moreover, a silicon substrate is employed to increase the stiffness of the back-plate. Measurements show the sensitivity of microphone is −42 ± 3 dBV/Pa at 1 kHz (the reference sound-level is 94 dB) under 6 V pumping voltage, the frequency response is 100 Hz–10 kHz, and the S/N ratio >55 dB. It also has low power consumption of less than 200 μA, and low distortion of less than 1% (referred to 100 dB).

A Low-Power Low-Noise Dual-Chopper Amplifier for Capacitive CMOS-MEMS Accelerometers

This paper reports a novel dual-chopper amplifier (DCA) and its application to monolithic complementary metal-oxide semiconductor-microelectromechanical systems accelerometers. The DCA design minimizes the power consumption and noise by chopping the sensing signals at two clocks. The first clock is a high frequency for removing the flicker noise while the second clock is a significantly lower frequency to keep the unit gain bandwidth low. A monolithic three-axis accelerometer integrated with the DCA on the same chip has been successfully fabricated using a post-CMOS micromachining process. The measured noise floors are 40 μ g/√Hz in the x - and y -axis and 130 μ g/√Hz in the z -axis, and the power consumption is about 1 mW per axis.

Complementary Metal–Oxide–Semiconductor Micro-Electro-Mechanical-System Reconfigurable Cantilever Resonator with Multiple Electrostatic Electrodes

In this paper, we present a prestress vertical comb drive resonator with a frequency tuning capability. The resonator consists of three sets of comb fingers, which act as driving electrodes. The comb fingers are fabricated along with a composite beam. One end of the composite beam is clamped to the anchor, whereas the other end is elevated vertically by the residual stress. A clamped force, which is formed by a DC voltage, is utilized to restrain the vibration of the composite beam. By applying a DC clamped voltage and a driving voltage in different electrodes, the resonator exhibits different frequency responses. The device is fabricated through a 0.35 µm complementary metal–oxide–semiconductor (CMOS) process with a post-CMOS micromachining process. Experimental results indicate that the initial resonant frequency of the device is 18.6 kHz, and the maximum frequency tuning range up to 28.5% is obtained. The resonator device can recover its original frequency without causing any structural damage.

Self-Aligned Thermoelectric Infrared Sensors With Post-CMOS Micromachining

In this letter, we report the fabrication and characterization of CMOS-compatible self-aligned thermoelectric infrared (IR) sensors. Since etching windows for structure release are patterned by a self-aligned process, the fabrication complication is reduced and a narrow etching window can be patterned. Additionally, the self-aligned process reduces the thermal conductance of the thermopile structure, since the film thickness around the sidewall of the thermocouple is reduced. Two self-aligned thermoelectric IR sensors with rectangular and circular structures are fabricated. The responsivity, detectivity, and time constant are 43.5 V/W, 2.51 × 107 cm · Hz1/2/W, and 14.1 ms for the rectangular IR sensor and 31.8 V/W, 3.25 × 107 cm · Hz1/2/W, and 12.6 ms for the circular IR sensor, respectively.

Integrated micromachined thermopile IR detectors with an XeF2 dry-etching process

Based on the Seebeck effect, the CMOS compatible micromachined thermopile is widely used in infrared detection for its advantages of low-cost, high batch yield, broad spectral response and insensitivity to ambient temperature. We present two integrated thermopile IR detectors on stacked dielectric layers realized by a standard P-well CMOS technology, followed by one CMOS compatible maskless XeF2 isotropic dry-etching step. Characterizations of CMOS devices, before and after XeF2 etching, respectively, were performed to investigate the effects of XeF2 etching on the CMOS devices. With a 2.5 µm thick stacked silicon oxide–nitride–oxide layer as an absorber, the rectangular thermopile detector and the circular thermopile detector provided responsivity of 14.14 and 10.26 V W−1, specific detectivity of 4.15 × 107 and 4.54 × 107 cm Hz1/2 W−1, and time constant of 23.7 and 14.6 ms, respectively. Compared with the rectangular thermopile detector, the circular thermopile detector is mechanically more stable, because its circular structure design eases the internal stress problem in the CMOS layers. After XeF2 etching, the maximum changes of threshold voltage, maximum transconductance and switching threshold voltage were 0.97%, 1.25% and 0.08%, respectively. Experimental results show that the effects of XeF2 etching on the CMOS devices are insignificant, and XeF2 etching is suitable for post-CMOS micromachining.

CMOS-SOI-MEMS Transistor for Uncooled IR Imaging

This paper reports the design, fabrication technology, post-CMOS micromachining and characterization of CMOS-silicon-on-insulator (SOI)-microelectromechanical system (MEMS) transistors. The thermally isolated micromachined CMOS-SOI-MEMS transistor reported here is designed for uncooled infrared (IR) sensing and is dubbed here as ldquoTMOS.rdquo The measured dc and noise electrical characteristics of the as-processed (virgin) transistor as well as those of the post-CMOS-MEMS-processed transistor (TMOS) are reported and compared. In particular, the threshold voltage temperature dependence and the temperature coefficient of current (TCC) at subthreshold are reported. The results indicate that the post-CMOS-MEMS processing does not degrade the performance of the transistors. The electrooptical performance of the TMOS is characterized and reported. With TCC on the order of 4%-10%, depending on the gate voltage, responsivity of 40 mA/W, noise equivalent power on the order of several tens of picowatts, and calculated noise equivalent temperature difference on the order of 64 mK, this uncooled IR sensor in standard CMOS-SOI technology may provide a high performance at a lower cost compared to state-of-the-art uncooled sensors based on bolometers implemented in non-CMOS materials like vanadium oxide or amorphous silicon.

A piezoresistive cantilever for lateral force detection fabricated by a monolithic post-CMOS process

This paper presents a post-CMOS process to monolithically integrate a piezoresistive cantilever for lateral force detection and signal processing circuitry. The fabrication process includes a standard CMOS process and one more lithography step to micromachine the cantilever structure in the post-CMOS process. The piezoresistors are doped in the CMOS process but defined in the post-CMOS micromachining process without any extra process required. A partially split cantilever configuration is developed for the lateral force detection. The piezoresistors are self-aligned to the split cantilever, and therefore the width of the beam is only limited by lithography. Consequently, this kind of cantilever potentially has a high resolution. The preliminary experimental results show expected performances of the fabricated piezoresistors and electronic circuits.

CMOS–MEMS Lateral Electrothermal Actuators

In this paper, a type of lateral electrothermal (ET) actuator fabricated with post-CMOS micromachining is presented. The actuator is a beam with a multimorph structure, composed of CMOS dielectric and metal interconnect. Following structural release, the actuators demonstrate self-assembly under the moments arising from residual stress. Actuation is achieved through the imbalanced thermal expansion of internal interconnect members, whose relative positions and widths determine the magnitude and direction of actuation. Joule heating in discrete polysilicon resistors is used to convert energy from the electrical to thermal domain. For a 1.3-mum-wide 100-mum-long 4.2-mum-thick actuator composed of two driving metal layers, thermal sensitivities up to 18 nm/K are demonstrated with a force of 0.27 muN, given a 112-K temperature change. The analytic model and finite-element-analysis simulation output for thermal sensitivity agree with experiment to within 6%. Increasing thermal isolation is shown to give a diminishing return on thermal sensitivity and to reduce the thermal cutoff frequency of an actuator from 800 to 150 Hz. A figure of merit called the efficiency-volume ratio is presented and used to compare this paper with several actuators taken from the literature. Lateral ET multimorph actuators are shown to provide an advantage in applications where area is constrained and the load is small.