post-CMOS MEMS Process Research Articles

Performance enhance of CMOS-MEMS thermoelectric infrared sensor by using sensing material and structure design

This study presents the micro thermoelectric infrared (IR) sensor consisting of the heat transduction absorber and the serpentine structure with embedded thermocouple using the TSMC 0.18 µm 1P6M standard CMOS process and the in-house post-CMOS MEMS process. The proposed IR absorber design has an umbrella-like structure with a post anchor to the serpentine suspension with embedded thermocouple. Compared to the reference design (IR sensor consisted of only the serpentine structure with embedded thermocouple), a better heat-flow path is achieved and the temperature difference between the hot and cold junctions is increased. Moreover, the umbrella-like structure has higher IR absorption area compared with the serpentine structure. In addition, the Seebeck coefficients of poly-Si films with and without silicide are respectively characterized. The poly-Si with no silicide has a much higher Seebeck coefficient (56-fold), and is employed in this study as the thermocouple material. Experiment results indicate the detectivity of proposed design is 2–2.6 fold higher than that of the reference one at 200 mTorr. Experiment also show that the responsivity enhancement of proposed design is further increased as the sensor size is reduced in area.

Wide bandwidth room-temperature THz imaging array based on antenna-coupled MOSFET bolometer

We report on the design, fabrication and measurements of a new THz sensor concept based on an antenna-coupled MOSFET bolometer for room-temperature passive THz imaging for security and medical-diagnostic applications. The device is fabricated in a 180-nm CMOS SOI technology followed by a post-CMOS MEMS process which guaranties a very high thermal insulation of the sensor. In this sensor, the wide bandwidth THz antenna absorbing the electromagnetic field is directly coupled to the bolometer for maximum energy collection, whereas its design aims at minimizing its thermal mass as is necessary for fast frame rates. DC measurements before and after the MEMS process as well as sensor output signal time constant and THz antenna pattern measurements are presented. The final sensor is part of a large pixel array of 117 elements. Simulated array characteristic is presented proving that the mutual interaction between the pixels is small enough for imaging applications.

A Monolithic CMOS-MEMS 3-Axis Accelerometer With a Low-Noise, Low-Power Dual-Chopper Amplifier

This paper reports a monolithically integrated CMOS-MEMS three-axis capacitive accelerometer with a single proof mass. An improved DRIE post-CMOS MEMS process has been developed, which provides robust single-crystal silicon (SCS) structures in all three axes and greatly reduces undercut of comb fingers. The sensing electrodes are also composed of the thick SCS layer, resulting in high resolution and large sensing capacitance. Due to the high wiring flexibility provided by the fabrication process, fully differential capacitive sensing and common-centroid configurations are realized in all three axes. A low-noise, low- power dual-chopper amplifier is designed for each axis, which consumes only 1 mW power. With 44.5 dB on-chip amplification, the measured sensitivities of x-, y-, and z-axis accelerometers are 520 mV/g, 460 mV/g, and 320 mV/g, respectively, which can be tuned by simply changing the amplitude of the modulation signal. Accordingly, the overall noise floors of the x-, y-, and z-axis are 12 mug/radicHz , 14 mug/radicHz, and 110 mug/radicHz, respectively, when tested at around 200 Hz.

A Low-Cost 128 $\times$ 128 Uncooled Infrared Detector Array in CMOS Process

This paper discusses the implementation of a low-cost 128 times 128 uncooled infrared microbolometer detector array together with its integrated readout circuit (ROC) using a standard 0.35 mum n-well CMOS and post-CMOS MEMS processes. The detector array can be created with simple bulk-micromachining processes after the CMOS fabrication, without the need for any complicated lithography or deposition steps. The array detectors are based on suspended p+-active/n-well diode microbolometers with a pixel size of 40 mum times 40 mum and a fill factor of 44%. The p+-active/n-well diode detector has a measured dc responsivity (R) of 4970 V/W and a thermal time constant of 36 ms at 50 mtorr vacuum level. The total measured rms noise of the diode type detector is 0.69 muV for an 8 kHz bandwidth, resulting in a detectivity (D*) of 9.7 times 108 cm ldr Hz1/2/W. The array is scanned by an integrated 32-channel parallel ROC including low-noise differential preamplifiers with an electrical bandwidth of 8 kHz. The 128 times 128 focal plane array (FPA) has one row of infrared-blind reference detectors that reduces the effect of FPA fixed pattern noise and variations in the operating temperature relaxing the requirements for the temperature stabilization. Including the noise of the reference and array detectors together with the ROC noise, the fabricated 128 times 128 FPA has an expected noise equivalent temperature difference (NETD) value of 1 K for f/1 optics at 30 frames/s (fps) scanning rate. This NETD value can be decreased to 350 mK by improving the post-CMOS fabrication steps and increasing the number of readout channels.