Popular Pulse Width Modulation Research Articles

A Generalized Approach for Determining the Current Ripple RMS in Four-Leg Inverters with the Neutral Inductor

This manuscript proposes a novel approach for determining phase and neutral-current-ripple RMS in grid-connected four-leg inverters with the neutral inductor. The harmonic pollution is determined for any arbitrary pulse width modulation (PWM) technique and a generic value of the neutral inductor. Thanks to the proposed approach, it is possible to describe the neutral inductor in a parametric way with respect to phase inductors and obtain a wide range of results, ranging from a direct neutral connection (no neutral inductor) to a conventional three-phase inverter (no fourth wire) for any value of modulation index and common mode injection. The results permit one to compare different design choices in multiple scenarios effectively. The findings were validated by numerical simulations and experimental tests employing the most popular PWM techniques, such as space vector PWM (SVPWM) and discontinuous PWM (DPWM).

Investigation of Staggered PWM Scheme for AC Common Mode Current Minimization in SiC-Based Three-Phase Inverters

The advent of SiC devices which results in lower rise times and steep <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}v/\text{d}t$ </tex-math></inline-formula> at the inverter terminal can compromise the common mode (CM)-conducted emissions’ compliance, motor peak ac -CM currents, and leakage currents. Consequently, this results in a high ac and dc side CM filter weight. AC filters at the inverter output terminal are effective in reducing the slew rate of inverter voltage thereby reducing the peak CM current. However, a special case with high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}v/\text{d}t$ </tex-math></inline-formula> arising from low duty cycles is found to increase the peak ac-CM current significantly. Reduced CM voltage (CMV) schemes are popular pulsewidth modulation (PWM) methods to minimize the peak CMV but suffer from high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}v/\text{d}t$ </tex-math></inline-formula> under this special case as well. In this article, a staggered PWM scheme to minimize such peak ac -CM currents for a high-speed variable frequency drive (VFD) is evaluated using a three-level SiC-based T-type inverter as a demonstrator. From the analysis, the proposed switching pattern shows benefits over conventional sinusoidal PWM (SPWM) scheme and is found to be scalable to other PWM schemes and voltage levels. Simulation and experimental results are shown to validate the performance of the proposed switching pattern.

CARRIER BASED PWM TECHNIQUE AND ADAPTIVE NEURAL NETWORK BASED ROTOR RESISTANCE ESTIMATOR FOR THE PERFORMANCE ENHANCEMENT OF VECTOR CONTROLLED INDUCTION MOTOR DRIVES

In this paper, the carrier based Pulse Width Modulation (PWM) technique and neural network based rotor resistance estimator are proposed for vector controller Induction motor (IM) drives. The popular sine PWM is used for induction motor drive. The popular sine PWM has poor harmonic profile and (DC) utilization. The space vector modulation (SVM) technique overcomes the disadvantages of sine PWM. But SVM is computationally complex. Hence a simple PWM technique namely “carrier based PWM technique” similar to SVM is identified and proposed for vector controlled IM drive. The experimental set up is built up and the performance of carrier based PWM is validated using FPGA processor. The adaptive neural network based rotor resistance estimator in predictive mode is proposed for the vector controlled induction motor drive. The performance enhancement of the drive with carrier based PWM and rotor resistance estimator is comprehensively presented.

Application of Bacterial Foraging Algorithm and Genetic Algorithm for Selective Voltage Harmonic Elimination in PWM Inverter

Pulse Width Modulation (PWM) techniques are increasingly employed for PWM inverter fed induction motor drive. Among various popular PWM methods used, Selective Harmonic Elimination PWM (SHEPWM) has been widely accepted for its better harmonic elimination capability. In addition, using SHEPWM, it is also possible to maintain better voltage regulation. Hence, in this paper, an attempt has been made to apply Bacterial Foraging Algorithm (BFA) for solving selective harmonic elimination problem. The problem of voltage harmonic elimination together with output voltage regulation is drafted as an optimization task and the solution is sought through proposed method. For performance comparison of BFA, the results obtained are compared with other techniques such as derivative based Newton-Raphson method, and Genetic Algorithm. From the comparison, it can be observed that BFA based approach yields better results. Further, it provides superior convergence, reduced computational burden, and guaranteed global optima. The simulation results are validated through experimental findings.

Implementation of Hysteresis controlled Space Vector Pulse Width Modulation Based Inverter

Abstract : In the field of power electronics Pulse Width Modulation (PWM) inverters play a major role for DC to AC conversion. Space Vector Modulated PWM (SVPWM) is the popular PWM method and possibly the best among all the PWM techniques as it generates higher voltages with low THD and works very well with field oriented (vector control) schemes for motor control. Good quality output spectra can be obtained by eliminating several low order harmonics by adopting a suitable harmonic elimination. In this paper, the modeling, implementation and simulation of Hysteresis controlled SVPWM are defined. There is also a sort of technique defined for getting better response of space vector via a hysteresis filter, and to control of generating specific error free vectors from switching. Simulation results give the hope to further development of space vector technique in many control systems especially in this case an inverter.

Vector-based reference location estimating for space vector modulation technique

Space vector modulation (SVM) has become a popular pulse width modulation technique (PWM) for multilevel inverters. In SVM technique, the determination of the angular position of the reference voltage vector is very important to generate the required output voltage by the inverter. The switching time and switching sequence of SVM are calculated by vector location. The calculation of vector location and switching time become difficult and more complex when the numbers of output voltage levels increase for a given number of inverter levels. In this paper, a new SVM method is developed to determine the actual vector location. The proposed method can increase RMS value of the inverter output voltage; can reduce the algorithm complexity and computation time when compared to conventional SVM methods. In addition, the calculation of switching times for two-level inverter is generalized for N-level inverters. PSCAD/EMTDC simulation program is used to create the test system and to perform the case studies. Extensive simulation results are given to validate the performance of the proposed algorithm.

Parallel Three-Phase Inverters: Optimal PWM Method for Flux Reduction in Intercell Transformers

Parallel multilevel converters are now widely used in the industry, particularly in high-current applications such as voltage regulator modules. The reduction of the output current ripple and the increase of its frequency are possible due to the use of interleaving techniques and, as a consequence, the filters associated with the converter may be reduced. The current ripple reduction in each commutation cell of a parallel converter is possible by the use of intercell transformers (ICT). The design of such a special magnetic component depends very strongly on the magnetic flux flowing through their cores. In three-phase systems coupled by ICTs, the injection of zero-sequence signals in the output voltage reference changes this flux. The aim of this paper is to explain the influence of the most popular pulse width modulation (PWM) methods regarding the ICT flux for applications to three-phase loads. An optimal PWM method that minimizes the size of the ICT design is developed. Experimental results verify the analysis presented in this paper and validate the flux reduction provided by the developed optimal zero-sequence signals.

The Implementation of a High Efficiency Full-Bridge Converter

A high efficiency full-bridge converter is investigated and implemented in this paper. The measured data result from the other converter implemented by IC UCC3895 is to compare with that of the previous converter. This full-bridge converter proposed and implemented converter can obtain about 96% power efficiency in conversion procedure when compared with that of 90%, which were ever published by the conventional techniques. Apart from, the L-C resonance circuits were developed and embedded into the popular PWM (pulse width modulation) power converter, which is referred as the soft-switching, so as to down sizing the volume of the IC which can totally reduces the power losses caused in the duration of a semi-con- ductor switching.