Polycrystalline Si Layer Research Articles

Solid and Liquid State Dewetting of Thin Silicon Films Sandwiched between Two Silicon Carbide Substrates

Silicon carbide (SiC) is a very promising material for power electronics thanks to its wide band gap and high thermal conductivity. Stacking of SiC substrates of different crystalline quality and/or doping levels through wafer bonding is of particular interest for applications. Although a direct SiC/SiC bonding may result in an unstable interface, a layer of intermediate material playing a role of a “glue” can be sandwiched between the SiC substrates to ensure their good attachment. However, the processing of the power electronics devices at a high temperature may degrade the properties of this material which evolution under high temperature annealing must be studied in advance.In this work, we exploited the possibility to use silicon (Si) as a bonding material. We studied the structure evolution of a nanometer-thick polycrystalline Si layer sandwiched between two monocrystalline SiC substrates with a high temperature annealing. We focused our attention on understanding the impact of as-bonded Si layer thickness and the temperature of annealing on the eventual Si layer morphology. Tests were conducted for Si films of as-bonded thickness of 8 nm, 20 nm and 40 nm at temperatures ranging from 950°C to 1400°C, i.e. below Si melting temperature of 1414°C, and above it up to 1700°C. The experiments were realized using transmission electron microscopy (TEM), scanning electron microscopy (SEM) and high-resolution X-ray diffraction techniques. Cross-sectional TEM images were used to describe the structure and morphology of the interface. SEM was used to observe the inner surface of one of the SiC substrates once the other was removed by a cleavage. X-ray measurements were carried out to determine Si film thickness and texture as well as the strain in Si and SiC.We show that annealing at temperatures ranging from 950°C to 1400°C results in pitting, i.e. creation of voids, at the Si/SiC interfaces which are observed for any studied as-bonded thickness of a Si layer. We attribute this effect to a solid state dewetting of Si from SiC. This dewetting effect evolves into complete piercing of the silicon film and formation of cylindrical voids within the Si layer which grow in diameter with annealing temperature. We also observe a thickening of the silicon layer. The driving force for a solid state dewetting will be discussed in terms of SiC/Si interface energy, vacancies precipitation and Si atoms diffusion.When annealed to relatively higher temperatures allowing for Si melting followed by its solidification, we put into evidence the formation of step bunching on the internal surfaces of both SiC substrates. Regarding Si, it is concentrated along the SiC steps. The mechanism of the reconstruction of SiC internal surfaces resulting in the creation of step bunching will be discussed in relation to Si liquid state dewetting, carbon atoms dissolution, recondensation and migration within liquid Si.The effect of as-bonded silicon film thickness on the Si dewetting process is not pronounced after annealing at 950°C: all samples contain pits of a similar size and density. When the annealing temperature is slightly increased above 1000°C, the pits in the Si films of a lower initial thickness transform into cylindrical voids piercing the layers. The thicker layers contain both pits and cylindrical voids. At a high enough temperature of 1400°C only cylindrical voids were observed in all samples. The thicker layers present the lowest densities of voids.For the annealing at temperatures higher than 1400°C, the as-bonded thickness of a Si layer had a direct impact on the height of the steps formed on the internal surfaces of the SiC substrates. The eventual steps were higher the thicker the Si layer was used for bonding.The role of the diffusion and interaction of Si and C atoms and vacancies during annealing will be discussed in relation to the dynamics of solid and liquid state Si dewetting, size and density of pits and cylindrical voids and eventual Si layer morphology.Figure 1, on the left, SEM images showing the evolution of Si solid state dewetting with annealing temperature, from pitting to the formation of cylindrical voids. On the right, SEM and cross-sectional TEM images showing the step bunching on the SiC internal surfaces and the Si accumulation at the steps obtained after Si liquid state dewetting. Figure 1

(Best Student Presentation Award) Reduced Pressure – Chemical Vapor Deposition of Monocrystalline and Polycrystalline Si(:B) and SiGe(:B) Layers on Blanket Wafers

Monocrystalline SiGe alloys can be used instead of monocrystalline Si in order to increase the performances of devices such as heterojunction bipolar transistors (HBTs) [1]. The epitaxial growth of blanket, monocrystalline SiGe layers on Si with a dichlorosilane + germane + hydrochloric acid chemistry was extensively investigated in the literature [2,3]. Similarly, a switch from polycrystalline Si to polycrystalline SiGe can be favorable, for instance, in Complementary-MOS (C-MOS) devices [4,5]. However, the blanket growth by Reduced-Pressure Vapor Deposition (RP-CVD) of polycrystalline Si and SiGe has not been systematically investigated. We have thus performed a one-to-one comparison in terms of growth kinetics and electrically active dopant incorporation between blanket monocrystalline and polycrystalline Si(:B) and SiGe(:B) layers.Epitaxies or depositions were performed, in 300 mm RP-CVD chambers, on two types of templates (Fig.1): i) N-type Si substrates (Fig.1(a)) and ii) poly-Si/oxide/ P-type Si substrates (Fig.1(b)). The poly-Si layer in stack 1.(b) was obtained thanks to amorphous Si deposition followed by annealing at 750 °C, resulting in a poly-Si film. SiH4+HCl+H2 (named Process 1) and SiH2Cl2 (DCS)+HCl+GeH4+H2 (named Process 2) chemistries were used to deposit Si and SiGe layers between 675-750 °C and 10-20 Torr.Monocrystalline and polycrystalline SiGe growth kinetics for two process conditions: i) 750 °C, 10 Torr with a HCl partial pressure of 0.05 Torr and ii) 725 °C, 10 Torr, with a HCl partial pressure of 0.06 Torr, were similar to that in the literature [1-3, 6-8]. As already shown for monocrystalline layers, there was an increase of the intrinsic SiGe growth with the germane partial pressure and the temperature. Meanwhile, it was reduced when adding HCl (Fig.2). Very similar growth rates and evolutions were however obtained whatever the crystalline state of the layers.When diborane was added the gaseous mixture, different behaviors were evidenced depending on i) the crystallinity and ii) the stoichiometry. The Si:B and SiGe:B growth rates increased with the B2H6 flow whatever the chemistry (Fig.3). This was due to a hydrogen desorption increase on boron surface sites [5,10-11]. Growth rates were otherwise higher for monocrystalline than for polycrystalline layers. The electrical resistivities of c-Si:B and c-SiGe:B layers were one decade lower than those of poly-Si:B and poly-SiGe:B layers, however (Fig.4). Resistivity values were otherwise higher for c-Si:B than for c-SiGe:B. This was likely due to i) a better incorporation of B atoms into SiGe than in Si [3,8,9] and ii) a better hole mobility in SiGe [10]. An opposite behavior was observed for polycrystalline layers, with higher resistivities for poly-SiGe:B than for poly-Si:B. We otherwise had similar resistivity evolutions as the partial pressure of diborane Pp(B2H6) increased for all types of layers. A decrease was observed first, followed by a resistivity plateau then some resistivity re-increase for really high diborane flows. Such a phenomenon was already observed for monocrystalline layers and was explained by a crystalline quality degradation [3,8,9] that reduced the hole mobility. A similar behavior was assumed for poly-layers, with a morphological transition to the amorphous phase [11,12]. Top-view Scanning Electron Microscopy (SEM) images (Fig. 5) confirmed the morphological evolution of c-Si:B, poly-Si:B, c-SiGe:B and poly-SiGe:B as the diborane partial pressure increased.New data points for c-SiGe and c-SiGe:B will also be provided for other process conditions. For intrinsic layers, we will show that Refs. [1,2] x2/(1-x) = n×(F(GeH4)/F(SiH2Cl2)) relationship between the Ge concentration x and the germane over dichlorosilane mass-flow ratio is also valid at 10 Torr, with n = 3 at 700 °C with a F(SiH2Cl2)/F(H2) Mass-Flow Ratio (MFR) of 0.005 and a F(HCl)/F(H2) MFR of 0.006. Various characterization techniques were also used to determine the concentration of substitutional Boron atoms in SiGe:B layers and the lattice contraction coefficient (β = 9.11×10-24 cm3). The value of the latter, which is most useful to assess the compressive strain compensation by small boron atoms in SiGe layers, will be compared to literature values.[1] J. Appl. Phys. 88 (2000) 4044[2] J. Crystal Growth 305 (2007) 113[3] J. Crystal Growth 310 (2008) 62[4] J. Microelec. Sys. 16 (2007) 68[5] International Electron Devices Meeting (1991) 567[6] Appl. Phys. Lett. 56 (1990) 1275.[7] S. Chang et al., ECS Proceedings 87–8 (1987) 122[8] J Mater Sci: Mater Electron (2007) 18:747[9] ECS Trans. 75, 8 (2016) 265[10] Mater. Sci. Eng. B 114–115 (2004) 318[11] Appl. Phys. Lett. 66 (1995) 195[12] ECS Trans. 35, 30 (2011) 45 Figure 1

Reduced Pressure – Chemical Vapor Deposition of Monocrystalline and Polycrystalline Si(:B) and SiGe(:B) Layers on Blanket Wafers

In this paper, epitaxial growths or depositions were performed, in 300 mm RP-CVD chambers, on two types of templates: N-type Si substrates or poly-Si/oxide/ P-type Si substrates. SiH4+HCl+H2 and SiH2Cl2+HCl+GeH4+H2 chemistries were used to deposit Si and SiGe layers between 675-750°C and 10-20 Torr on such wafers. Monocrystalline and polycrystalline growth kinetics were similar for intrinsic SiGe. Meanwhile, growth kinetics and boron incorporation were different for mono-Si:B, mono-SiGe:B, poly-Si:B and poly-SiGe:B layers. While the impact of B atoms is well documented in monocrystalline layers, it is still poorly understood for polycrystalline layers. An attempt has therefore been made to quantify it by measuring the poly-structure, with a focus on the poly-grains size and the number of grain boundaries. A lattice contraction coefficient β = - 9.82 * 10-24 cm3 has otherwise been extracted from an in-depth study of the incorporation of B atoms into substitutional sites of the SiGe epitaxial lattice.

Formation of thermally grown SiO2/GaN interface

An attempt was made to form a thermally grown SiO2/GaN interface. A Si layer deposited on the c-plane GaN surface was oxidized in an O2 atmosphere to form a SiO2 layer. The formation of SiO2 with a bandgap of 8.6 eV was confirmed by x-ray photoelectron spectroscopy. Metal–oxide–semiconductor diodes were fabricated and tested to characterize the interface by electrical measurements. The capacitance–voltage (C–V) characteristics measured at 1 MHz showed that a longer oxidation time resulted in a steeper slope. However, it was unavoidable that a bump in a C–V curve appeared after a long oxidation time. The electron trap distributions derived from C–V curves exhibited a discrete-level trap at 0.7 eV from the conduction band edge. This discrete-level trap was an acceptor-like trap that can be assigned to a Ga vacancy. An insufficient oxidation led to a high leakage current owing to the asperities of the residual polycrystalline Si layer. Although the leakage current was improved by extending the oxidation time, an excessively long oxidation time resulted in a slight increase in the leakage current. We cannot deny the possibility of the diffusion of Ga atoms into SiO2 during oxidation. Moreover, the cross-sectional transmission electron microscopy and energy-dispersive x-ray spectroscopy of a sample formed with an excessively long oxidation time indicated the formation of a Ga oxide interlayer without a severe disorder. Most possibly, the formation of the Ga oxide interlayer by excess oxidation improved the interface properties.

(Invited) Effects of Coordination Structure of Silicon Ions on Electrodeposition Process of Silicon in Fluoride Melts

Silicon electrodeposition in molten salts is a key technology for fabricating silicon films, as a material for solar cells, by environmentally friendly and inexpensive processes. We have already reported the electrodeposition of silicon films from SiO2 in fluoride melts. However, there are only few studies about the effects of ions in fluoride melts, such as O2- anion, and Li+/Na+/K+ cations, on silicon electrodeposition processes. In particular, it is important to understand the coordination structure of silicon ions for controlling the nucleation and growth processes between solid metal substrates and fluoride melts interface.In this study, we investigated the electrodeposition of silicon from SiO2 in LiF-NaF-KF melts mixed with Li2O as a source of O2- anion at 873 K, and binary LiF-KF, LiF-NaF, and NaF-KF melts. The results of the in-situ Raman spectroscopy and DFT calculations indicated that the O2− anions could cleave the Si-O-Si bonds of SiO2 or silicate ions such as [Si2O5]2−; consequently, the formation of tetrahedron [SiO3F]3− species was promoted. Furthermore, the reduction currents, attributed to the reduction of Si ions, increased significantly by the addition of Li2O; moreover, the thickness and current efficiency of the electrodeposited polycrystalline Si layer prepared by potentiostatic electrolysis was improved. This study suggested the design of the molten salts bath was significant for controlling interfacial phenomena at electrode/molten salts to fabricate high-quality Si layers.

On the crystallization behavior of sputter-deposited a-Si films on 4H-SiC

The crystallization behavior of sputter-deposited amorphous silicon (a-Si) films on 4H-SiC by post-deposition annealing (PDA) is investigated. Film thicknesses between 100 and 1500 nm were selected. PDA was carried out at temperatures between 800 and 1100 °C. In addition, the influence of the annealing time and the heating rate is evaluated. Furthermore, the impact of high boron doping and the face of the SiC substrate was determined. A low-pressure chemical vapor deposition (LPCVD) Si film was deposited on the same substrate for reasons of comparison. The crystallinity of the Si films was investigated using X-ray diffractometry and transmission electron microscopy, whereas atomic force microscopy was applied to determine the surface roughness. The amorphous phase of the as-deposited Si thin films was crystallized into a polycrystalline microstructure applying different PDA conditions. A sharp and distinct interface to the 4H-SiC substrate without the presence of structural defects, amorphous regions or any indication for alloy formation was observed. No influence of the underlying SiC to stimulate the texture in the Si grain orientation could be found. Different PDA parameters showed an influence on the average grain size and the stress inside the grains. Highly boron-doped samples exhibit mean grain size values up to several hundreds of nanometers. Although starting with a poor film quality represented by an amorphous microstructure due to sputter deposition at low substrate temperatures, polycrystalline Si layers on 4H-SiC substrates are realized exhibiting a more than twenty times lower surface roughness compared to those synthesized with LPCVD.

Mechanism study of SiO2 layer formation and separation at the Si die sidewall during nanosecond laser dicing of ultrathin Si wafers with Cu backside layer

Laser dicing of ultrathin dies is promising and is gaining importance because of its cost and quality advantages over mechanical and plasma dicing. However, the effects of laser dicing on the mechanical strength and microstructure of ultrathin Si dies need to be further understood, especially when dicing through Si wafers with backside Cu layer. A critical phenomenon effecting the Si die sidewall strength after nanosecond laser dicing of Si wafers with backside Cu is the formation and separation of a SiO2 layer at the sidewall. The mechanisms behind the SiO2 layer formation and separation were studied in this work. Si wafer samples without and with backside Cu layer were prepared by dicing with nanosecond laser using standard production parameters. The microstructure and phases formed were investigated by energy dispersive spectroscopy and nanobeam diffraction in a transmission electron microscope. In die samples without backside Cu, the sidewall consists of a thin surface layer of amorphous Si, followed by a polycrystalline Si layer, and finally an epitaxial Si layer. In die samples with backside Cu, the sidewall microstructure was observed to be vastly different. At the upper region of the sidewall, a surface layer of polycrystalline Cu was found, followed by a polycrystalline Cu3Si layer, a SiO2 layer mixed with Cu3Si, and finally a thick SiO2 layer. The Cu3Si catalyzes the growth of the SiO2 through an oxidation step of the Cu3Si on the sidewall surface as well as at the SiO2/Si interface. In the lower region of the sidewall, the microstructure is similar to the upper region, but there is a separation of the SiO2 layer from the crystalline Si. The SiO2 undergoes a decomposition reaction at the SiO2/Si interface, releasing volatile SiO which causes microvoids to form and grow laterally at the interface. The growth and coalescence of the microvoids eventually lead to the separation of the SiO2 layer from the crystalline Si, leaving behind a clean and rough crystalline Si surface with a peak-to-peak roughness of 100–200 nm. In the areas where the SiO2 layer has separated from the Si die sidewall, the fracture strength of the sidewall is dependent on the material property and surface roughness of the crystalline Si, and not on the SiO2 layer. In the sidewall region near the die frontside, the SiO2 thickness is more than regions near the die backside, and no microvoiding and separation at the SiO2/Si interface were detected. This is hypothesized to be due to a higher O2 pressure at the upper region of the narrow dicing trench which is open to the atmosphere compared to the lower regions where there could be O2 deprivation and lower O2 pressure.

Effects of Oxide Ions on the Electrodeposition Process of Silicon in Molten Fluorides

We studied the effects of O2− ions on the coordination structure of Si ions and the electrodeposition process of Si films in molten fluorides using SiO2 powder (as a source of Si) and Li2O (as a source of O2−). High-temperature Raman spectroscopic data revealed that the dissolution of SiO2 in molten KF, LiF-KF, and LiF-NaF-KF without Li2O was proceeded by the formation of silicate ions, with the [Si2O5]2− ion acting as the dominant species. On the other hand, when 3.0 mol% Li2O was added to molten LiF-KF and LiF-NaF-KF, the intensity of Raman band due to [SiO3F]3− ion was increased compared to that without Li2O system, which indicated that the O2− ions could cause breakage of Si-O-Si bonds of SiO2 or [Si2O5]2− ions. Furthermore, the reduction currents, attributed to the reduction of Si ions, increased significantly by the addition of Li2O; moreover, the thickness and current efficiency of the electrodeposited polycrystalline Si layer prepared by potentiostatic electrolysis was improved. These results indicated that the O2− ions can change the coordination structure of Si ions in molten fluorides and that the design of the molten salts bath is a key technology for fabricating high-quality Si layers with high current efficiency.

On the recombination behavior of p+-type polysilicon on oxide junctions deposited by different methods on textured and planar surfaces

We investigate the passivation quality of hole-collecting junctions consisting of thermally or wet-chemically grown interfacial oxides, sandwiched between a monocrystalline-Si substrate and a p-type polycrystalline-silicon (Si) layer. The three different approaches for polycrystalline-Si preparation are compared: the plasma-enhanced chemical vapor deposition (PECVD) of in situ p+-type boron-doped amorphous Si layers, the low pressure chemical vapor deposition (LPCVD) of in situ p+-type B-doped polycrystalline Si layers, and the LPCVD of intrinsic amorphous Si, subsequently ion-implanted with boron. We observe the lowest J0e values of 3.8 fA cm−2 on thermally grown interfacial oxide on planar surfaces for the case of intrinsic amorphous Si deposited by LPCVD and subsequently implanted with boron. Also, we obtain a similar high passivation of p+-type poly-Si junctions on wet-chemically grown oxides as well as for all the investigated polycrystalline-Si deposition approaches. Conversely, on alkaline-textured surfaces, J0e is at least 4 times higher compared to planar surfaces. This finding holds for all the junction preparation methods investigated. We show that the higher J0e on textured surfaces can be attributed to a poorer passivation of the p+ poly/c-Si stacks on (111) when compared to (100) surfaces.

Influence of annealing temperature and its atmosphere on the properties of zinc implanted silicon

The presented results characterize nanoparticle formation in n-Si(100) samples implanted with 50-keV 64Zn+ ions (the dose is 5 × 1016 cm‒2) at room temperature followed by heat treatment in an oxygen or nitrogen atmosphere at temperatures of 400–900°C. Defects and zinc concentration profiles are investigated via the Rutherford backscattering spectroscopy with the help of the channeling technique, in which 1.7-MeV He+ ions are scattered at an angle of 110°. The silicon surface layer is visualized using a transmission electron microscope equipped with an energy-dispersive microanalyzer. The surface topology of the implanted and annealed samples is studied via atomic-force microscopy. The implantation process is accompanied by the formation of a 150-nm-thick amorphous Si surface layer containing Zn nanoparticles with an average size of 4 nm, below which a radiation-damaged layer 50 nm thick is generated. After 800°C annealing in an oxygen atmosphere, a recrystallized single-crystal silicon layer with a complex ZnO/Zn2SiO4 phase is formed. After 800°C annealing in a nitrogen atmosphere, a recrystallized polycrystalline Si layer involving Zn nanoparticles is created.

Influence of surface roughness of ZnO layer on the growth of polycrystalline Si layer via aluminum-induced layer exchange process

Influence of surface roughness of ZnO layer on the growth of polycrystalline Si layer via aluminum-induced layer exchange process

Light-Emitting Diodes Fabricated From Carbon Ions Implanted Into p-Type Silicon

Silicon-based light-emitting diodes (LEDs) are fabricated using p-type silicon implanted with C <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> ions and postannealed at 1000 °C in flowing nitrogen. The ion implantation is carried out at ambient temperature (AT) and 400 °C to investigate the influence of high-temperature implantation on the luminescence of LEDs. Transmission electron microscopy shows a near-surface layer of amorphous silicon (a-Si) with nanoscale carbon-rich inclusions in both ambient and heated targets while an additional polycrystalline Si layer is observed in the heated target only. A Schottky diode is constructed from C <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -implanted Si (C:Si) with a semitransparent gold layer on the implanted surface and aluminum on the back of the target. Contact firing at 400 °C in flowing nitrogen is used to optimize diode performance. Turn-ON voltage is determined to be about 3 V for all devices. Electroluminescence (EL) spectra show visible orange-red emission indicating luminescence primarily due to a-Si and Si nanoparticles in the LEDs fabricated from C:Si implanted at AT. The high-temperature samples produced EL attributed to a-Si and porous silicon carbide.

Influence of the Surface Roughness of a ZnO Layer on the Growth of a Polycrystalline Si-layer by Using an Aluminum-induced Layer-exchange Process

Influence of the Surface Roughness of a ZnO Layer on the Growth of a Polycrystalline Si-layer by Using an Aluminum-induced Layer-exchange Process

Formation and optical properties of semiconducting thick Ca silicide films and Si/CaxSi/Si heterostructures on Si(111) substrate

AbstractSi/Ca2Si/Si(111) and Si/Ca3Si4/Si(111) heterostructures have been formed by procedure of layer‐by‐layer deposition of Ca at 130 °C or 500 °C on previously formed layer of amorphous Si or on a polycrystalline Si layers. Features of electronic structure, optical and electrical properties were established by in situ and ex situ methods. Strong direct interband transitions at 0.89 and 0.912 eV were firstly found for Ca3Si4 film grown at 500 °C. (© 2013 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Correlation between structural and opto-electronic characteristics of crystalline Si microhole arrays for photonic light management

By employing electron paramagnetic resonance spectroscopy, transmission electron microscopy, and optical measurements, we systematically correlate the structural and optical properties with the deep-level defect characteristics of various tailored periodic Si microhole arrays, which are manufactured in an easily scalable and versatile process on nanoimprinted sol-gel coated glass. While tapered microhole arrays in a structured base layer are characterized by partly nanocrystalline features, poor electronic quality with a defect concentration of 1017 cm−3 and a high optical sub-band gap absorption, planar polycrystalline Si layers perforated with periodic arrays of tapered microholes are composed of a compact crystalline structure and a defect concentration in the low 1016 cm−3 regime. The low defect concentration is equivalent to the one in planar state-of-the-art solid phase crystallized Si films and correlates with a low optical sub-band gap absorption. By complementing the experimental characterization with 3-dimensional finite element simulations, we provide the basis for a computer-aided approach for the low-cost fabrication of novel high-quality structures on large areas featuring tailored opto-electronic properties.

Improved photoresponsivity of semiconducting BaSi2 epitaxial films grown on a tunnel junction for thin-film solar cells

The highest photoresponsivity and an internal quantum efficiency exceeding 70% at 1.55 eV were achieved for 400 nm thick undoped n-type BaSi2 epitaxial layers formed on a n+-BaSi2/p+-Si tunnel junction (TJ) on Si(111). The diffusion of Sb atoms was effectively suppressed by an intermediate polycrystalline Si layer grown by solid phase epitaxy, located between the TJ and undoped BaSi2 layers.

Multilayered Thin Metal Film Deposition by Sequential Operation of Nanosilicon Electron Emitter in Metal–Salt Solutions

The use of a nanocrystalline silicon (nc-Si) ballistic electron emitter in metal–salt solutions induces the deposition of thin metal films. The nc-Si emitter is composed of a thin Au/Ti film, an anodized polycrystalline Si layer, and an n+-Si substrate. When the emitter is driven in NiCl2, CoSO4, and ZnSO4 solutions without using any counter electrodes, thin Ni, Co, and Zn films are deposited on the emission area, respectively, as well as a thin Cu film in CuSO4 solution. According to cyclic voltammogram measurements under a standard three-electrode configuration, the hot electron injection effect into the solution is clearly observed in all cases at potentials within the electrochemical window, in which no electrolytic reactions occur. Energetic electrons injected into the solutions cause the direct reduction of metal ions. As a possible application, the multilayered deposition of different metals is demonstrated by sequential operation in NiCl2 and CuSO4 solutions.

A kinetic simulation study of the mechanisms of aluminum induced layer exchange process

The aluminum induced layer exchange (ALILE) process allows the formation of thin polycrystalline Si (poly-Si) layers of large grain size on foreign substrates such as glass at low process temperatures. This paper is devoted to a computer simulation study of the kinetics of the ALILE process taking into account the mechanisms of its separate stages: Si diffusion in the AlOx membrane, nucleation and growth of grains, and the formation of preferential (100) orientation. The characteristics of the ALILE process are explained based on the evolution of the Si concentration within the Al layer. In particular it is demonstrated that the characteristic suppression of nucleation after short annealing times results from a decrease in the Si concentration in the Al layer due to the growth of existing grains. A number of important parameters of ALILE process are estimated comparing the results of simulation to the experimental data.

Epitaxial Growth and Photoresponse Properties of BaSi2 Layers toward Si-Based High-Efficiency Solar Cells

We have grown BaSi2 epitaxial films and polycrystalline films by molecular-beam epitaxy on Si(111) and on (111)-oriented 100-nm-thick polycrystalline Si layers fabricated by an aluminum-induced crystallization method on SiO2, respectively. Electron backscatter diffraction analysis was performed on the 200-nm-thick BaSi2 epitaxial film and the grain size of the film was found to be approximately 3–10 µm. Photocurrents were clearly observed for the BaSi2 (900 nm)/Si and BaSi2 (300 nm)/SiO2 samples for photons with energies greater than 1.25 eV at room temperature when bias voltage was applied between the 1.5-mm-spacing striped electrodes formed on the surface. The photoresponsivity of the samples increased sharply with increasing photon energy and attained its maximum at approximately 1.60 eV. From the temperature dependence of the photoresponsivity, the activation energies of the BaSi2 epitaxial films and polycrystalline films were estimated to be approximately 6 and 52 meV, respectively.

Atom Redistribution during co-Doped Amorphous Silicon Crystallization

Atom redistribution during crystallization of a B and P co-doped amorphous Si layer produced by Si and P chemical vapor co-deposition and B implantation has been investigated. The crystallization of the entire layer is quasi-instantaneous for annealing temperature greater than 650 °C. The crystallization rate is well reproduced by the Avrami-Johnson-Mehl-Kolmogorov model of transformation. The Avrami n is found equal to 4, which is corresponding to 3D bulk crystallization. Crystallization promotes a non-Fickian redistribution of B atoms, allowing for an abrupt interface between B-doped and B-undoped regions. After crystallization, B diffuses in the polycrystalline Si layer for concentrations lower than 1.5  1020 at cm3 via the type B kinetic regime. Crystallization has no significant (or detectable) influence on the P profile. For temperatures higher than 750 °C, P diffuses in the poly-Si layer towards the region of highest B concentration via the type B kinetic regime, leading to P uphill diffusion. This phenomenon can be simulated considering chemical interactions between B and P atoms in both grains and grain boundaries.