Platform-based Design Methodology Research Articles

From Behavioural to In-Depth Modelling of a Scalable Spacecraft Power System in SystemC-AMS using Continuous Integration Techniques

In this work we demonstrate how SystemC-AMS can accompany widely used modelling tools and languages in spacecraft system design. The language bridges a wide range of abstraction levels from a high behavioural description down to the detailed design. To showcase its abilities models of a scalable spacecraft power system are presented. These incorporate distributed analog control loops, digital communication, power electronics, a complex environment and embedded software using the different modelling regimes provided by SystemC-AMS. We show how these models can be used throughout the whole spacecraft system design cycle. The use of abstract models for initial sizing of the power system and high fidelity models for the detailed design of subsystem components is shown. We illustrate how our PCDU Modular Breadboard approach bridges the gap between simulation model and hardware, by making use of the Platform based Design Methodology. In the end we provide an overview of how SystemC-AMS can be embedded into a setup using distributed model execution, configuration control and continuous integration techniques that are focused on software engineering.

Evaluating the Impact of Architectural Decisions on the Energy Efficiency of FDCT/IDCT Configurable IP Cores

The development of mobile multimedia devices follows the platform-based design methodology in which IP cores are the building blocks. In the context of mobile devices there is a concern of battery lifetime which leads to the need of energy-efficient IP cores. This paper presents four energy-efficient FDCT/IDCT configurable IP cores. These architectures are based on Massimino’s algorithm, which was chosen due to its high accuracy and parallelism. The four architectures were built by combining fully-combinational or pipelined datapaths, using either a single or two 1-D DCT blocks with a transpose buffer that assures the optimal minimum latency of eight cycles. Synthesis results for 90nm showed that our most efficient architecture, which uses two pipelined 1-D blocks, achieved 250 MHz as maximum frequency at a total power of 14.03 mW. Such frequency was enough to process 16x 1080p@30fps videos in real time (nearly 2 GigaPixels/s). Comparisons with related work, in terms of energy efficiency (μJ/MPixels), revealed that our most energy-efficient architecture is at least 2 times as efficient as other DCT architectures. Moreover, the four designed architectures were also synthesized by using common low-power techniques. These results showed that pipelined versions at high throughput tend to take more benefit from using Low-Vdd and High-Vt combined than the combinational ones, thus becoming the most energy efficient.

Optimal Design and Synthesis of MEA Power System Architectures Considering Reliability Specifications

Aircraft electrification requires novel designs to supply the growing demand for electric power onboard through efficient and reliable production and distribution of electrical energy. Moreover, the aircraft power system will be a key enabler for the integration of future technologies. Pledging to these intentions, we propose a formulation to synthesize a power system architecture that complies with safety specifications following a platform-based design methodology that optimizes the main aerospace drivers. Due to the nonlinear nature of the design problem, this article presents reliability-based MILP network design formulations for topology synthesis. The novelty of this approach relies on the adoption of network design optimization for MEA power system construction that allows explicit design formulations as MILP problems. This approach will provide an effective way to include safety specifications by introducing reliability and resiliency constraints.

A Platform-Based Design Methodology With Contracts and Related Tools for the Design of Cyber-Physical Systems

We introduce a platform-based design methodology that uses contracts to specify and abstract the components of a cyber-physical system (CPS), and provide formal support to the entire CPS design flow. The design is carried out as a sequence of refinement steps from a high-level specification to an implementation built out of a library of components at the lower level. We review formalisms and tools that can be used to specify, analyze, or synthesize the design at different levels of abstraction. For each level, we highlight how the contract operations can be concretely computed as well as the research challenges that should be faced to fully implement them. We illustrate our approach on the design of embedded controllers for aircraft electric power distribution systems.

Design space extension for secure implementation of block ciphers

Security has been identified as a critical dimension in the design of embedded systems for almost a decade. A well-recognised critical threat against the security of embedded systems is represented by ‘side-channel attacks (SCAs)’, which mandate the application of specially tailored countermeasures. These countermeasures are significantly demanding in terms of computation effort, and have traditionally been applied by hand. The recent introduction of a methodology to gauge the security margins provided by software cipher implementations, allows the integration of the automated application of countermeasures into platform-based system-level design methodologies. The authors introduce in the design space of block cipher implementations a new metric concerning the resistance against SCAs, provide a systematic method for the selection of the most appropriate cipher given the security and performance trade-offs, and point out the performance requirements for the random number generator. Moreover, they discuss the implications of the design space extension on system runtime adaptivity. The experimental evaluation demonstrates that a single cipher does not cover optimally a range of convenient operating points and that ciphers like a Serpent, which are considered slow in non-protected implementations, can outperform primitives like the Advanced Encryption Standard when implementations with equal security guarantees against SCAs are considered.

Methodology for the Design of Analog Integrated Interfaces Using Contracts

The design of complex analog interfaces would largely benefit from model-based development and compositional methods to improve the quality of its final result. However, analog circuit behaviors are so tightly intertwined with their environment that: 1) abstractions needed for model-based design are often not accurate, thus making it difficult to achieve reliable system performance estimations, and 2) generic, design-independent interfaces that are needed to develop compositional techniques are very difficult to define. In this paper, we propose a platform-based design methodology that uses analog contracts to develop reliable abstractions and design-independent interfaces. A contract explicitly handles pairs of properties, representing the assumptions on the environment and the promises of a component under these assumptions. Horizontal contracts encode composition rules that constrain how library elements should be “legally” used. Vertical contracts define under which conditions an aggregation of components satisfies the requirements posed at a higher level of abstraction. If both sets of contracts are satisfied, we can produce implementations by composition and refinement that are correct by construction. We demonstrate the effectiveness of this approach on the design of an ultra-wide band receiver used in an Intelligent Tire system, an on-vehicle wireless sensor network for active safety applications.

Preference-based multi-objective evolutionary algorithms for power-aware application mapping on NoC platforms

Network-on-chip (NoC) are considered the next generation of communication infrastructure in embedded systems. In the platform-based design methodology, an application is implemented by a set of collaborative intellectual property (IP) blocks. The selection of the most suited set of IPs as well as their physical mapping onto the NoC infrastructure to implement efficiently the application at hand are two hard combinatorial problems that occur during the synthesis process of Noc-based embedded system implementation. In this paper, we propose an innovative preference-based multi-objective evolutionary methodology to perform the assignment and mapping stages. We use one of the well-known and efficient multi-objective evolutionary algorithms NSGA-II and microGA as a kernel. The optimization processes of assignment and mapping are both driven by the minimization of the required silicon area and imposed execution time of the application, considering that the decision maker’s preference is a pre-specified value of the overall power consumption of the implementation.

Analysis of Verification Methodologies Based on a SoC Platform Design

In a SoC (system-on-chip) design, a design complexity is a big bottleneck. In order to overcome the design complexity, platform based design method is widely adopted for designers. Most complex SoCs need a heterogeneous design development environment for hardware and software co-design. In this paper, we discuss about some kinds of verification approaches with platform based design methodology at various abstraction levels of SoC design. We separate the verification process to two steps according to the different levels of verification. We employ a flexible SoC design environment to support simultaneous hardware and software development. We demonstrate the verification strategy of a target SoC design, IEEE 802.11a WLAN SoC.

An Embedded Software Modeling and Process by Using Aspect-Oriented Approach

In recent years, mobile devices have become widespread and refined, and they have offered increased convenience in human life. For these reasons, a variety of embedded systems have been designed. Therefore, improving methods for developing of embedded software systematically has become an important issue. Platform-based design is one example of an embedded-system design method that can reduce the design cost via improving a design’s abstraction level. However, platform-based design lacks precise definitions for platforms and design processes. This paper provides an approach that combines the aspects and platform-based design methods for developing embedded software. The approach is built on platform-based design methodology and uses the separating of concerns (SoC) concept to define the aspects and to reduce the crosscutting concerns in embedded system modeling. For aspect issues, we use the extended UML notation with aspects to describe both the static structure and the dynamic structure of the embedded system. We used an example of a digital photo frame system to demonstrate our approach.

Power-aware multi-objective evolutionary optimisation for application mapping on network-on-chip platforms

Network-on-chip (NoC) is considered the next generation of communication infrastructure, which will be omnipresent in different environments. In the platform-based design methodology, an application is implemented by a set of collaborating intellectual property (IP) blocks. The selection of the most suited set of IPs as well as their physical mapping onto the NoC to efficiently implement the application at hand are two hard combinatorial problems. In this article, we propose an innovative power-aware multi-objective evolutionary algorithm to perform the assignment and mapping stages of a platform-based NoC design synthesis tool. Our algorithm uses the well-known multi-objective evolutionary algorithms NSGA-II and microGA as kernels. The optimisation is driven by the required area and the imposed execution time, considering that the decision maker's restriction is the power consumption of the implementation.

Customized computer-aided application mapping on NoC infrastructure using multi-objective optimization

Network-on-chips (NoC) is considered the next generation of communication infrastructure in embedded systems, which are omnipresent in different environments, such as cars, cell phones, and digital cameras. In the platform-based design methodology, an application is implemented by a set of collaborating intellectual properties (IPs) blocks. The selection of the most suited set of IPs as well as their physical mapping onto the NoC infrastructure to implement efficiently the application at hand are two hard combinatorial problems. In this paper, we propose the use of multi-objective evolutionary algorithms to perform the assignment and mapping stages of any given application on a customized NoC infrastructure. The resulting NoC platform is custom-cut for the application at hand. Only the actually used resources, switches and channels by the application mapping are part of the customized implementation platform. The optimization is driven by the minimization of required hardware area, the imposed execution time and the necessary power consumption of the final implementation, and yet avoiding hot spots.

Embedding Mixed-Signal Design in Systems-on-Chip

With semiconductor technology feature size scaling below 100 nm, mixed-signal design faces some important challenges, caused among others by reduced supply voltages, process variation, and declining intrinsic device gains. Addressing these challenges requires innovative solutions, at the technology, circuit, architecture, and design-methodology level. We present some of these solutions, including a structured platform-based design methodology to enable a meaningful exploration of the broad design space and to classify potential solutions in terms of the relevant metrics.

Platform based design for wireless sensor networks

The platform-based design (PBD) methodology we present has its foundations in a clear definition of the different abstraction layers of a wireless sensor network (WSN). At the application layer, we introduce the sensor network service platform that allows the user to describe the application independently from the network architecture. This functional description is then mapped into an instance of the sensor network implementation platform. These two layers of abstraction are the basis for the design methodology. An essential feature of the methodology is the capability of defining the design as a refinement process between contiguous layers that is based on synthesis given the existence of a formal definition of the layers of abstraction. We present a framework, called Rialto, which translates application specifications into network constraints. Furthermore, we present a synthesis engine, called Genesis, that starting from these constraints and an abstraction of the hardware platform performance generates a topology and a communication protocol that satisfy constraints and optimizes energy consumption. We present a case study that shows how the methodology covers all the aspects of the design process, from conceptual description to implementation.

A platform based SOC design methodology and its application in image compression

We describe a platform based design methodology for system-on-a-chip (SOC). An embedded 32-bit RISC CPU and a field-programmable gate array (FPGA) are used to implement applications that require both a program running on the CPU and hardware acceleration performed by the FPGA. The methodology consists of flow and tools for hardware/software partitioning, hardware accelerator design/synthesis, software compilation, interface generation, integrated hardware/software cosimulation, and system verification. We also present a case of implementing an image decoder in a hardware/software codesign fashion on the platform. Experimental results show that the methodology is indeed effective for IP development/verification and fast prototyping.

Augmenting Platform-Based Design with Synthesis Tools

Platform-based design faces an essential tension: it wants to reuse previous designs to leverage IP; but new designs must necessarily include work that is not complete or well-characterized. Synthesis and analysis methods are therefore important elements in platform-based design methodologies. This paper describes two aspects of this problem. First, we consider the first-generation dilemma, in which we must use additional analysis in order to create the first generation of a platform. Second, we describe a synthesis method that creates accelerators for platforms whose clock periods have been optimized for the system characteristics.

Platform-based design and software design methodology for embedded systems

Embedded products have become so complex and must be developed so quickly that current design methodologies are no longer adequate. The authors' vision for the future of embedded-system design involves two essential components: a rigorous methodology for embedded software development and platform-based design.