Pixel Pitch Research Articles

A Novel Low Dark Current 9T Global Shutter Pixel with Merged Active Area

There is an increasing demand for high-performance global shutter pixels for CMOS image sensor (CIS) in the high-end imaging field. The existing global pixels have disadvantages, such as low sensitivity, high dark current, and large pixel area. In the present work, we developed a novel 9T global shutter CIS pixel with a much smaller pixel pitch of 2.8 μm. To our knowledge, it is the most miniature reported 9T global shutter CIS pixel. The developed 9T global shutter CIS pixel shows an excellent low dark current by the strategy of merging active area, which is 38 e−/s. Moreover, the cross-talk, sensitivity, read noise, dynamic range and full well capacity show performance. The current strategy is expected to be helpful in further improving the performance of other kinds of CIS pixels.

FD-SOI-Based Pixel With Real-Time Frame Difference for Motion Extraction and Image Preprocessing

A frame differencing pixel (FDP) design based on fully depleted silicon-on-insulator (FD-SOI) technology is presented, demonstrating the capability of the FDP to perform pixel-level real-time frame difference (FD) for motion extraction and image preprocessing. The photo charges are collected by the diode under the buried oxide (BOX) and sensed by the MOSFET above. The capacitance of the BOX is used to generate the FD signal without incurring more area costs. TCAD simulations of the FD-SOI FDP were performed to help the analysis. An optimal pixel design model was developed to describe the relationship between noise performance and area allocation. According to the simulation results, the FDP could achieve light sensitivity of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$25.6 ~\mu \text{A}$ </tex-math></inline-formula> /( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{J}$ </tex-math></inline-formula> /cm2) and a differential signal-to-noise ratio of 35 dB with a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4 ~\mu \text{m}$ </tex-math></inline-formula> pixel pitch and 76% fill factor.

Focus on test, measurement, quantum metrology, and analytical equipment

Focus on test, measurement, quantum metrology, and analytical equipment

Monte-Carlo simulation of charge sharing in 2 mm thick pixelated CdTe sensor

Precise physical models of sensors are essential for developing high precision pixelated detectors. Advanced technologies allowed pixel electronics to be integrated in tens of micrometers pixel pitch. Such fine pixelated detectors suffer from charge sharing effect and, in high-Z materials, also from fluorescent photons traversing one or more pixels. This work presents a Monte-Carlo model of a 2 mm thick 70 μm pitch pixelated CdTe sensor designed for simulation of the absorption of X-ray photons from monochromatic X-ray photon beams. Charge diffusion across a pixel matrix was computed using a drift-diffusion model for each photon generating free electron-hole pairs. Based on the simulation outcome, we estimated the dependence of cluster size on photon energy and total charge distribution between neighboring pixels.

A 2.2um three-wafer stacked back side illuminated voltage domain global shutter CMOS image sensor

Due to the emergence of machine vision, augmented reality (AR), virtual reality (VR), and automotive connectivity in recent years, the necessity for chip miniaturization has grown. These emerging, next-generation applications, which are centered on user experience and comfort, require their constituent chips, devices, and parts to be smaller, lighter, and more accessible. AR/VR applications, especially demand smaller components due to their primary application towards wearable technology, in which the user experience would be negatively impacted by large features and bulk. Therefore, chips and devices intended for next-generation consumer applications must be small and modular, to support module miniaturization and promote user comfort. To enable the chip miniaturization required for technological advancement and innovation, we developed a 2.2&#x3BC;m pixel pitch Back Side Illuminated (BSI) Voltage Domain Global Shutter (VDGS) image sensor with the three-wafer stacked technology. Each wafer is connected by Stacked Pixel Level Connection (SPLC) and the middle and logic wafers are connected using a Back side Through Silicon Via (BTSV). The separation of the sensing, charge storage, and logic functions to different wafers allows process optimization in each wafer, improving overall chip performance. The peripheral circuit region is reduced by 75% compared to the previous product without degrading image sensor performance. For the session: Processing at the Edge (joint with COIMG).

Development of integration mode proton imaging with a single CMOS detector for a small animal irradiation platform

A novel irradiation platform for preclinical proton therapy studies foresees proton imaging for accurate setup and treatment planning. Imaging at modern synchrocyclotron-based proton therapy centers with high instantaneous particle flux is possible with an integration mode setup. The aim of this work is to determine an object’s water-equivalent thickness (WET) with a commercially available large-area CMOS sensor. Image contrast is achieved by recording the proton energy deposition in detector pixels for several incoming beam energies (here, called probing energies) and applying a signal decomposition method that retrieves the water-equivalent thickness. A single planar 114 mm × 65 mm CMOS sensor (49.5 µm pixel pitch) was used for this study, aimed at small-animal imaging. In experimental campaigns, at two isochronous cyclotron-based facilities, probing energies suitable for small-animal-sized objects were produced once with built-in energy layer switching and the other time, using a custom degrader wheel. To assess water-equivalent thickness accuracy, a micro-CT calibration phantom with 10 inserts of tissue-mimicking materials was imaged at three phantom-to-detector distances: 3 mm, 13 mm, and 33 mm. For 3 mm and 13 mm phantom-to-detector distance, the average water-equivalent thickness error compared to the ground truth was about 1% and the spatial resolution was 0.16(3) mm and 0.47(2) mm, respectively. For the largest separation distance of 33 mm air gap, proton scattering had considerable impact and the water-equivalent thickness relative error increased to 30%, and the spatial resolution was larger than 1.75 mm. We conclude that a pixelated CMOS detector with dedicated post-processing methods can enable fast proton radiographic imaging in a simple and compact setup for small-animal-sized objects with high water-equivalent thickness accuracy and spatial resolution for reasonable phantom-to-detector distances.

Sub-100 nm pixel pitch via STED photolithography with a nanoprinting-at-expansion/employments-at-recovery strategy.

Featured with its extraordinary super-resolution capability, the advent of stimulated emission depletion (STED) lithography has allowed for vastly reduced minimum feature size of a single pixel down to the deep sub-diffraction scale so as to produce unprecedented nanofeatures. However, the anticipated sub-diffraction pixel pitch down below 100 nm remains out of reach due to redundant polymerization of adjacent exposures at a short distance, so called memory effect. In this work, a nanoprinting-at-expansion/employments-at-recovery strategy is applied in the dual-beam STED lithography technique to surmount the memory effect and break adjacent-exposure limit imposed on minimizing the pixel pitch. The implementation of a femtosecond laser at a wavelength of 532 nm, the same as the inhibition laser beam, working as the initiation laser beam, can drastically reduce the saturated inhibition laser intensity by 74% for abating redundant polymerization subjected to multiple exposures in realizing nanoscale pixel pitch. The adjacent-exposure zone can be separated by isotropically expanding an elastic PDMS substrate for further diminishing redundant polymerization. Applying stretching ratio of 30%, a minimum super-resolved nanodots pixel pitch of 96 nm was achieved with single-dot size of 34 nm on both planar and hierarchical substrate, which offers a record-close distance for printing adjacent pixels. With its nanometer discernibility, this method holds great promise for future versatile utilization in advanced nanoimprinting, high density data storage, etc.

Increasing steering angle of LCoS in a WSS system through integration with a metasurface.

Liquid crystal on silicon (LCoS) has been the dominant choice for wavelength selective switches (WSSs) in telecommunication industry due to its high spatial resolution and compatibility with software defined flexible grid feature. Current LCoS devices generally have a limited steering angle, which also limits the minimum footprint of the WSS system. The steering angle of LCoS devices is fundamentally determined by the pixel pitch, which is highly challenging to be optimized without resorting to other techniques. In this paper, we present an approach to increase the steering angle of LCoS devices through the integration with dielectric metasurfaces. Here a dielectric Huygens-type metasurface is integrated with an LCoS device to increase its steering angle by 10°. This approach can effectively minimize the overall size of the WSS system while maintaining a small form factor of the LCoS device.

A Numerical Method of Aligning the Optical Stacks for All Pixels

Reducing performance verification time is significant in product launch and production costs. This is especially true because aligning the optical stacks of off-axis pixels is a time-consuming task, but it is important to maintain sensitivity. In this paper, a numerical method to align the optical stacks of off-axis pixels is suggested in order to reduce performance test time. The components of the numerical method are the optical stack height, refractive index, and chief ray angle in order to calculate the optical stacks' optimal shift distance. The proposed method was investigated to confirm effectiveness by using optical simulation. The sub-micron backside illumination (BSI) pixels were simulated, having 2 × 2 microlens, quad-color filter array, and in-pixel deep trench isolation (DTI). Moreover, the proposed method was evaluated for various pixel pitches, microlens shapes, and CRAs. As a result, the optical stacks were optimized by using the numerical method and validated via optical simulation. Therefore, the proposed numerical method is expected to help reduce the time and cost.

High-resolution terahertz digital holography based on frequency-domain diagonal extension imaging

By leveraging frequency-domain diagonal extension (FDDE) imaging in terahertz (THz) in-line digital holography, the resolution of THz digital holography would be dramatically improved. The holography system in this work which utilizes a CO2-pumped 2.52 THz (118.83 μm) continuous-wave laser as the source and a pyroelectric-array camera with a pixel pitch of 100 μm as the detector could attain a resolution of 150 μm (~1.26 λ) near to the resolution limit of the system. FDDE imaging is a simple and effective method for resolution enhancement, where no new detector or other equipment is employed. Samples are imaged twice from different angles and then the high-frequency components of images are stitched to improve the resolution. Different from the traditional FDDE, weight-FDDE (w-FDDE) which can reduce the visibility distinction between different orientations of the synthetic picture by adding weight factors to produce a superior synthetic image is proposed in this work.

Using an acousto-optic modulator as a fast spatial light modulator.

High-speed spatial light modulators (SLM) are crucial components for free-space communication and structured illumination imaging. Current approaches for dynamical spatial mode generation, such as liquid crystal SLMs or digital micromirror devices, are limited to a maximum pattern refresh rate of 10 kHz and have a low damage threshold. We demonstrate that arbitrary spatial profiles in a laser pulse can be generated by mapping the temporal radio-frequency (RF) waveform sent to an acousto-optic modulator (AOM) onto the optical field. We find that the fidelity of the SLM performance can be improved through numerical optimization of the RF waveform to overcome the nonlinear effect of AOM. An AOM can thus be used as a 1-dimensional SLM, a technique we call acousto-optic spatial light modulator (AO-SLM), which has 50 µm pixel pitch, over 1 MHz update rate, and high damage threshold. We simulate the application of AO-SLM to single-pixel imaging, which can reconstruct a 32×32 pixel complex object at a rate of 11.6 kHz with 98% fidelity.

Design of an analog monolithic pixel sensor prototype in TPSCo 65 nm CMOS imaging technology

A series of monolithic active pixel sensor prototypes (APTS chips) were manufactured in the TPSCo 65 nm CMOS imaging process in the framework of the CERN-EP R&D on monolithic sensors and the ALICE ITS3 upgrade project. Each APTS chip contains a 4 × 4 pixel matrix with fast analog outputs buffered to individual pads. To explore the process and sensor characteristics, various pixel pitches (10 µm–25 µm), geometries and reverse biasing schemes were included. Prototypes are fully functional with detailed sensor characterization ongoing. The design will be presented with some experimental results also correlating to some transistor measurements.

Flexible high-resolution thin micropolarizers for imaging polarimetry

More durable (with high impact force), lighter, and more compact flexible azo dye micropolarizers are attractive candidates for low-cost, simple polarization imaging systems. The liquid crystal polymer (LCP), as an emerging material developed by photo-alignment technology, is a potential material for organizing the long-range ordered structure of azo dyes. However, little research has been done on LCP aligned azo dyes. This paper points out and solves a key problem that restricts the fabrication of high-precision arrays in guest (azo dye)-host (LCP) systems: the doping of dyes leads to disorder of the LCP during curing. After solving the problem, the relationship between the thickness of the LCP and the extinction ratio of the polarizing film was investigated, which effectively improved the extinction ratio. Alignment of azo dye molecules in the range of 2 µm (0°–180°) and arrays of micropolarizers (0°, 45°, 90°, -45°) with 8 µm × 8 µm pixel pitch was achieved by laser direct writing technology. The bending cycle test demonstrates the mechanical stability of the ultrathin flexible polarizer. The flexible patterned polarizer with robust chemical and mechanical stabilities provides a flexible way to capture the polarization of the light and highly integrated advanced flexible optoelectronic devices.

Characterization of 3.2 Gbps readout in 65 nm CMOS technology

A new class of photon-counting pixel detectors allows for capturing of an image in several photon energy bins in one shot. A decreased pixel pitch and an increased number of energy bins are needed to enhance the spatial and spectral resolution of the detector. This led to new requirements for the readout systems and their bandwidths, as more data is generated for the same detection area. Fast differential serial communication enables high-speed data rates, thus providing an ideal solution to transfer large amounts of data generated by the detector’s front-end electronics. However, its implementation provides extra challenges. This work introduces a novel high-speed serial readout designed in a 65 nm CMOS technology that will be used in the future photon-counting X-ray imaging detectors. The design of the serial transmitter is presented together with the characterization of jitter and channel performance.

Pixel detector hybridisation with anisotropic conductive films

Hybrid pixel detectors require a reliable and cost-effective interconnect technology adapted to the pitch and die sizes of the respective applications. During the ASIC and sensor R&D phase, and in general for small-scale applications, such interconnect technologies need to be suitable for the assembly of single-dies, typically available from Multi-Project-Wafer submissions. Within the CERN EP R&D programme and the AIDAinnova collaboration, innovative hybridisation concepts targeting vertex-detector applications at future colliders are under development. This contribution presents recent results of a newly developed in-house single-die interconnection process based on Anisotropic Conductive Film (ACF). The ACF interconnect technology replaces the solder bumps with conductive particles embedded in an adhesive film. The electro-mechanical connection between the sensor and the read-out chip is achieved via thermo-compression of the ACF using a flip-chip device bonder. A specific pad topology is required to enable the connection via conductive particles and create cavities into which excess epoxy can flow. This pixel-pad topology is achieved with an in-house Electroless Nickel Immersion Gold (ENIG) plating process that is also under development within the project. The ENIG and ACF processes are qualified with the Timepix3 ASIC and sensors, with 55 µm pixel pitch and 14 µm pad diameter. The ACF technology can also be used for ASIC-PCB/FPC integration, replacing wire bonding or large-pitch solder bumping techniques. This contribution introduces the ENIG plating and ACF processes and presents recent results on Timepix3 hybrid assemblies.

Noise Model of Large-Format Readout Integrated Circuit for Infrared Focal Plane Array

With the upscaling of the pixel format and the downscaling of the pixel pitch of infrared focal plane arrays (FPAs), the demand for ultra-low-noise design is increasing drastically. Existing methods of noise modelling lack transistor-level analysis and are unable to provide directly effective guidance for circuit design because of extremely complicated mathematical expressions. In this work, a comprehensive noise model of large-format readout integrated circuit (ROIC) is presented, for the first time elucidating the noise mechanism with a full research framework, including transistor-, circuit-, block-, and chip-level analysis. By utilizing a novel approximation method, simplified analytical formulas with high accuracy are obtained for flicker noise and other noise. These simplified formulas clear up the confusions of how the various functional circuit blocks influence noise performance. Moreover, based on the presented noise model, the impacts of crucial parameters on FPA noise are analyzed in detail, and strategies regarding the trade-off between the signal-to-noise ratio (SNR) and other aspects of performance are proposed for low-noise design. Taking an astronomical application with a very long integration time as an example, the calculated results show that an ultralow noise of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${5}{\,e^{-}}$ </tex-math></inline-formula> can be achieved by leveraging the above approaches.

X-Ray and Fast Neutron Radiographic Performance of an Ir-Bi-Plastic Array

Organic plastic scintillators offer the potential for exciting improvements in particle interaction efficiency, light yield (LY), and pulse shape discrimination (PSD). An area of particular application for select plastics exists in portable dual-particle imaging (DPI) systems supporting nuclear safety, security, and safeguards missions. One promising material, an Ir-Bi-Plastic, is experimentally evaluated within separate 370 kVp X-ray and 14.1 MeV neutron fields in the form of a pixelated array, which was fabricated by Lawrence Livermore National Laboratory (LLNL). Ir-Bi-Plastics pair high bismuth loadings with iridium-complex fluorophores to provide high intrinsic efficiencies for both photoelectric absorption and fast neutron detection, as well as improved LYs from the triplet-harvesting capabilities of the iridium-complex. These attributes make Ir-Bi-Plastics ideal candidates for DPI applications. Radiographic performance results for the Ir-Bi-Plastic array are compared against similar evaluations of smaller arrays made from EJ-200 and EJ-256, both industry standard materials. Measurements were recorded by pressure-coupling the three arrays to a commercial a-Si digital radiographic panel, and ASTM standard test methods and practices were utilized to calculate the modulation transfer function (MTF) and limits of spatial resolution for all three arrays. The results suggest the Ir-Bi-Plastic array, despite its larger pixel pitch, provides significantly improved performance over equivalent arrays made from either EJ-200 or EJ-256 for all X-ray and fast neutron environments practical for portable DPI.

First characterization results of ARCADIA FD-MAPS after X-ray irradiation

The ARCADIA collaboration is developing fully-depleted (FD) Monolithic Active Pixel Sensors (MAPS) in a 110 nm CMOS process in collaboration with LFoundry. The sensor design incorporates an n+ collection node within a n-type epi-layer on top of a high-resistivity n-type substrate and p+ backside. Thus, the pn-junction sits on the backside and through an applied backside bias, the full substrate gets depleted. The targeted applications of this technology range from future high energy physics experiments to space applications, and medical and industrial scanners. Together, these applications set the minimum requirements on the detector: data collection at hit rates of (10–100) MHz/cm2, full signal processing within (1–10) μs, maximum power consumption (5–20) mW/cm2 and radiation tolerances of up to 3.4 Mrad or 6.2 × 1012 1 MeV neutron equivalent fluence. In order to proof the performance of the technology, a demonstrator chip of 512 × 512 pixels with 25 μm pitch was designed and fabricated in a first engineering run in 2021, together with additional test structures of pixel and strip arrays with different pitches and sensor geometries. The production run has produced functional passive and active pixel matrices. Earlier studies have shown that positive oxide charges and traps at the Si-SiO2 interface, introduced by ionising radiation, affect the depletion region around the collection electrode, increasing the pixel capacitance. By varying the gap size between collection node and pwells, the geometry can be optimised to keep the capacitance low also after irradiation. To study the performance after irradiation, of the optimised diode designs, the passive pixel matrices were irradiated with doses up to 10 Mrad (SiO2) using a X-ray tube with a Tungsten anode. The measurements are complemented by TCAD simulations. The maximum capacitance increase after irradiation was found to reach 6 and 12 fF/pixel for pixel pitches of 25 and 50 μm, respectively. The relative capacitance increase after irradiation has hereby been found to reach up to 250% after a dose of 10 Mrad.

Modeling Insights Into the Assembly Challenges of Focal Plane Arrays

Ongoing technological advances in photodetector material growth and processing, readout integrated circuits, and robust hybridization (packaging) methods for assembling high-resolution and small-pitch size pixel arrays are the main enabling factors for pushing the frontiers of high-performance Focal Plane Array (FPA) technologies for imaging systems. This paper details the development of analytical and numerical models and demonstrates their use to generate insights into the feasibility of two flip-chip assembly processes for packaging infrared (IR) detector chips. The modelling studies focus on the challenges of forming the indium interconnection arrays in the case of the FPA technologies using Group III-V compound semiconductor materials and ultra-fine pitch pixel array layouts. The accurate alignment of the IR detector chip onto the readout chip in the case of high-density pixel architectures is a critical requirement for the packaging process. To gain better understanding of this requirement, which has a clear implication for the quality and subsequent reliability performance of the FPA, compression and reflow bonding process models are developed using suitable modeling approaches and methods and then demonstrated for two distinctive focal plane array design configurations. The novelty of this work is in the developed modeling capabilities utilizing different computational methods, from large deformation and contact analysis finite element to energy-based and harmonic motion mechanics, to characterize and optimize the mechanical and dynamic non-linear behavior of the indium solder joints and their formation during FPA packaging. The feasibility of bonding techniques for different resolution FPAs and under flip-chip misalignment conditions is assessed. The modeling results pointed to a very strict, sub-micrometer flip-chip placement accuracy requirement for the assembly of FPAs with ultra-fine indium bump array resolution.

Magneto-optical holographic 3D display with wide viewing angle using microlens array and digital mirror device

We developed a three-dimensional (3D) holographic display using the magneto-optical effect. The system uses a microlens array to reduce the area size of light reflected from pixels of a digital mirror device to approximately 1 μm and write in parallel to a magnetic recording medium as hologram data. This method makes it possible to write over a wide area even with a piezo stage that has high resolution but a narrow range of movement. The holograms, written at a pixel pitch of 1.1 um, enabled the reconstruction of 3D images with a wide viewing angle of 26.7 deg. By avoiding abrupt directional changes of the piezo stage, the image quality was improved by eliminating line defects in the written holograms; image distortion was reduced by setting the incident angle of the reference light in the program of a computer-generated hologram to match the model and the reconstructing optical system. Image distortion was reduced by improving the program of the computer-generated hologram.