Physics-based Device Simulation Research Articles

Investigation of electron trapping in AlGaN/GaN HEMT with Fe-doped buffer through DCT characterization and TCAD device simulations

The electron trapping in AlGaN/GaN high-electron mobility transistors (HEMTs) with iron (Fe)-doped buffer is investigated through Drain Current Transient (DCT) measurements and TCAD physics-based 2D device simulations. The DCT characterization reveals two prominent deep-level electron traps E1 (∼0.5 eV) and E2 (∼0.6 eV) in the AlGaN/GaN HEMT. The measured DCT spectrum is analyzed at different trap-filling pulse durations (10 µs–100 ms) to obtain the information of trapping kinetics. As the first step in the simulation, the TCAD physical model parameters are calibrated by matching the simulated DC characteristics with the experimental data. It is shown that the TCAD model incorporating the acceptor-type trap at EC – 0.5 eV in the GaN buffer quantitatively reproduces the measured DCT spectra over the temperature range of 25–100 °C. To explore the buffer trapping effects, the simulated DCT is inspected by varying the activation energy, capture cross section, and concentration of the buffer trap.

Dual-gate β-Ga2O3 nanomembrane transistors: device operation and analytical modelling

The physical operation and performance of a dual gate β-gallium oxide nanomembrane field effect transistor (NM-FET) with asymmetric top and back gate oxide thicknesses are investigated for different modes of operation. A physics-based device simulator calibrated with experimental data is used for this purpose. Normally-OFF operation of the NM-FET is demonstrated by electrically tuning the top gate threshold voltage with the applied back gate bias. In addition, analytical models of threshold voltage for all the different modes of operation are presented and the proposed models are rigorously validated with simulation results and experimental data. The effect of individual device parameters on the threshold voltage of the normally-OFF NM-FET is further investigated using the analytical model.

Analysis of drain current saturation behaviour in GaN polarisation super junction HFETs

The magnitude of saturation current in a power device significantly impacts its short-circuit capability. In conjunction with the unprecedented miniaturisation that gallium nitride (GaN) offers, there is a compelling rationale to examine this critical parameter in GaN transistors for thermally stable and reliable power converter applications. This study presents a comprehensive analysis of the physical behaviour that yields intrinsically low drain current saturation in GaN polarisation super junction heterojunction field-effect transistors (PSJ HFETs). The analysis in this work has been performed using electrical characterisation data of conventional and PSJ HFETs, supported by physics-based two-dimensional device simulations. Insight is gained on the differing device architecture-dependent mechanisms that determine the magnitude of drain current density in both types of devices when biased in the saturation region.

GaSb solar cells grown on GaAs via interfacial misfit arrays for use in the III-Sb multi-junction cell

Growth of GaSb with low threading dislocation density directly on GaAs may be possible with the strategic strain relaxation of interfacial misfit arrays. This creates an opportunity for a multi-junction solar cell with access to a wide range of well-developed direct bandgap materials. Multi-junction cells with a single layer of GaSb/GaAs interfacial misfit arrays could achieve higher efficiency than state-of-the-art inverted metamorphic multi-junction cells while forgoing the need for costly compositionally graded buffer layers. To develop this technology, GaSb single junction cells were grown via molecular beam epitaxy on both GaSb and GaAs substrates to compare homoepitaxial and heteroepitaxial GaSb device results. The GaSb-on-GaSb cell had an AM1.5g efficiency of 5.5% and a 44-sun AM1.5d efficiency of 8.9%. The GaSb-on-GaAs cell was 1.0% efficient under AM1.5g and 4.5% at 44 suns. The lower performance of the heteroepitaxial cell was due to low minority carrier Shockley-Read-Hall lifetimes and bulk shunting caused by defects related to the mismatched growth. A physics-based device simulator was used to create an inverted triple-junction GaInP/GaAs/GaSb model. The model predicted that, with current GaSb-on-GaAs material quality, the not-current-matched, proof-of-concept cell would provide 0.5% absolute efficiency gain over a tandem GaInP/GaAs cell at 1 sun and 2.5% gain at 44 suns, indicating that the effectiveness of the GaSb junction was a function of concentration.

Analysis of the Forward I–V Characteristics of Al-Implanted 4H-SiC p-i-n Diodes with Modeling of Recombination and Trapping Effects Due to Intrinsic and Doping-Induced Defect States

In this paper, the impact of silicon carbide intrinsic defect states, such as Z1/2 and EH6/7 centers, on the forward current–voltage curves of aluminum (Al)-implanted 4H-SiC p-i-n diodes is investigated by means of a physics-based device simulator. During the simulations, an explicit carrier trap effect due to an electrically active defect concentration produced by the Al+ ion implantation process in the anode region was also taken into account. The obtained current–voltage characteristics are compared with those measured experimentally for several samples at different current levels. It is found that intrinsic defect densities as high as the epilayer doping may lead to undesirable device properties and instability of the forward bias behavior. The diode ideality factor and the series resistance increase with the increase of defects and could be controlled by using high-purity epi-wafers. Furthermore, due to their location in the bandgap and capture cross-sections, the impact of Z1/2 centers on the device electrical characteristics is more severe than that of EH6/7 centers.

Visible-Blind APD Heterostructure Design With Superior Field Confinement and Low Operating Voltage

We report on the polarization engineering of GaN/AlGaN heterostructures for the improvement of III-Nitride photodetectors through physics-based device simulations. Various heterojunction p-i-n and p-i-n-i-n designs are proposed and analyzed in this context. Our analysis shows that the introduction of a higher-bandgap AlGaN layer and n-type doped composition graded interlayers reduce operating voltage of an avalanche photodetector (APD) by almost 40% while enabling backside illumination geometry that is critical for the realization of detector arrays. The results of the simulation studies predict an APD device design that is less susceptible to premature breakdown outside of the multiplication region due to superior electric field confinement.

Universal charge-conserving TFET SPICE model incorporating gate current and noise

An analytical compact model for tunnel field-effect transistor (TFET) circuit simulation is extended by adding a gate tunnel current model, a charge-based capacitor model, and a noise model. The equation set is broadly applicable across materials systems and TFET geometries and is readily fitted to rigorous physics-based device simulations and experimental results. To validate the gate current and charge models, technology computer-aided design (TCAD) simulations of a GaN/InN/GaN TFET are used. TCAD simulations show that the gate tunneling current depends on the gate-drain bias with a 100%/0% drain/source current partition. Terminal capacitances evaluated from the charge model agree well with simulations. The model is implemented in Verilog-A and the significance of gate current in the circuit design is illustrated in an amplifier design.

Dual-gate AlGaN/GaN MIS-HEMTs using Si3N4 as the gate dielectric

We have investigated dual-gate AlGaN/GaN metal-insulator-semiconductor high-electron mobility transistors (MIS-HEMTs) using Si3N4 as the gate dielectric by comparison with single-gate MIS-HEMTs. It is shown that the presence of the second gate induces a slight reduction in the maximum output current, transconductance and breakdown voltage, but with the advantages of 5 dB enhanced power gain and higher fT/fmax. Combined with a physics-based device simulation, the breakdown characteristics of the dual-gate device are revealed to be dependent on the second gate. These results demonstrate that the incorporation of dual-gate configuration into the MIS gate is a potential alternative for GaN-based high-power and high-frequency applications.

(Invited) Towards 0.7 Terahertz Silicon Germanium Heterojunction Bipolar Technology – The DOTSEVEN Project

DOTSEVEN is a very ambitious European R&D project targeting the development of Silicon Germanium (SiGe) Heterojunction Bipolar Transistor (HBT) technologies with cut-off frequencies (fmax) of around 700 GHz. The project started in October 2012 and will end in March 2016. It is the continuation of the predecessor project DOTFIVE which succeeded to push fmax of SiGe HBTs into the 500 GHz region for the first time. Besides enhancing the speed performance of the SiGe HBT drastically, the challenging task of its integration into a 130 nm BiCMOS process will be addressed too. The capabilities and benefits of the technology will be demonstrated by benchmark circuits and advanced system applications in the 0.1 to 1 THz range like THz imaging and sensing, wireless Gb/s communications and millimeter-wave radar. Process development and circuit design will be assisted by improved TCAD and physics-based device simulation and accurate compact device modeling.

Influence of AlN Passivation on Dynamic ON-Resistance and Electric Field Distribution in High-Voltage AlGaN/GaN-on-Si HEMTs

We investigate in detail the influence of AlN passivation on dynamic ON-resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) and electric field (E-field) distribution in high-voltage AlGaN/GaN high electron mobility transistors (HEMTs) on a Si substrate based on pulsed I-V measurements, electroluminescence (EL) microscopy, and 2-D physics-based numerical device simulations. It is found that the dynamic RON increase has been significantly suppressed to below 10% at various temperatures ranging from -50 to 200 °C owing to the effective and robust compensation of deep acceptor-like trap states at the AlN/GaN (passivation/cap) interface by the additional positive polarization charges induced in the epitaxial AlN thin passivation layer grown in a plasma-enhanced atomic layer deposition system. To the best of our knowledge, this is the first time that highly suppressed current collapse in an AlGaN/GaN HEMT on a Si substrate within a wide temperature range is ever reported. By monitoring the dynamic RON for 100 consecutive 133-kHz switching cycles, its variation is observed to be less than 2.5%, indicating excellent stability of the passivation effectiveness. The electric field in an AlN-passivated device is found to be well confined at the drain-side gate edge, as shown in EL measurement and numerical simulation results. This phenomenon directly suggests that the virtual gate effect arising from surface trap charging has been effectively alleviated by the AlN passivation technique.

On the Origin of Kink Effect in Current–Voltage Characteristics of AlGaN/GaN High Electron Mobility Transistors

An explanation for the observed drain current collapse in AlGaN/GaN high electron mobility transistors is presented. The drain current-voltage (I-V) characteristics which show this undesirable behavior have been modeled using the physics-based ATLAS device simulator by Silvaco. A basic theory for the determination of virtual gate length for a three terminal device has been developed and used in the simulation. The simulated I-V characteristics closely match the experimental results. This paper suggests a model based on formation of a high resistance region under the virtual gate in the 2-D electron gas channel. The resistance of this region changes abruptly at a critical lateral electric field due to application of drain-source voltage. This abrupt change has been found to be a function of channel temperature. The dynamic behavior of this high resistance region has been proposed to be the cause of drain current collapse.

Degradation Study of Single and Double-Heterojunction InAlN/GaN HEMTs by Two-Dimensional Simulation

We study the concept of double-heterostructure quantum well (DHQW) InAlN/GaN/AlGaN high electron mobility transistor (HEMT) for higher device robustness and less degradation. Physics-based device simulation proves that the back barrier blocks the carrier injection into the device buffer. However, the energy of the injected electrons in the buffer is higher for any quantum well design in InAlN /GaN than in AlGaN/GaN HEMTs. This energy may be sufficient for releasing hydrogen from GaN point defects.

Improvement of breakdown characteristics of an AlGaN/GaN HEMT with a U-type gate foot for millimeter-wave power application

In this study, the physics-based device simulation tool Silvaco ATLAS is used to characterize the electrical properties of an AlGaN/GaN high electron mobility transistor (HEMT) with a U-type gate foot. The U-gate AlGaN/GaN HEMT mainly features a gradually changed sidewall angle, which effectively mitigates the electric field in the channel, thus obtaining enhanced off-state breakdown characteristics. At the same time, only a small additional gate capacitance and decreased gate resistance ensure excellent RF characteristics for the U-gate device. U-gate AlGaN/GaN HEMTs are feasible through adjusting the etching conditions of an inductively coupled plasma system, without introducing any extra process steps. The simulation results are confirmed by experimental measurements. These features indicate that U-gate AlGaN/GaN HEMTs might be promising candidates for use in millimeter-wave power applications.

Phase noise calculation and variability analysis of RFCMOS LC oscillator based on physics-based mixed-mode simulation

A mixed-mode technology computer-aided design framework, which can evaluate the periodic steady-state solution of the oscillator efficiently, has been applied to an RFCMOS LC oscillator. Physics-based simulation of active devices makes it possible to link the internal parameters inside the devices and the performance of the oscillator directly. The phase noise of the oscillator is simulated with physics-based device simulation and the results are compared with the experimental data. Moreover, the statistical effect of the random dopant fluctuation on the oscillation frequency is investigated.

Buffer-Related Degradation Aspects of Single and Double-Heterostructure Quantum Well InAlN/GaN High-Electron-Mobility Transistors

We experimentally prove the viability of the concept of the double-heterostructure quantum well InAlN/GaN high-electron-mobility transistor (HEMT) for the device higher robustness and reliability. In the single quantum well InAlN/GaN HEMTs, the intrinsic channel resistance increases by 300% after 1 h off-state stress; much less degradation is observed in the double-heterostructure device with an AlGaN back barrier. Physics-based device simulation proves that the back barrier blocks the rate of carrier injection into the device buffer. However, whatever the quantum well design is, the energy of the injected electrons in the buffer of InAlN/GaN-based HEMTs is higher than that in the buffer of AlGaN/GaN HEMTs. This energy may be sufficient for releasing hydrogen from GaN point defects.

Design of an Auger-Suppressed Unipolar HgCdTe NBνN Photodetector

A unipolar mercury cadmium telluride (HgCdTe) NBνN infrared (IR) device architecture is analyzed by physics-based numerical device simulations. The device structure is predicted to suppress Shockley–Read–Hall (SRH) and Auger generation–recombination (G–R) processes, while also providing a simplified fabrication process by eliminating p-type doping requirements. The performance characteristics of mid- and long-wavelength infrared (MWIR: λc = 5 μm; LWIR: λc = 12 μm) NBνN devices are calculated and compared with those of nBn and double-layer planar heterostructure (DLPH) devices. Theoretical dark current density (Jdark) values of the MWIR and LWIR NBνN devices are lower by an order of magnitude or more for temperatures between 50 K and 225 K. Calculated peak detectivity (D*) values of 6.01 × 1014 cm Hz0.5/W to 2.36 × 1010 cm Hz0.5/W for temperatures from 95 K to 225 K, and 2.37 × 1014 cm Hz0.5/W to 2.27 × 1011 cm Hz0.5/W for temperatures from 50 K to 95 K are observed for MWIR and LWIR NBνN structures, respectively. A component of the NBνN structure, embodied in a unipolar MWIR nBn device, is also fabricated to experimentally demonstrate selective carrier extraction.

Impact of Interface Charges on the Transient Characteristics of 4H-SiC DMOSFETs

In this paper, we study the transient characteristics of 4H-SiC DMOSFETs with different interface charges to improve the turn-on rising time. A physics-based two-dimensional mixed device and circuit simulator was used to understand the relationship between the switching characteristics and the physical device structures. As the SiO2/SiC interface charge increases, the current density is reduced and the switching time is increased, which is due primarily to the lowered channel mobility. The result of the switching performance is shown as a function of the gate-to-source capacitance and the channel resistance. The results show that the switching performance of the 4H-SiC DMOSFET is sensitive to the channel resistance that is affected by the interface charge variations, which suggests that it is essential to reduce the interface charge densities in order to improve the switching speed in 4H-SiC DMOSFETs.

Effect of n+GaN cap polarization field on Cs-free GaN photocathode characteristics

We report on a Cs-free GaN photocathode structure in which band engineering at the photocathode surface caused by Si delta doping eliminates the need for use of cesium for photocathode activation. The structure is capped with a highly doped n+GaN layer. We have identified that n+GaN cap thickness plays an important role in limiting the effect of polarization induced charges at the GaN surface on the photocathode emission threshold. Physics based device simulations is used for further analysis of the experimental results. Our findings clearly illustrate the impact of polarization induced surface charges on the device properties including its emission threshold.

AlGaN/GaN/AlGaN DH-HEMTs Breakdown Voltage Enhancement Using Multiple Grating Field Plates (MGFPs)

GaN-based high-electron mobility transistors with planar multiple grating field plates (MGFPs) for high-voltage operation are described. A synergy effect with additional electron channel confinement by using a heterojunction AlGaN back barrier (BB) is demonstrated. Suppression of the OFF-state subthreshold gate and drain leakage currents enables breakdown voltage enhancement over 700 V and a low ON-state resistance of 0.68 mΩ × cm2. Such devices have a minor tradeoff in ON-state resistance, lag factor, maximum oscillation frequency, and cutoff frequency. A systematic study of the MGFP design and the effect of Al composition in the BB is described. Physics-based device simulation results give insight into electric field distribution and charge carrier concentration, depending on the field plate design.

Simulations of planar pixel sensors for the ATLAS high luminosity upgrade

A physics-based device simulation was used to study the charge carrier distribution and the electric field configuration inside simplified two-dimensional models for pixel layouts based on the ATLAS pixel sensor. In order to study the behavior of such detectors under different levels of irradiation, a three-level defect model was implemented into the simulation. Using these models, the number of guard rings, the dead edge width and the detector thickness were modified to investigate their influence on the detector depletion at the edge and on its internal electric field distribution in order to optimize the layout parameters. Simulations indicate that the number of guard rings can be reduced by a few hundred microns with respect to the layout used for the present ATLAS sensors, with a corresponding extension of the active area of the sensors. A study of the inter-pixel capacitance and of the capacitance between the implants and the high-voltage contact as a function of several parameters affecting the geometry and the doping level of the implants was also carried out. The results are needed in order to evaluate the noise and the cross-talk among neighboring pixels when connected to the front-end electronics.