Electronic-photonic Integration Research Articles

High capacity, low power, short reach integrated silicon photonic interconnects

The architecture and component technology of a low power, high capacity, short reach optical interconnect are detailed. Measurements from high-performance 300 mm silicon photonics components that comprise the system are shown, along with a quantum-dot mode-locked laser 20-channel comb source with free space wall plug efficiencies up to 17%, advanced packaging techniques for 3D silicon photonic-electronic integration, and schematics for integrated electronics that control the photonic integrated circuits. Techniques for operating such a system in the presence of changing ambient temperature are addressed. Experiments on a 1 Tbps design are conducted with an optical link experiment indicating sub-picojoule/bit energy consumption at scale.

Flexible electronic-photonic 3D integration from ultrathin polymer chiplets

Integrating flexible electronics and photonics can create revolutionary technologies, but combining these components on a single polymer device has been difficult, particularly for high-volume manufacturing. Here, we present a robust chiplet-level heterogeneous integration of polymer-based circuits (CHIP), where ultrathin polymer electronic and optoelectronic chiplets are vertically bonded at room temperature and shaped into application-specific forms with monolithic Input/Output (I/O). This process was used to develop a flexible 3D integrated optrode with high-density microelectrodes for electrical recording, micro light-emitting diodes (μLEDs) for optogenetic stimulation, temperature sensors for bio-safe operations, and shielding designs to prevent optoelectronic artifacts. CHIP enables simple, high-yield, and scalable 3D integration, double-sided area utilization, and miniaturization of connection I/O. Systematic characterization demonstrated the scheme’s success and also identified frequency-dependent origins of optoelectronic artifacts. We envision CHIP being applied to numerous polymer-based devices for a wide range of applications.

A Bi-CMOS electronic photonic integrated circuit quantum light detector.

Complimentary metal-oxide semiconductor (CMOS) integration of quantum technology provides a route to manufacture at volume, simplify assembly, reduce footprint, and increase performance. Quantum noise-limited homodyne detectors have applications across quantum technologies, and they comprise photonics and electronics. Here, we report a quantum noise-limited monolithic electronic-photonic integrated homodyne detector, with a footprint of 80 micrometers by 220 micrometers, fabricated in a 250-nanometer lithography bipolar CMOS process. We measure a 15.3-gigahertz 3-decibel bandwidth with a maximum shot noise clearance of 12 decibels and shot noise clearance out to 26.5 gigahertz, when measured with a 9-decibel-milliwatt power local oscillator. This performance is enabled by monolithic electronic-photonic integration, which goes below the capacitance limits of devices made up of separate integrated chips or discrete components. It exceeds the bandwidth of quantum detectors with macroscopic electronic interconnects, including wire and flip chip bonding. This demonstrates electronic-photonic integration enhancing quantum photonic device performance.

A deeper understanding of the brain with photonic–electronic integration

A deeper understanding of the brain with photonic–electronic integration

Implantable photonic neural probes with 3D-printed microfluidics and applications to uncaging.

Advances in chip-scale photonic-electronic integration are enabling a new generation of foundry-manufacturable implantable silicon neural probes incorporating nanophotonic waveguides and microelectrodes for optogenetic stimulation and electrophysiological recording in neuroscience research. Further extending neural probe functionalities with integrated microfluidics is a direct approach to achieve neurochemical injection and sampling capabilities. In this work, we use two-photon polymerization 3D printing to integrate microfluidic channels onto photonic neural probes, which include silicon nitride nanophotonic waveguides and grating emitters. The customizability of 3D printing enables a unique geometry of microfluidics that conforms to the shape of each neural probe, enabling integration of microfluidics with a variety of existing neural probes while avoiding the complexities of monolithic microfluidics integration. We demonstrate the photonic and fluidic functionalities of the neural probes via fluorescein injection in agarose gel and photoloysis of caged fluorescein in solution and in fixed brain tissue.

Two-dimensional semiconducting SnP2Se6 with giant second-harmonic-generation for monolithic on-chip electronic-photonic integration

Two-dimensional (2D) layered semiconductors with nonlinear optical (NLO) properties hold great promise to address the growing demand of multifunction integration in electronic-photonic integrated circuits (EPICs). However, electronic-photonic co-design with 2D NLO semiconductors for on-chip telecommunication is limited by their essential shortcomings in terms of unsatisfactory optoelectronic properties, odd-even layer-dependent NLO activity and low NLO susceptibility in telecom band. Here we report the synthesis of 2D SnP2Se6, a van der Waals NLO semiconductor exhibiting strong odd-even layer-independent second harmonic generation (SHG) activity at 1550 nm and pronounced photosensitivity under visible light. The combination of 2D SnP2Se6 with a SiN photonic platform enables the chip-level multifunction integration for EPICs. The hybrid device not only features efficient on-chip SHG process for optical modulation, but also allows the telecom-band photodetection relying on the upconversion of wavelength from 1560 to 780 nm. Our finding offers alternative opportunities for the collaborative design of EPICs.

Exploring the resonance absorption of subwavelength-patterned epitaxial-grown group-IV semiconductor composite structures.

We experimentally and theoretically demonstrate a mid-infrared perfect absorber with all group-IV epitaxial layered composite structures. The multispectral narrowband strong absorption (>98%) is attributed to the combined effects of the asymmetric Fabry-Perot (FP) interference and the plasmonic resonance in the subwavelength-patterned metal-dielectric-metal (MDM) stack. The spectral position and intensity of the absorption resonance were analyzed by reflection and transmission. While a localized plasmon resonance in the dual-metal region was found to be modulated by both the horizontal (ribbon width) and vertical (spacer layer thickness) profile, the asymmetric FP modes were modulated merely by the vertical geometric parameters. Semi-empirical calculations show strong coupling between modes with a large Rabi-splitting energy reaching 46% of the mean energy of the plasmonic mode under proper horizontal profile. A wavelength-adjustable all-group-IV-semiconductor plasmonic perfect absorber has potential for photonic-electronic integration.

Multiple Tb/s Coherent Optical Transceivers for Short Reach Interconnect

This paper investigates coherent optical transceivers for short-reach interconnect, where a local oscillator laser is used to boost received optical signals for high receiver sensitivity. We review the state-of-the-art technologies and propose a miniature Mach-Zehnder modulator (mMZM) array with 3D silicon photonic-electronic integration to enable high-density, low-power multiple Tb/s coherent transceivers. For design optimization at transceiver level performances, we develop methodology and models to simulate PN junction and mMZM for high-efficiency high-speed modulation, which can be linked to system performances, including high-speed performances, receiver sensitivity, optical link budget, and coherent optical transceiver power consumption. With the optimized design and state-of-the-art technologies, we achieve highly integrated multiple Tb/s coherent transceivers with high density, high speed, and low power. Our simulation results show 3 pJ/bit for integrated driver/mMZM, 5 pJ/bit for integrated PIC/IC and 6.5 pJ/bit with transceiver optics for 6.4 Tb/s with 60 Gbaud 16QAM. Compared with conventional long phase shifter (PS) MZM (4 mm), mMZM with short PS (2.4 mm) only have an extra loss of ∼2 dB under 60 Gbaud 16QAM modulation with optimized designs. We study the scalability from 6.4 Tb/s to 12.8 Tb/s using 120 Gbaud 16QAM for intra-DC interconnect. The results show that further improvement for modulation efficiency, frequency response and laser output power are needed to enable the 12.8 Tb/s.

Silicon-based optoelectronics for general-purpose matrix computation: a review

Conventional electronic processors, which are the mainstream and almost invincible hardware for computation, are approaching their limits in both computational power and energy efficiency, especially in large-scale matrix computation. By combining electronic, photonic, and optoelectronic devices and circuits together, silicon-based optoelectronic matrix computation has been demonstrating great capabilities and feasibilities. Matrix computation is one of the few general-purpose computations that have the potential to exceed the computation performance of digital logic circuits in energy efficiency, computational power, and latency. Moreover, electronic processors also suffer from the tremendous energy consumption of the digital transceiver circuits during high-capacity data interconnections. We review the recent progress in photonic matrix computation, including matrix-vector multiplication, convolution, and multiply–accumulate operations in artificial neural networks, quantum information processing, combinatorial optimization, and compressed sensing, with particular attention paid to energy consumption. We also summarize the advantages of silicon-based optoelectronic matrix computation in data interconnections and photonic-electronic integration over conventional optical computing processors. Looking toward the future of silicon-based optoelectronic matrix computations, we believe that silicon-based optoelectronics is a promising and comprehensive platform for disruptively improving general-purpose matrix computation performance in the post-Moore’s law era.

Integration of Photonic Circuits in Electronics for Enhanced Data Processing and Transfer

The rapid growth of data-intensive applications, such as artificial intelligence (AI), big data analytics, and cloud computing, has highlighted the limitations of traditional electronic circuits, particularly in terms of data transfer rates, processing power, and energy efficiency. This study explores the integration of photonic circuits with electronic systems as a viable solution to these challenges. By leveraging the speed and efficiency of photons for data transmission, photonic circuits promise substantial improvements over conventional electronic circuits. The research employs a mixed-method approach, combining experimental analysis with a comprehensive literature review. Experimental results demonstrate that hybrid photonic-electronic circuits can achieve up to ten times faster data processing speeds, a 30% reduction in power consumption, increased bandwidth, and reduced latency compared to traditional electronic systems. These advancements address key issues such as resistive losses and heat generation, offering enhanced performance for high-demand applications. However, challenges related to signal conversion and thermal management persist. Future research is needed to refine photonic-electronic integration and explore advanced technologies, including quantum photonics, to further enhance data processing capabilities. Overall, the study highlights the significant potential of photonic circuits to revolutionize data systems, providing a path towards next-generation computing technologies.

Stress reduction and wafer bow accommodation for the fabrication of thin film lithium niobate on oxidized silicon

Sub-micrometer-thick lithium niobate on an insulator is a promising integrated photonic platform that provides optical field confinement and optical nonlinearity useful for state-of-the-art electro-optic modulators and wavelength converters. The fabrication of lithium niobate on insulator on a silicon substrate through ion slicing is advantageous for electronic-photonic integration but is challenging because of debonding and cracking due to the thermal expansion coefficient mismatch between silicon and lithium niobate. In this work, the fabrication of thin film lithium niobate on insulator on a silicon handle wafer is achieved, informed by structural modeling, and facilitated by accommodating for dissimilar wafer bows using a bonding apparatus. Structural finite element analysis of strain energy and stress, due to thermal expansion coefficient mismatch at elevated temperatures, is conducted. High strain energies and stresses that result in debonding and cracking, respectively, are studied through modeling and reduced by selecting optimized substrate thicknesses followed by an experimental technique to bond substrates with dissimilar bows. A lithium niobate thin film with a thickness of 800 nm is successfully transferred to an oxidized silicon wafer with a root mean square surface roughness of 5.6 nm.

Co-Package Technology Platform for Low-Power and Low-Cost Data Centers

We report recent advances in photonic–electronic integration developed in the European research project L3MATRIX. The aim of the project was to demonstrate the basic building blocks of a co-packaged optical system. Two-dimensional silicon photonics arrays with 64 modulators were fabricated. Novel modulation schemes based on slow light modulation were developed to assist in achieving an efficient performance of the module. Integration of DFB laser sources within each cell in the matrix was demonstrated as well using wafer bonding between the InP and SOI wafers. Improved semiconductor quantum dot MBE growth, characterization and gain stack designs were developed. Packaging of these 2D photonic arrays in a chiplet configuration was demonstrated using a vertical integration approach in which the optical interconnect matrix was flip-chip assembled on top of a CMOS mimic chip with 2D vertical fiber coupling. The optical chiplet was further assembled on a substrate to facilitate integration with the multi-chip module of the co-packaged system with a switch surrounded by several such optical chiplets. We summarize the features of the L3MATRIX co-package technology platform and its holistic toolbox of technologies to address the next generation of computing challenges.

Subtractive photonics.

Realization of a multilayer photonic process, as well as co-integration of a large number of photonic and electronic components on a single substrate, presents many advantages over conventional solutions and opens a pathway for various novel architectures and applications. Despite the many potential advantages, realization of a complex multilayer photonic process compatible with low-cost CMOS platforms remains challenging. In this paper, a photonic platform is investigated that uses subtractively manufactured structures to fabricate such systems. These structures are created solely using simple post-processing methods, with no modification to the foundry process. This method uses the well-controlled metal layers of advanced integrated electronics as sacrificial layers to define dielectric shapes as optical components. Metal patterns are removed using an etching process, leaving behind a complex multilayer photonic system, while keeping the electronics'metal wiring intact. This approach can be applied to any integrated chip with well-defined metallization, including those produced in pure electronics processes, pure photonics processes, heterogeneously integrated processes, monolithic electronic-photonic processes, etc. This paper provides a proof-of-concept example of monolithic electronic-photonic integration in a 65 nm bulk CMOS process and demonstrates proof-of-concept photonic structures. The fabrication results, characterization, and measurement data are presented.

Laser Written Glass Interposer for Fiber Coupling to Silicon Photonic Integrated Circuits

Recent advancements in photonic-electronic integration push towards denser multichannel fiber to silicon photonic chip coupling solutions. However, current packaging schemes based on suitably polished fiber arrays do not provide sufficient scalability. Alternatively, lithographically-patterned fused silica glass interposers have been proposed, allowing for the integration of fanout waveguides between a dense array of on-chip silicon waveguides and a cleaved fiber ribbon. In this paper, we propose the use of femtosecond laser inscription for the fabrication of the fused silica glass interposer, allowing for a monolithic integration of waveguides and V-grooves for fiber alignment. The waveguides obtained by Femtosecond Laser Direct Writing (FLDW) have a propagation loss of 0.88 dB/cm at 1550 nm. The mode-field diameter is 12.8 ± 0.4 μm, allowing for a coupling loss of 1.24 ± 0.32 dB when coupling to a standard single mode optical fiber, passively aligned to the fused silica waveguide by insertion in a V-groove created by Femtosecond Laser Irradiation followed by Chemical Etching (FLICE). The average surface roughness of the etched waveguide facet is 160 ± 5 nm. Scattering loss when coupling to fiber is reduced by use of an index-matching adhesive for fiber fixation. A polished out-of-plane coupling mirror at an angle of 41.5° injects the light into standard grating couplers, providing a quasi-planar fiber-to-chip package. The excess loss of the proposed solution is limited to 2 dB per interface, including mirror, waveguide and fiber coupling losses.

Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models

Silicon-based electronic-photonic integration offers several opportunities for integrated circuits (IC) designers to innovate systems architectures that leverage the advantages of optical-domain signal processing and low-loss transmission in optical fibers. However, photonic integrated circuit (PIC) design tools have evolved from the numerical Maxwell field solvers and are completely disjointed from the electronic circuit simulation tools such as SPICE and Cadence Spectre. Thus there is a gap that needs to be filled by the IC community where they can instantiate photonic building blocks to form PICs and perform co-simulation with interfacing (Bi)CMOS electronic circuits. In recent work, Verilog-A compact models have been developed for photonic device building blocks that enable transient simulations of hybrid electronic-photonic components such as lasers, modulators and detectors. However, frequency sweeps of radio-frequency (RF) photonic filters remain unwieldy due to the long simulation times of stepped frequency transient simulations. In this work, we present complex frequency chirp based methods for rapid frequency-domain simulation of PICs. The trade-offs involved in selecting the simulation parameters for a given frequency response accuracy and simulation time are studied along with the impact of windowing and frequency chirp profile. The presented method can result in over $1000\times $ improvement in simulation time of frequency sweeps of higher-order RF photonic filter topologies.

1.55 µm electrically pumped continuous wave lasing of quantum dash lasers grown on silicon

Realization of fully integrated silicon photonics has been handicapped by the lack of a reliable and efficient III-V light source on Si. Specifically, electrically pumped continuous wave (CW) lasing and operation sustainable at high temperatures are critical for practical applications. Here, we present the first electrically pumped room temperature (RT) CW lasing results of 1.55 μm quantum dash (QDash) lasers directly grown on patterned on-axis (001) Si using metal organic chemical vapor deposition (MOCVD). Adopting a dash-in-well structure as the active medium, the growth of QDash was optimized on an InP on Si template. Incorporating the advantages of the optimized material growth and device fabrication, good laser performance including a low threshold current of 50 mA, a threshold current density of 1.3 kA/cm2 and operation at elevated temperature up to 59 °C in CW mode was achieved. Comparison of lasers grown on Si and native InP substrates in the same growth run was made. Based on the laser characteristics measured at room temperature and elevated temperatures, the QDash quality on the two substrates is comparable. These results suggest that MOCVD is a viable technique for lasers on Si growth and represent an advance towards silicon-based photonic-electronic integration and manufacturing.

Photonic Components for Signal Generation and Distribution for Large Aperture Radar in Autonomous Driving

Abstract Fully autonomous driving, even under bad weather conditions, requires use of multiple sensor systems including radar imaging. Microwave photonics, especially the optical generation and distribution of radar signals, can overcome many of the electronic disadvantages. This article will give an overview about several photonic components and how they could be incorporated into a photonic synchronized radar system, where all the complexity is shifted to a central station. A first proof-of-concept radar experiment with of the shelf telecommunication equipment shows an angular resolution of 1.1°. Furthermore an overview about possible photonic electronic integration is given, leading to comprising low complexity transmitter and receiver chips.

Out-of-Plane Focusing Grating Couplers for Silicon Photonics Integration With Optical MRAM Technology

We present the design methodology and experimental characterization of compact out-of-plane focusing grating couplers for integration with magnetoresistive random access memory technology. Focusing grating couplers have recently found attention as layer-couplers for photonic-electronic integration. The components we demonstrate are designed for a wavelength of 1550 nm, fabricated in a standard 220 nm SOI photonic platform and optimized given the fabrication restrictions for standard 193-nm UV lithography. For the first time, we extend the design based on the phase matching condition to a two-dimensional (2-D) grating design with two optical input ports. We further present the experimental characterization of the focusing behaviour by spatially probing the emitted beam with a tapered-and-lensed fiber and demonstrate the polarization controlling capabilities of the 2-D FGCs.

Femtofarad optoelectronic integration demonstrating energy-saving signal conversion and nonlinear functions

The introduction of photonic technologies into mature electronic circuits is in high demand to accelerate on-chip information networking and even computing. Great difficulty lies in the fact that the optoelectronic coupling at their interfaces requires a substantial charging energy determined by their capacitance. Optoelectronic devices have been too large to reduce the integrated capacitance down to the femtofarad scale. Here we use a photonic-crystal platform to demonstrate the first experimental proof of optoelectronic integration at only 2 fF. This allows us to realize a record-low attojoule-energy electro-optic modulator (an electrical-to-optical or E–O converter) and an amplifier-free photoreceiver (an optical-to-electrical, or O–E converter), which leads to ultralow-energy signal conversion. By integrating these O–E/E–O devices, we demonstrate femtofarad ‘O–E–O transistors’ with optical signal gain that show various optical nonlinear functions, including as all-optical switches, wavelength converters and cascadable optical repeaters with a femtojoule-per-bit energy consumption. These femtofarad-scale O–E/E–O/O–E–O devices promise tightly coupled photonic–electronic integration for new fields of energy-saving information processing. A photonic-crystal platform enables attojoule-energy electro-optic modulators and amplifier-free photoreceivers.

High-Volume Manufacturing Platform for Silicon Photonics

Hybrid integration of advanced CMOS electronics and a high-performing silicon photonics platform, combined with wafer-scale testing and assembly processes have enabled delivery of low-cost, low-power, high-performance, high-volume optical transceivers. In this paper, we will discuss the aspects of each of these factors that have been critical in achieving this success. In particular, we will focus on the silicon photonics process, device library and design kit, the innovative solutions for wafer-level testing and assembly of the optical transceivers, and discuss the benefits and drawbacks of monolithic and hybrid electronics–photonics integration and the impact on the roadmap of future optical transceivers.