Precise phosphorus profiles were obtained in the region of an interface by means of inductively coupled plasma mass spectrometry (ICPMS), secondary ion mass spectroscopy (SIMS), and spreading resistance profiling (SRP) measurements. Samples were prepared by implanting phosphorous at low dose, annealing, and oxidizing by wet oxidation. According to ICP‐MS, the total amounts of phosphorus were extremely low in the side. The same results held when the oxidation temperature was changed from 800 to 900°C. SIMS measurement in conjunction with ICP mass measurement showed that the pileup of phosphorus occurred in the silicon side at the interface. SRP confirmed that the pileup of phosphorus was electrically inactive. As a result, the active amount of phosphorus in the Si side was reduced to about 60%. The simulation based on the monolayer formation at the the interface was proposed to describe the observed pileup phenomenon of phosphorus. © 1999 The Electrochemical Society. All rights reserved.